Staging: strip: delete the driver
[linux/fpc-iii.git] / drivers / media / dvb / frontends / atbm8830.c
blob43aac2f85c2e5ccd895288d20bbdcfb7c668930a
1 /*
2 * Support for AltoBeam GB20600 (a.k.a DMB-TH) demodulator
3 * ATBM8830, ATBM8831
5 * Copyright (C) 2009 David T.L. Wong <davidtlwong@gmail.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <asm/div64.h>
23 #include "dvb_frontend.h"
25 #include "atbm8830.h"
26 #include "atbm8830_priv.h"
28 #define dprintk(args...) \
29 do { \
30 if (debug) \
31 printk(KERN_DEBUG "atbm8830: " args); \
32 } while (0)
34 static int debug;
36 module_param(debug, int, 0644);
37 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
39 static int atbm8830_write_reg(struct atbm_state *priv, u16 reg, u8 data)
41 int ret = 0;
42 u8 dev_addr;
43 u8 buf1[] = { reg >> 8, reg & 0xFF };
44 u8 buf2[] = { data };
45 struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
46 struct i2c_msg msg2 = { .flags = 0, .buf = buf2, .len = 1 };
48 dev_addr = priv->config->demod_address;
49 msg1.addr = dev_addr;
50 msg2.addr = dev_addr;
52 if (debug >= 2)
53 printk(KERN_DEBUG "%s: reg=0x%04X, data=0x%02X\n",
54 __func__, reg, data);
56 ret = i2c_transfer(priv->i2c, &msg1, 1);
57 if (ret != 1)
58 return -EIO;
60 ret = i2c_transfer(priv->i2c, &msg2, 1);
61 return (ret != 1) ? -EIO : 0;
64 static int atbm8830_read_reg(struct atbm_state *priv, u16 reg, u8 *p_data)
66 int ret;
67 u8 dev_addr;
69 u8 buf1[] = { reg >> 8, reg & 0xFF };
70 u8 buf2[] = { 0 };
71 struct i2c_msg msg1 = { .flags = 0, .buf = buf1, .len = 2 };
72 struct i2c_msg msg2 = { .flags = I2C_M_RD, .buf = buf2, .len = 1 };
74 dev_addr = priv->config->demod_address;
75 msg1.addr = dev_addr;
76 msg2.addr = dev_addr;
78 ret = i2c_transfer(priv->i2c, &msg1, 1);
79 if (ret != 1) {
80 dprintk(KERN_DEBUG "%s: error reg=0x%04x, ret=%i\n",
81 __func__, reg, ret);
82 return -EIO;
85 ret = i2c_transfer(priv->i2c, &msg2, 1);
86 if (ret != 1)
87 return -EIO;
89 *p_data = buf2[0];
90 if (debug >= 2)
91 printk(KERN_DEBUG "%s: reg=0x%04X, data=0x%02X\n",
92 __func__, reg, buf2[0]);
94 return 0;
97 /* Lock register latch so that multi-register read is atomic */
98 static inline int atbm8830_reglatch_lock(struct atbm_state *priv, int lock)
100 return atbm8830_write_reg(priv, REG_READ_LATCH, lock ? 1 : 0);
103 static int set_osc_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
105 u32 val;
106 u64 t;
108 /* 0x100000 * freq / 30.4MHz */
109 t = (u64)0x100000 * freq;
110 do_div(t, 30400);
111 val = t;
113 atbm8830_write_reg(priv, REG_OSC_CLK, val);
114 atbm8830_write_reg(priv, REG_OSC_CLK + 1, val >> 8);
115 atbm8830_write_reg(priv, REG_OSC_CLK + 2, val >> 16);
117 return 0;
120 static int set_if_freq(struct atbm_state *priv, u32 freq /*in kHz*/)
123 u32 fs = priv->config->osc_clk_freq;
124 u64 t;
125 u32 val;
126 u8 dat;
128 if (freq != 0) {
129 /* 2 * PI * (freq - fs) / fs * (2 ^ 22) */
130 t = (u64) 2 * 31416 * (freq - fs);
131 t <<= 22;
132 do_div(t, fs);
133 do_div(t, 1000);
134 val = t;
136 atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 1);
137 atbm8830_write_reg(priv, REG_IF_FREQ, val);
138 atbm8830_write_reg(priv, REG_IF_FREQ+1, val >> 8);
139 atbm8830_write_reg(priv, REG_IF_FREQ+2, val >> 16);
141 atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
142 dat &= 0xFC;
143 atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
144 } else {
145 /* Zero IF */
146 atbm8830_write_reg(priv, REG_TUNER_BASEBAND, 0);
148 atbm8830_read_reg(priv, REG_ADC_CONFIG, &dat);
149 dat &= 0xFC;
150 dat |= 0x02;
151 atbm8830_write_reg(priv, REG_ADC_CONFIG, dat);
153 if (priv->config->zif_swap_iq)
154 atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x03);
155 else
156 atbm8830_write_reg(priv, REG_SWAP_I_Q, 0x01);
159 return 0;
162 static int is_locked(struct atbm_state *priv, u8 *locked)
164 u8 status;
166 atbm8830_read_reg(priv, REG_LOCK_STATUS, &status);
168 if (locked != NULL)
169 *locked = (status == 1);
170 return 0;
173 static int set_agc_config(struct atbm_state *priv,
174 u8 min, u8 max, u8 hold_loop)
176 /* no effect if both min and max are zero */
177 if (!min && !max)
178 return 0;
180 atbm8830_write_reg(priv, REG_AGC_MIN, min);
181 atbm8830_write_reg(priv, REG_AGC_MAX, max);
182 atbm8830_write_reg(priv, REG_AGC_HOLD_LOOP, hold_loop);
184 return 0;
187 static int set_static_channel_mode(struct atbm_state *priv)
189 int i;
191 for (i = 0; i < 5; i++)
192 atbm8830_write_reg(priv, 0x099B + i, 0x08);
194 atbm8830_write_reg(priv, 0x095B, 0x7F);
195 atbm8830_write_reg(priv, 0x09CB, 0x01);
196 atbm8830_write_reg(priv, 0x09CC, 0x7F);
197 atbm8830_write_reg(priv, 0x09CD, 0x7F);
198 atbm8830_write_reg(priv, 0x0E01, 0x20);
200 /* For single carrier */
201 atbm8830_write_reg(priv, 0x0B03, 0x0A);
202 atbm8830_write_reg(priv, 0x0935, 0x10);
203 atbm8830_write_reg(priv, 0x0936, 0x08);
204 atbm8830_write_reg(priv, 0x093E, 0x08);
205 atbm8830_write_reg(priv, 0x096E, 0x06);
207 /* frame_count_max0 */
208 atbm8830_write_reg(priv, 0x0B09, 0x00);
209 /* frame_count_max1 */
210 atbm8830_write_reg(priv, 0x0B0A, 0x08);
212 return 0;
215 static int set_ts_config(struct atbm_state *priv)
217 const struct atbm8830_config *cfg = priv->config;
219 /*Set parallel/serial ts mode*/
220 atbm8830_write_reg(priv, REG_TS_SERIAL, cfg->serial_ts ? 1 : 0);
221 atbm8830_write_reg(priv, REG_TS_CLK_MODE, cfg->serial_ts ? 1 : 0);
222 /*Set ts sampling edge*/
223 atbm8830_write_reg(priv, REG_TS_SAMPLE_EDGE,
224 cfg->ts_sampling_edge ? 1 : 0);
225 /*Set ts clock freerun*/
226 atbm8830_write_reg(priv, REG_TS_CLK_FREERUN,
227 cfg->ts_clk_gated ? 0 : 1);
229 return 0;
232 static int atbm8830_init(struct dvb_frontend *fe)
234 struct atbm_state *priv = fe->demodulator_priv;
235 const struct atbm8830_config *cfg = priv->config;
237 /*Set oscillator frequency*/
238 set_osc_freq(priv, cfg->osc_clk_freq);
240 /*Set IF frequency*/
241 set_if_freq(priv, cfg->if_freq);
243 /*Set AGC Config*/
244 set_agc_config(priv, cfg->agc_min, cfg->agc_max,
245 cfg->agc_hold_loop);
247 /*Set static channel mode*/
248 set_static_channel_mode(priv);
250 set_ts_config(priv);
251 /*Turn off DSP reset*/
252 atbm8830_write_reg(priv, 0x000A, 0);
254 /*SW version test*/
255 atbm8830_write_reg(priv, 0x020C, 11);
257 /* Run */
258 atbm8830_write_reg(priv, REG_DEMOD_RUN, 1);
260 return 0;
264 static void atbm8830_release(struct dvb_frontend *fe)
266 struct atbm_state *state = fe->demodulator_priv;
267 dprintk("%s\n", __func__);
269 kfree(state);
272 static int atbm8830_set_fe(struct dvb_frontend *fe,
273 struct dvb_frontend_parameters *fe_params)
275 struct atbm_state *priv = fe->demodulator_priv;
276 int i;
277 u8 locked = 0;
278 dprintk("%s\n", __func__);
280 /* set frequency */
281 if (fe->ops.tuner_ops.set_params) {
282 if (fe->ops.i2c_gate_ctrl)
283 fe->ops.i2c_gate_ctrl(fe, 1);
284 fe->ops.tuner_ops.set_params(fe, fe_params);
285 if (fe->ops.i2c_gate_ctrl)
286 fe->ops.i2c_gate_ctrl(fe, 0);
289 /* start auto lock */
290 for (i = 0; i < 10; i++) {
291 mdelay(100);
292 dprintk("Try %d\n", i);
293 is_locked(priv, &locked);
294 if (locked != 0) {
295 dprintk("ATBM8830 locked!\n");
296 break;
300 return 0;
303 static int atbm8830_get_fe(struct dvb_frontend *fe,
304 struct dvb_frontend_parameters *fe_params)
306 dprintk("%s\n", __func__);
308 /* TODO: get real readings from device */
309 /* inversion status */
310 fe_params->inversion = INVERSION_OFF;
312 /* bandwidth */
313 fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
315 fe_params->u.ofdm.code_rate_HP = FEC_AUTO;
316 fe_params->u.ofdm.code_rate_LP = FEC_AUTO;
318 fe_params->u.ofdm.constellation = QAM_AUTO;
320 /* transmission mode */
321 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO;
323 /* guard interval */
324 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO;
326 /* hierarchy */
327 fe_params->u.ofdm.hierarchy_information = HIERARCHY_NONE;
329 return 0;
332 static int atbm8830_get_tune_settings(struct dvb_frontend *fe,
333 struct dvb_frontend_tune_settings *fesettings)
335 fesettings->min_delay_ms = 0;
336 fesettings->step_size = 0;
337 fesettings->max_drift = 0;
338 return 0;
341 static int atbm8830_read_status(struct dvb_frontend *fe, fe_status_t *fe_status)
343 struct atbm_state *priv = fe->demodulator_priv;
344 u8 locked = 0;
345 u8 agc_locked = 0;
347 dprintk("%s\n", __func__);
348 *fe_status = 0;
350 is_locked(priv, &locked);
351 if (locked) {
352 *fe_status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
353 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
355 dprintk("%s: fe_status=0x%x\n", __func__, *fe_status);
357 atbm8830_read_reg(priv, REG_AGC_LOCK, &agc_locked);
358 dprintk("AGC Lock: %d\n", agc_locked);
360 return 0;
363 static int atbm8830_read_ber(struct dvb_frontend *fe, u32 *ber)
365 struct atbm_state *priv = fe->demodulator_priv;
366 u32 frame_err;
367 u8 t;
369 dprintk("%s\n", __func__);
371 atbm8830_reglatch_lock(priv, 1);
373 atbm8830_read_reg(priv, REG_FRAME_ERR_CNT + 1, &t);
374 frame_err = t & 0x7F;
375 frame_err <<= 8;
376 atbm8830_read_reg(priv, REG_FRAME_ERR_CNT, &t);
377 frame_err |= t;
379 atbm8830_reglatch_lock(priv, 0);
381 *ber = frame_err * 100 / 32767;
383 dprintk("%s: ber=0x%x\n", __func__, *ber);
384 return 0;
387 static int atbm8830_read_signal_strength(struct dvb_frontend *fe, u16 *signal)
389 struct atbm_state *priv = fe->demodulator_priv;
390 u32 pwm;
391 u8 t;
393 dprintk("%s\n", __func__);
394 atbm8830_reglatch_lock(priv, 1);
396 atbm8830_read_reg(priv, REG_AGC_PWM_VAL + 1, &t);
397 pwm = t & 0x03;
398 pwm <<= 8;
399 atbm8830_read_reg(priv, REG_AGC_PWM_VAL, &t);
400 pwm |= t;
402 atbm8830_reglatch_lock(priv, 0);
404 dprintk("AGC PWM = 0x%02X\n", pwm);
405 pwm = 0x400 - pwm;
407 *signal = pwm * 0x10000 / 0x400;
409 return 0;
412 static int atbm8830_read_snr(struct dvb_frontend *fe, u16 *snr)
414 dprintk("%s\n", __func__);
415 *snr = 0;
416 return 0;
419 static int atbm8830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
421 dprintk("%s\n", __func__);
422 *ucblocks = 0;
423 return 0;
426 static int atbm8830_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
428 struct atbm_state *priv = fe->demodulator_priv;
430 return atbm8830_write_reg(priv, REG_I2C_GATE, enable ? 1 : 0);
433 static struct dvb_frontend_ops atbm8830_ops = {
434 .info = {
435 .name = "AltoBeam ATBM8830/8831 DMB-TH",
436 .type = FE_OFDM,
437 .frequency_min = 474000000,
438 .frequency_max = 858000000,
439 .frequency_stepsize = 10000,
440 .caps =
441 FE_CAN_FEC_AUTO |
442 FE_CAN_QAM_AUTO |
443 FE_CAN_TRANSMISSION_MODE_AUTO |
444 FE_CAN_GUARD_INTERVAL_AUTO
447 .release = atbm8830_release,
449 .init = atbm8830_init,
450 .sleep = NULL,
451 .write = NULL,
452 .i2c_gate_ctrl = atbm8830_i2c_gate_ctrl,
454 .set_frontend = atbm8830_set_fe,
455 .get_frontend = atbm8830_get_fe,
456 .get_tune_settings = atbm8830_get_tune_settings,
458 .read_status = atbm8830_read_status,
459 .read_ber = atbm8830_read_ber,
460 .read_signal_strength = atbm8830_read_signal_strength,
461 .read_snr = atbm8830_read_snr,
462 .read_ucblocks = atbm8830_read_ucblocks,
465 struct dvb_frontend *atbm8830_attach(const struct atbm8830_config *config,
466 struct i2c_adapter *i2c)
468 struct atbm_state *priv = NULL;
469 u8 data = 0;
471 dprintk("%s()\n", __func__);
473 if (config == NULL || i2c == NULL)
474 return NULL;
476 priv = kzalloc(sizeof(struct atbm_state), GFP_KERNEL);
477 if (priv == NULL)
478 goto error_out;
480 priv->config = config;
481 priv->i2c = i2c;
483 /* check if the demod is there */
484 if (atbm8830_read_reg(priv, REG_CHIP_ID, &data) != 0) {
485 dprintk("%s atbm8830/8831 not found at i2c addr 0x%02X\n",
486 __func__, priv->config->demod_address);
487 goto error_out;
489 dprintk("atbm8830 chip id: 0x%02X\n", data);
491 memcpy(&priv->frontend.ops, &atbm8830_ops,
492 sizeof(struct dvb_frontend_ops));
493 priv->frontend.demodulator_priv = priv;
495 atbm8830_init(&priv->frontend);
497 atbm8830_i2c_gate_ctrl(&priv->frontend, 1);
499 return &priv->frontend;
501 error_out:
502 dprintk("%s() error_out\n", __func__);
503 kfree(priv);
504 return NULL;
507 EXPORT_SYMBOL(atbm8830_attach);
509 MODULE_DESCRIPTION("AltoBeam ATBM8830/8831 GB20600 demodulator driver");
510 MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
511 MODULE_LICENSE("GPL");