Staging: strip: delete the driver
[linux/fpc-iii.git] / drivers / media / video / cx23885 / cimax2.c
blobd4a9d2c5947c196f6d4596c3c0f9e063ee1cc7d7
1 /*
2 * cimax2.c
4 * CIMax2(R) SP2 driver in conjunction with NetUp Dual DVB-S2 CI card
6 * Copyright (C) 2009 NetUP Inc.
7 * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
8 * Copyright (C) 2009 Abylay Ospan <aospan@netup.ru>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include "cx23885.h"
27 #include "dvb_ca_en50221.h"
28 /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
29 bits 31-16
30 +-----------+
31 | Reserved |
32 +-----------+
33 bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
34 +-------+-------+-------+-------+-------+-------+-------+-------+
35 | WR# | RD# | | ACK# | ADHI | ADLO | CS1# | CS0# |
36 +-------+-------+-------+-------+-------+-------+-------+-------+
37 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
38 +-------+-------+-------+-------+-------+-------+-------+-------+
39 | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0|
40 +-------+-------+-------+-------+-------+-------+-------+-------+
41 ***/
42 /* MC417 */
43 #define NETUP_DATA 0x000000ff
44 #define NETUP_WR 0x00008000
45 #define NETUP_RD 0x00004000
46 #define NETUP_ACK 0x00001000
47 #define NETUP_ADHI 0x00000800
48 #define NETUP_ADLO 0x00000400
49 #define NETUP_CS1 0x00000200
50 #define NETUP_CS0 0x00000100
51 #define NETUP_EN_ALL 0x00001000
52 #define NETUP_CTRL_OFF (NETUP_CS1 | NETUP_CS0 | NETUP_WR | NETUP_RD)
53 #define NETUP_CI_CTL 0x04
54 #define NETUP_CI_RD 1
56 #define NETUP_IRQ_DETAM 0x1
57 #define NETUP_IRQ_IRQAM 0x4
59 static unsigned int ci_dbg;
60 module_param(ci_dbg, int, 0644);
61 MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
63 #define ci_dbg_print(args...) \
64 do { \
65 if (ci_dbg) \
66 printk(KERN_DEBUG args); \
67 } while (0)
69 /* stores all private variables for communication with CI */
70 struct netup_ci_state {
71 struct dvb_ca_en50221 ca;
72 struct mutex ca_mutex;
73 struct i2c_adapter *i2c_adap;
74 u8 ci_i2c_addr;
75 int status;
76 struct work_struct work;
77 void *priv;
78 u8 current_irq_mode;
79 int current_ci_flag;
80 unsigned long next_status_checked_time;
84 int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
85 u8 *buf, int len)
87 int ret;
88 struct i2c_msg msg[] = {
90 .addr = addr,
91 .flags = 0,
92 .buf = &reg,
93 .len = 1
94 }, {
95 .addr = addr,
96 .flags = I2C_M_RD,
97 .buf = buf,
98 .len = len
102 ret = i2c_transfer(i2c_adap, msg, 2);
104 if (ret != 2) {
105 ci_dbg_print("%s: i2c read error, Reg = 0x%02x, Status = %d\n",
106 __func__, reg, ret);
108 return -1;
111 ci_dbg_print("%s: i2c read Addr=0x%04x, Reg = 0x%02x, data = %02x\n",
112 __func__, addr, reg, buf[0]);
114 return 0;
117 int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
118 u8 *buf, int len)
120 int ret;
121 u8 buffer[len + 1];
123 struct i2c_msg msg = {
124 .addr = addr,
125 .flags = 0,
126 .buf = &buffer[0],
127 .len = len + 1
130 buffer[0] = reg;
131 memcpy(&buffer[1], buf, len);
133 ret = i2c_transfer(i2c_adap, &msg, 1);
135 if (ret != 1) {
136 ci_dbg_print("%s: i2c write error, Reg=[0x%02x], Status=%d\n",
137 __func__, reg, ret);
138 return -1;
141 return 0;
144 int netup_ci_get_mem(struct cx23885_dev *dev)
146 int mem;
147 unsigned long timeout = jiffies + msecs_to_jiffies(1);
149 for (;;) {
150 mem = cx_read(MC417_RWD);
151 if ((mem & NETUP_ACK) == 0)
152 break;
153 if (time_after(jiffies, timeout))
154 break;
155 udelay(1);
158 cx_set(MC417_RWD, NETUP_CTRL_OFF);
160 return mem & 0xff;
163 int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
164 u8 flag, u8 read, int addr, u8 data)
166 struct netup_ci_state *state = en50221->data;
167 struct cx23885_tsport *port = state->priv;
168 struct cx23885_dev *dev = port->dev;
170 u8 store;
171 int mem;
172 int ret;
174 if (0 != slot)
175 return -EINVAL;
177 if (state->current_ci_flag != flag) {
178 ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
179 0, &store, 1);
180 if (ret != 0)
181 return ret;
183 store &= ~0x0c;
184 store |= flag;
186 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
187 0, &store, 1);
188 if (ret != 0)
189 return ret;
191 state->current_ci_flag = flag;
193 mutex_lock(&dev->gpio_lock);
195 /* write addr */
196 cx_write(MC417_OEN, NETUP_EN_ALL);
197 cx_write(MC417_RWD, NETUP_CTRL_OFF |
198 NETUP_ADLO | (0xff & addr));
199 cx_clear(MC417_RWD, NETUP_ADLO);
200 cx_write(MC417_RWD, NETUP_CTRL_OFF |
201 NETUP_ADHI | (0xff & (addr >> 8)));
202 cx_clear(MC417_RWD, NETUP_ADHI);
204 if (read) { /* data in */
205 cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA);
206 } else /* data out */
207 cx_write(MC417_RWD, NETUP_CTRL_OFF | data);
209 /* choose chip */
210 cx_clear(MC417_RWD,
211 (state->ci_i2c_addr == 0x40) ? NETUP_CS0 : NETUP_CS1);
212 /* read/write */
213 cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
214 mem = netup_ci_get_mem(dev);
216 mutex_unlock(&dev->gpio_lock);
218 if (!read)
219 if (mem < 0)
220 return -EREMOTEIO;
222 ci_dbg_print("%s: %s: chipaddr=[0x%x] addr=[0x%02x], %s=%x\n", __func__,
223 (read) ? "read" : "write", state->ci_i2c_addr, addr,
224 (flag == NETUP_CI_CTL) ? "ctl" : "mem",
225 (read) ? mem : data);
227 if (read)
228 return mem;
230 return 0;
233 int netup_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
234 int slot, int addr)
236 return netup_ci_op_cam(en50221, slot, 0, NETUP_CI_RD, addr, 0);
239 int netup_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
240 int slot, int addr, u8 data)
242 return netup_ci_op_cam(en50221, slot, 0, 0, addr, data);
245 int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot, u8 addr)
247 return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL,
248 NETUP_CI_RD, addr, 0);
251 int netup_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
252 u8 addr, u8 data)
254 return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL, 0, addr, data);
257 int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
259 struct netup_ci_state *state = en50221->data;
260 u8 buf = 0x80;
261 int ret;
263 if (0 != slot)
264 return -EINVAL;
266 udelay(500);
267 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
268 0, &buf, 1);
270 if (ret != 0)
271 return ret;
273 udelay(500);
275 buf = 0x00;
276 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
277 0, &buf, 1);
279 msleep(1000);
280 dvb_ca_en50221_camready_irq(&state->ca, 0);
282 return 0;
286 int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
288 /* not implemented */
289 return 0;
292 int netup_ci_set_irq(struct dvb_ca_en50221 *en50221, u8 irq_mode)
294 struct netup_ci_state *state = en50221->data;
295 int ret;
297 if (irq_mode == state->current_irq_mode)
298 return 0;
300 ci_dbg_print("%s: chipaddr=[0x%x] setting ci IRQ to [0x%x] \n",
301 __func__, state->ci_i2c_addr, irq_mode);
302 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
303 0x1b, &irq_mode, 1);
305 if (ret != 0)
306 return ret;
308 state->current_irq_mode = irq_mode;
310 return 0;
313 int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
315 struct netup_ci_state *state = en50221->data;
316 u8 buf;
318 if (0 != slot)
319 return -EINVAL;
321 netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
322 0, &buf, 1);
323 buf |= 0x60;
325 return netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
326 0, &buf, 1);
329 /* work handler */
330 static void netup_read_ci_status(struct work_struct *work)
332 struct netup_ci_state *state =
333 container_of(work, struct netup_ci_state, work);
334 u8 buf[33];
335 int ret;
337 /* CAM module IRQ processing. fast operation */
338 dvb_ca_en50221_frda_irq(&state->ca, 0);
340 /* CAM module INSERT/REMOVE processing. slow operation because of i2c
341 * transfers */
342 if (time_after(jiffies, state->next_status_checked_time)
343 || !state->status) {
344 ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
345 0, &buf[0], 33);
347 state->next_status_checked_time = jiffies
348 + msecs_to_jiffies(1000);
350 if (ret != 0)
351 return;
353 ci_dbg_print("%s: Slot Status Addr=[0x%04x], "
354 "Reg=[0x%02x], data=%02x, "
355 "TS config = %02x\n", __func__,
356 state->ci_i2c_addr, 0, buf[0],
357 buf[0]);
360 if (buf[0] & 1)
361 state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
362 DVB_CA_EN50221_POLL_CAM_READY;
363 else
364 state->status = 0;
368 /* CI irq handler */
369 int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status)
371 struct cx23885_tsport *port = NULL;
372 struct netup_ci_state *state = NULL;
374 if (pci_status & PCI_MSK_GPIO0)
375 port = &dev->ts1;
376 else if (pci_status & PCI_MSK_GPIO1)
377 port = &dev->ts2;
378 else /* who calls ? */
379 return 0;
381 state = port->port_priv;
383 schedule_work(&state->work);
385 return 1;
388 int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot, int open)
390 struct netup_ci_state *state = en50221->data;
392 if (0 != slot)
393 return -EINVAL;
395 netup_ci_set_irq(en50221, open ? (NETUP_IRQ_DETAM | NETUP_IRQ_IRQAM)
396 : NETUP_IRQ_DETAM);
398 return state->status;
401 int netup_ci_init(struct cx23885_tsport *port)
403 struct netup_ci_state *state;
404 u8 cimax_init[34] = {
405 0x00, /* module A control*/
406 0x00, /* auto select mask high A */
407 0x00, /* auto select mask low A */
408 0x00, /* auto select pattern high A */
409 0x00, /* auto select pattern low A */
410 0x44, /* memory access time A */
411 0x00, /* invert input A */
412 0x00, /* RFU */
413 0x00, /* RFU */
414 0x00, /* module B control*/
415 0x00, /* auto select mask high B */
416 0x00, /* auto select mask low B */
417 0x00, /* auto select pattern high B */
418 0x00, /* auto select pattern low B */
419 0x44, /* memory access time B */
420 0x00, /* invert input B */
421 0x00, /* RFU */
422 0x00, /* RFU */
423 0x00, /* auto select mask high Ext */
424 0x00, /* auto select mask low Ext */
425 0x00, /* auto select pattern high Ext */
426 0x00, /* auto select pattern low Ext */
427 0x00, /* RFU */
428 0x02, /* destination - module A */
429 0x01, /* power on (use it like store place) */
430 0x00, /* RFU */
431 0x00, /* int status read only */
432 NETUP_IRQ_IRQAM | NETUP_IRQ_DETAM, /* DETAM, IRQAM unmasked */
433 0x05, /* EXTINT=active-high, INT=push-pull */
434 0x00, /* USCG1 */
435 0x04, /* ack active low */
436 0x00, /* LOCK = 0 */
437 0x33, /* serial mode, rising in, rising out, MSB first*/
438 0x31, /* syncronization */
440 int ret;
442 ci_dbg_print("%s\n", __func__);
443 state = kzalloc(sizeof(struct netup_ci_state), GFP_KERNEL);
444 if (!state) {
445 ci_dbg_print("%s: Unable create CI structure!\n", __func__);
446 ret = -ENOMEM;
447 goto err;
450 port->port_priv = state;
452 switch (port->nr) {
453 case 1:
454 state->ci_i2c_addr = 0x40;
455 break;
456 case 2:
457 state->ci_i2c_addr = 0x41;
458 break;
461 state->i2c_adap = &port->dev->i2c_bus[0].i2c_adap;
462 state->ca.owner = THIS_MODULE;
463 state->ca.read_attribute_mem = netup_ci_read_attribute_mem;
464 state->ca.write_attribute_mem = netup_ci_write_attribute_mem;
465 state->ca.read_cam_control = netup_ci_read_cam_ctl;
466 state->ca.write_cam_control = netup_ci_write_cam_ctl;
467 state->ca.slot_reset = netup_ci_slot_reset;
468 state->ca.slot_shutdown = netup_ci_slot_shutdown;
469 state->ca.slot_ts_enable = netup_ci_slot_ts_ctl;
470 state->ca.poll_slot_status = netup_poll_ci_slot_status;
471 state->ca.data = state;
472 state->priv = port;
473 state->current_irq_mode = NETUP_IRQ_IRQAM | NETUP_IRQ_DETAM;
475 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
476 0, &cimax_init[0], 34);
477 /* lock registers */
478 ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
479 0x1f, &cimax_init[0x18], 1);
480 /* power on slots */
481 ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
482 0x18, &cimax_init[0x18], 1);
484 if (0 != ret)
485 goto err;
487 ret = dvb_ca_en50221_init(&port->frontends.adapter,
488 &state->ca,
489 /* flags */ 0,
490 /* n_slots */ 1);
491 if (0 != ret)
492 goto err;
494 INIT_WORK(&state->work, netup_read_ci_status);
495 schedule_work(&state->work);
497 ci_dbg_print("%s: CI initialized!\n", __func__);
499 return 0;
500 err:
501 ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
502 kfree(state);
503 return ret;
506 void netup_ci_exit(struct cx23885_tsport *port)
508 struct netup_ci_state *state;
510 if (NULL == port)
511 return;
513 state = (struct netup_ci_state *)port->port_priv;
514 if (NULL == state)
515 return;
517 if (NULL == state->ca.data)
518 return;
520 dvb_ca_en50221_release(&state->ca);
521 kfree(state);