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Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
[linux/fpc-iii.git] / sound / soc / codecs / wm8753.c
blobfeb2997a377aa0a0fe12df1c6b44384c4ff3f3fb
1 /*
2 * wm8753.c -- WM8753 ALSA Soc Audio driver
3 *
4 * Copyright 2003-11 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * Notes:
13 * The WM8753 is a low power, high quality stereo codec with integrated PCM
14 * codec designed for portable digital telephony applications.
15 *
16 * Dual DAI:-
17 *
18 * This driver support 2 DAI PCM's. This makes the default PCM available for
19 * HiFi audio (e.g. MP3, ogg) playback/capture and the other PCM available for
20 * voice.
21 *
22 * Please note that the voice PCM can be connected directly to a Bluetooth
23 * codec or GSM modem and thus cannot be read or written to, although it is
24 * available to be configured with snd_hw_params(), etc and kcontrols in the
25 * normal alsa manner.
26 *
27 * Fast DAI switching:-
28 *
29 * The driver can now fast switch between the DAI configurations via a
30 * an alsa kcontrol. This allows the PCM to remain open.
31 *
32 */
33
34 #include <linux/module.h>
35 #include <linux/moduleparam.h>
36 #include <linux/kernel.h>
37 #include <linux/init.h>
38 #include <linux/delay.h>
39 #include <linux/pm.h>
40 #include <linux/i2c.h>
41 #include <linux/of_device.h>
42 #include <linux/regmap.h>
43 #include <linux/spi/spi.h>
44 #include <linux/slab.h>
45 #include <sound/core.h>
46 #include <sound/pcm.h>
47 #include <sound/pcm_params.h>
48 #include <sound/soc.h>
49 #include <sound/initval.h>
50 #include <sound/tlv.h>
51 #include <asm/div64.h>
52
53 #include "wm8753.h"
54
55 static int caps_charge = 2000;
56 module_param(caps_charge, int, 0);
57 MODULE_PARM_DESC(caps_charge, "WM8753 cap charge time (msecs)");
58
59 static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
60 unsigned int fmt);
61 static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
62 unsigned int fmt);
63
64 /*
65 * wm8753 register cache
66 * We can't read the WM8753 register space when we
67 * are using 2 wire for device control, so we cache them instead.
68 */
69 static const struct reg_default wm8753_reg_defaults[] = {
70 { 0x00, 0x0000 },
71 { 0x01, 0x0008 },
72 { 0x02, 0x0000 },
73 { 0x03, 0x000a },
74 { 0x04, 0x000a },
75 { 0x05, 0x0033 },
76 { 0x06, 0x0000 },
77 { 0x07, 0x0007 },
78 { 0x08, 0x00ff },
79 { 0x09, 0x00ff },
80 { 0x0a, 0x000f },
81 { 0x0b, 0x000f },
82 { 0x0c, 0x007b },
83 { 0x0d, 0x0000 },
84 { 0x0e, 0x0032 },
85 { 0x0f, 0x0000 },
86 { 0x10, 0x00c3 },
87 { 0x11, 0x00c3 },
88 { 0x12, 0x00c0 },
89 { 0x13, 0x0000 },
90 { 0x14, 0x0000 },
91 { 0x15, 0x0000 },
92 { 0x16, 0x0000 },
93 { 0x17, 0x0000 },
94 { 0x18, 0x0000 },
95 { 0x19, 0x0000 },
96 { 0x1a, 0x0000 },
97 { 0x1b, 0x0000 },
98 { 0x1c, 0x0000 },
99 { 0x1d, 0x0000 },
100 { 0x1e, 0x0000 },
101 { 0x1f, 0x0000 },
102 { 0x20, 0x0055 },
103 { 0x21, 0x0005 },
104 { 0x22, 0x0050 },
105 { 0x23, 0x0055 },
106 { 0x24, 0x0050 },
107 { 0x25, 0x0055 },
108 { 0x26, 0x0050 },
109 { 0x27, 0x0055 },
110 { 0x28, 0x0079 },
111 { 0x29, 0x0079 },
112 { 0x2a, 0x0079 },
113 { 0x2b, 0x0079 },
114 { 0x2c, 0x0079 },
115 { 0x2d, 0x0000 },
116 { 0x2e, 0x0000 },
117 { 0x2f, 0x0000 },
118 { 0x30, 0x0000 },
119 { 0x31, 0x0097 },
120 { 0x32, 0x0097 },
121 { 0x33, 0x0000 },
122 { 0x34, 0x0004 },
123 { 0x35, 0x0000 },
124 { 0x36, 0x0083 },
125 { 0x37, 0x0024 },
126 { 0x38, 0x01ba },
127 { 0x39, 0x0000 },
128 { 0x3a, 0x0083 },
129 { 0x3b, 0x0024 },
130 { 0x3c, 0x01ba },
131 { 0x3d, 0x0000 },
132 { 0x3e, 0x0000 },
133 { 0x3f, 0x0000 },
134 };
135
136 static bool wm8753_volatile(struct device *dev, unsigned int reg)
137 {
138 return reg == WM8753_RESET;
139 }
140
141 static bool wm8753_writeable(struct device *dev, unsigned int reg)
142 {
143 return reg <= WM8753_ADCTL2;
144 }
145
146 /* codec private data */
147 struct wm8753_priv {
148 struct regmap *regmap;
149 unsigned int sysclk;
150 unsigned int pcmclk;
151
152 unsigned int voice_fmt;
153 unsigned int hifi_fmt;
154
155 int dai_func;
156 struct delayed_work charge_work;
157 };
158
159 #define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0)
160
161 /*
162 * WM8753 Controls
163 */
164 static const char *wm8753_base[] = {"Linear Control", "Adaptive Boost"};
165 static const char *wm8753_base_filter[] =
166 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
167 "100Hz @ 8kHz", "200Hz @ 8kHz"};
168 static const char *wm8753_treble[] = {"8kHz", "4kHz"};
169 static const char *wm8753_alc_func[] = {"Off", "Right", "Left", "Stereo"};
170 static const char *wm8753_ng_type[] = {"Constant PGA Gain", "Mute ADC Output"};
171 static const char *wm8753_3d_func[] = {"Capture", "Playback"};
172 static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
173 static const char *wm8753_3d_lc[] = {"200Hz", "500Hz"};
174 static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
175 static const char *wm8753_mono_mix[] = {"Stereo", "Left", "Right", "Mono"};
176 static const char *wm8753_dac_phase[] = {"Non Inverted", "Inverted"};
177 static const char *wm8753_line_mix[] = {"Line 1 + 2", "Line 1 - 2",
178 "Line 1", "Line 2"};
179 static const char *wm8753_mono_mux[] = {"Line Mix", "Rx Mix"};
180 static const char *wm8753_right_mux[] = {"Line 2", "Rx Mix"};
181 static const char *wm8753_left_mux[] = {"Line 1", "Rx Mix"};
182 static const char *wm8753_rxmsel[] = {"RXP - RXN", "RXP + RXN", "RXP", "RXN"};
183 static const char *wm8753_sidetone_mux[] = {"Left PGA", "Mic 1", "Mic 2",
184 "Right PGA"};
185 static const char *wm8753_mono2_src[] = {"Inverted Mono 1", "Left", "Right",
186 "Left + Right"};
187 static const char *wm8753_out3[] = {"VREF", "ROUT2", "Left + Right"};
188 static const char *wm8753_out4[] = {"VREF", "Capture ST", "LOUT2"};
189 static const char *wm8753_radcsel[] = {"PGA", "Line or RXP-RXN", "Sidetone"};
190 static const char *wm8753_ladcsel[] = {"PGA", "Line or RXP-RXN", "Line"};
191 static const char *wm8753_mono_adc[] = {"Stereo", "Analogue Mix Left",
192 "Analogue Mix Right", "Digital Mono Mix"};
193 static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
194 "82Hz @ 8kHz", "170Hz @ 8kHz"};
195 static const char *wm8753_adc_filter[] = {"HiFi", "Voice"};
196 static const char *wm8753_mic_sel[] = {"Mic 1", "Mic 2", "Mic 3"};
197 static const char *wm8753_dai_mode[] = {"DAI 0", "DAI 1", "DAI 2", "DAI 3"};
198 static const char *wm8753_dat_sel[] = {"Stereo", "Left ADC", "Right ADC",
199 "Channel Swap"};
200 static const char *wm8753_rout2_phase[] = {"Non Inverted", "Inverted"};
201
202 static const struct soc_enum wm8753_enum[] = {
203 SOC_ENUM_SINGLE(WM8753_BASS, 7, 2, wm8753_base),
204 SOC_ENUM_SINGLE(WM8753_BASS, 4, 6, wm8753_base_filter),
205 SOC_ENUM_SINGLE(WM8753_TREBLE, 6, 2, wm8753_treble),
206 SOC_ENUM_SINGLE(WM8753_ALC1, 7, 4, wm8753_alc_func),
207 SOC_ENUM_SINGLE(WM8753_NGATE, 1, 2, wm8753_ng_type),
208 SOC_ENUM_SINGLE(WM8753_3D, 7, 2, wm8753_3d_func),
209 SOC_ENUM_SINGLE(WM8753_3D, 6, 2, wm8753_3d_uc),
210 SOC_ENUM_SINGLE(WM8753_3D, 5, 2, wm8753_3d_lc),
211 SOC_ENUM_SINGLE(WM8753_DAC, 1, 4, wm8753_deemp),
212 SOC_ENUM_SINGLE(WM8753_DAC, 4, 4, wm8753_mono_mix),
213 SOC_ENUM_SINGLE(WM8753_DAC, 6, 2, wm8753_dac_phase),
214 SOC_ENUM_SINGLE(WM8753_INCTL1, 3, 4, wm8753_line_mix),
215 SOC_ENUM_SINGLE(WM8753_INCTL1, 2, 2, wm8753_mono_mux),
216 SOC_ENUM_SINGLE(WM8753_INCTL1, 1, 2, wm8753_right_mux),
217 SOC_ENUM_SINGLE(WM8753_INCTL1, 0, 2, wm8753_left_mux),
218 SOC_ENUM_SINGLE(WM8753_INCTL2, 6, 4, wm8753_rxmsel),
219 SOC_ENUM_SINGLE(WM8753_INCTL2, 4, 4, wm8753_sidetone_mux),
220 SOC_ENUM_SINGLE(WM8753_OUTCTL, 7, 4, wm8753_mono2_src),
221 SOC_ENUM_SINGLE(WM8753_OUTCTL, 0, 3, wm8753_out3),
222 SOC_ENUM_SINGLE(WM8753_ADCTL2, 7, 3, wm8753_out4),
223 SOC_ENUM_SINGLE(WM8753_ADCIN, 2, 3, wm8753_radcsel),
224 SOC_ENUM_SINGLE(WM8753_ADCIN, 0, 3, wm8753_ladcsel),
225 SOC_ENUM_SINGLE(WM8753_ADCIN, 4, 4, wm8753_mono_adc),
226 SOC_ENUM_SINGLE(WM8753_ADC, 2, 4, wm8753_adc_hp),
227 SOC_ENUM_SINGLE(WM8753_ADC, 4, 2, wm8753_adc_filter),
228 SOC_ENUM_SINGLE(WM8753_MICBIAS, 6, 3, wm8753_mic_sel),
229 SOC_ENUM_SINGLE(WM8753_IOCTL, 2, 4, wm8753_dai_mode),
230 SOC_ENUM_SINGLE(WM8753_ADC, 7, 4, wm8753_dat_sel),
231 SOC_ENUM_SINGLE(WM8753_OUTCTL, 2, 2, wm8753_rout2_phase),
232 };
233
234
235 static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
236 struct snd_ctl_elem_value *ucontrol)
237 {
238 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
239 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
240
241 ucontrol->value.integer.value[0] = wm8753->dai_func;
242 return 0;
243 }
244
245 static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
246 struct snd_ctl_elem_value *ucontrol)
247 {
248 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
249 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
250 u16 ioctl;
251
252 if (wm8753->dai_func == ucontrol->value.integer.value[0])
253 return 0;
254
255 if (snd_soc_codec_is_active(codec))
256 return -EBUSY;
257
258 ioctl = snd_soc_read(codec, WM8753_IOCTL);
259
260 wm8753->dai_func = ucontrol->value.integer.value[0];
261
262 if (((ioctl >> 2) & 0x3) == wm8753->dai_func)
263 return 1;
264
265 ioctl = (ioctl & 0x1f3) | (wm8753->dai_func << 2);
266 snd_soc_write(codec, WM8753_IOCTL, ioctl);
267
268
269 wm8753_hifi_write_dai_fmt(codec, wm8753->hifi_fmt);
270 wm8753_voice_write_dai_fmt(codec, wm8753->voice_fmt);
271
272 return 1;
273 }
274
275 static const DECLARE_TLV_DB_SCALE(rec_mix_tlv, -1500, 300, 0);
276 static const DECLARE_TLV_DB_SCALE(mic_preamp_tlv, 1200, 600, 0);
277 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
278 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
279 static const unsigned int out_tlv[] = {
280 TLV_DB_RANGE_HEAD(2),
281 /* 0000000 - 0101111 = "Analogue mute" */
282 0, 48, TLV_DB_SCALE_ITEM(-25500, 0, 0),
283 48, 127, TLV_DB_SCALE_ITEM(-7300, 100, 0),
284 };
285 static const DECLARE_TLV_DB_SCALE(mix_tlv, -1500, 300, 0);
286 static const DECLARE_TLV_DB_SCALE(voice_mix_tlv, -1200, 300, 0);
287 static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
288
289 static const struct snd_kcontrol_new wm8753_snd_controls[] = {
290 SOC_DOUBLE_R_TLV("PCM Volume", WM8753_LDAC, WM8753_RDAC, 0, 255, 0, dac_tlv),
291
292 SOC_DOUBLE_R_TLV("ADC Capture Volume", WM8753_LADC, WM8753_RADC, 0, 255, 0,
293 adc_tlv),
294
295 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8753_LOUT1V, WM8753_ROUT1V,
296 0, 127, 0, out_tlv),
297 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8753_LOUT2V, WM8753_ROUT2V, 0,
298 127, 0, out_tlv),
299
300 SOC_SINGLE_TLV("Mono Playback Volume", WM8753_MOUTV, 0, 127, 0, out_tlv),
301
302 SOC_DOUBLE_R_TLV("Bypass Playback Volume", WM8753_LOUTM1, WM8753_ROUTM1, 4, 7,
303 1, mix_tlv),
304 SOC_DOUBLE_R_TLV("Sidetone Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 4,
305 7, 1, mix_tlv),
306 SOC_DOUBLE_R_TLV("Voice Playback Volume", WM8753_LOUTM2, WM8753_ROUTM2, 0, 7,
307 1, voice_mix_tlv),
308
309 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8753_LOUT1V, WM8753_ROUT1V, 7,
310 1, 0),
311 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8753_LOUT2V, WM8753_ROUT2V, 7,
312 1, 0),
313
314 SOC_SINGLE_TLV("Mono Bypass Playback Volume", WM8753_MOUTM1, 4, 7, 1, mix_tlv),
315 SOC_SINGLE_TLV("Mono Sidetone Playback Volume", WM8753_MOUTM2, 4, 7, 1,
316 mix_tlv),
317 SOC_SINGLE_TLV("Mono Voice Playback Volume", WM8753_MOUTM2, 0, 7, 1,
318 voice_mix_tlv),
319 SOC_SINGLE("Mono Playback ZC Switch", WM8753_MOUTV, 7, 1, 0),
320
321 SOC_ENUM("Bass Boost", wm8753_enum[0]),
322 SOC_ENUM("Bass Filter", wm8753_enum[1]),
323 SOC_SINGLE("Bass Volume", WM8753_BASS, 0, 15, 1),
324
325 SOC_SINGLE("Treble Volume", WM8753_TREBLE, 0, 15, 1),
326 SOC_ENUM("Treble Cut-off", wm8753_enum[2]),
327
328 SOC_DOUBLE_TLV("Sidetone Capture Volume", WM8753_RECMIX1, 0, 4, 7, 1,
329 rec_mix_tlv),
330 SOC_SINGLE_TLV("Voice Sidetone Capture Volume", WM8753_RECMIX2, 0, 7, 1,
331 rec_mix_tlv),
332
333 SOC_DOUBLE_R_TLV("Capture Volume", WM8753_LINVOL, WM8753_RINVOL, 0, 63, 0,
334 pga_tlv),
335 SOC_DOUBLE_R("Capture ZC Switch", WM8753_LINVOL, WM8753_RINVOL, 6, 1, 0),
336 SOC_DOUBLE_R("Capture Switch", WM8753_LINVOL, WM8753_RINVOL, 7, 1, 1),
337
338 SOC_ENUM("Capture Filter Select", wm8753_enum[23]),
339 SOC_ENUM("Capture Filter Cut-off", wm8753_enum[24]),
340 SOC_SINGLE("Capture Filter Switch", WM8753_ADC, 0, 1, 1),
341
342 SOC_SINGLE("ALC Capture Target Volume", WM8753_ALC1, 0, 7, 0),
343 SOC_SINGLE("ALC Capture Max Volume", WM8753_ALC1, 4, 7, 0),
344 SOC_ENUM("ALC Capture Function", wm8753_enum[3]),
345 SOC_SINGLE("ALC Capture ZC Switch", WM8753_ALC2, 8, 1, 0),
346 SOC_SINGLE("ALC Capture Hold Time", WM8753_ALC2, 0, 15, 1),
347 SOC_SINGLE("ALC Capture Decay Time", WM8753_ALC3, 4, 15, 1),
348 SOC_SINGLE("ALC Capture Attack Time", WM8753_ALC3, 0, 15, 0),
349 SOC_SINGLE("ALC Capture NG Threshold", WM8753_NGATE, 3, 31, 0),
350 SOC_ENUM("ALC Capture NG Type", wm8753_enum[4]),
351 SOC_SINGLE("ALC Capture NG Switch", WM8753_NGATE, 0, 1, 0),
352
353 SOC_ENUM("3D Function", wm8753_enum[5]),
354 SOC_ENUM("3D Upper Cut-off", wm8753_enum[6]),
355 SOC_ENUM("3D Lower Cut-off", wm8753_enum[7]),
356 SOC_SINGLE("3D Volume", WM8753_3D, 1, 15, 0),
357 SOC_SINGLE("3D Switch", WM8753_3D, 0, 1, 0),
358
359 SOC_SINGLE("Capture 6dB Attenuate", WM8753_ADCTL1, 2, 1, 0),
360 SOC_SINGLE("Playback 6dB Attenuate", WM8753_ADCTL1, 1, 1, 0),
361
362 SOC_ENUM("De-emphasis", wm8753_enum[8]),
363 SOC_ENUM("Playback Mono Mix", wm8753_enum[9]),
364 SOC_ENUM("Playback Phase", wm8753_enum[10]),
365
366 SOC_SINGLE_TLV("Mic2 Capture Volume", WM8753_INCTL1, 7, 3, 0, mic_preamp_tlv),
367 SOC_SINGLE_TLV("Mic1 Capture Volume", WM8753_INCTL1, 5, 3, 0, mic_preamp_tlv),
368
369 SOC_ENUM_EXT("DAI Mode", wm8753_enum[26], wm8753_get_dai, wm8753_set_dai),
370
371 SOC_ENUM("ADC Data Select", wm8753_enum[27]),
372 SOC_ENUM("ROUT2 Phase", wm8753_enum[28]),
373 };
374
375 /*
376 * _DAPM_ Controls
377 */
378
379 /* Left Mixer */
380 static const struct snd_kcontrol_new wm8753_left_mixer_controls[] = {
381 SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_LOUTM2, 8, 1, 0),
382 SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_LOUTM2, 7, 1, 0),
383 SOC_DAPM_SINGLE("Left Playback Switch", WM8753_LOUTM1, 8, 1, 0),
384 SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_LOUTM1, 7, 1, 0),
385 };
386
387 /* Right mixer */
388 static const struct snd_kcontrol_new wm8753_right_mixer_controls[] = {
389 SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_ROUTM2, 8, 1, 0),
390 SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_ROUTM2, 7, 1, 0),
391 SOC_DAPM_SINGLE("Right Playback Switch", WM8753_ROUTM1, 8, 1, 0),
392 SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_ROUTM1, 7, 1, 0),
393 };
394
395 /* Mono mixer */
396 static const struct snd_kcontrol_new wm8753_mono_mixer_controls[] = {
397 SOC_DAPM_SINGLE("Left Playback Switch", WM8753_MOUTM1, 8, 1, 0),
398 SOC_DAPM_SINGLE("Right Playback Switch", WM8753_MOUTM2, 8, 1, 0),
399 SOC_DAPM_SINGLE("Voice Playback Switch", WM8753_MOUTM2, 3, 1, 0),
400 SOC_DAPM_SINGLE("Sidetone Playback Switch", WM8753_MOUTM2, 7, 1, 0),
401 SOC_DAPM_SINGLE("Bypass Playback Switch", WM8753_MOUTM1, 7, 1, 0),
402 };
403
404 /* Mono 2 Mux */
405 static const struct snd_kcontrol_new wm8753_mono2_controls =
406 SOC_DAPM_ENUM("Route", wm8753_enum[17]);
407
408 /* Out 3 Mux */
409 static const struct snd_kcontrol_new wm8753_out3_controls =
410 SOC_DAPM_ENUM("Route", wm8753_enum[18]);
411
412 /* Out 4 Mux */
413 static const struct snd_kcontrol_new wm8753_out4_controls =
414 SOC_DAPM_ENUM("Route", wm8753_enum[19]);
415
416 /* ADC Mono Mix */
417 static const struct snd_kcontrol_new wm8753_adc_mono_controls =
418 SOC_DAPM_ENUM("Route", wm8753_enum[22]);
419
420 /* Record mixer */
421 static const struct snd_kcontrol_new wm8753_record_mixer_controls[] = {
422 SOC_DAPM_SINGLE("Voice Capture Switch", WM8753_RECMIX2, 3, 1, 0),
423 SOC_DAPM_SINGLE("Left Capture Switch", WM8753_RECMIX1, 3, 1, 0),
424 SOC_DAPM_SINGLE("Right Capture Switch", WM8753_RECMIX1, 7, 1, 0),
425 };
426
427 /* Left ADC mux */
428 static const struct snd_kcontrol_new wm8753_adc_left_controls =
429 SOC_DAPM_ENUM("Route", wm8753_enum[21]);
430
431 /* Right ADC mux */
432 static const struct snd_kcontrol_new wm8753_adc_right_controls =
433 SOC_DAPM_ENUM("Route", wm8753_enum[20]);
434
435 /* MIC mux */
436 static const struct snd_kcontrol_new wm8753_mic_mux_controls =
437 SOC_DAPM_ENUM("Route", wm8753_enum[16]);
438
439 /* ALC mixer */
440 static const struct snd_kcontrol_new wm8753_alc_mixer_controls[] = {
441 SOC_DAPM_SINGLE("Line Capture Switch", WM8753_INCTL2, 3, 1, 0),
442 SOC_DAPM_SINGLE("Mic2 Capture Switch", WM8753_INCTL2, 2, 1, 0),
443 SOC_DAPM_SINGLE("Mic1 Capture Switch", WM8753_INCTL2, 1, 1, 0),
444 SOC_DAPM_SINGLE("Rx Capture Switch", WM8753_INCTL2, 0, 1, 0),
445 };
446
447 /* Left Line mux */
448 static const struct snd_kcontrol_new wm8753_line_left_controls =
449 SOC_DAPM_ENUM("Route", wm8753_enum[14]);
450
451 /* Right Line mux */
452 static const struct snd_kcontrol_new wm8753_line_right_controls =
453 SOC_DAPM_ENUM("Route", wm8753_enum[13]);
454
455 /* Mono Line mux */
456 static const struct snd_kcontrol_new wm8753_line_mono_controls =
457 SOC_DAPM_ENUM("Route", wm8753_enum[12]);
458
459 /* Line mux and mixer */
460 static const struct snd_kcontrol_new wm8753_line_mux_mix_controls =
461 SOC_DAPM_ENUM("Route", wm8753_enum[11]);
462
463 /* Rx mux and mixer */
464 static const struct snd_kcontrol_new wm8753_rx_mux_mix_controls =
465 SOC_DAPM_ENUM("Route", wm8753_enum[15]);
466
467 /* Mic Selector Mux */
468 static const struct snd_kcontrol_new wm8753_mic_sel_mux_controls =
469 SOC_DAPM_ENUM("Route", wm8753_enum[25]);
470
471 static const struct snd_soc_dapm_widget wm8753_dapm_widgets[] = {
472 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8753_PWR1, 5, 0),
473 SND_SOC_DAPM_MIXER("Left Mixer", WM8753_PWR4, 0, 0,
474 &wm8753_left_mixer_controls[0], ARRAY_SIZE(wm8753_left_mixer_controls)),
475 SND_SOC_DAPM_PGA("Left Out 1", WM8753_PWR3, 8, 0, NULL, 0),
476 SND_SOC_DAPM_PGA("Left Out 2", WM8753_PWR3, 6, 0, NULL, 0),
477 SND_SOC_DAPM_DAC("Left DAC", "Left HiFi Playback", WM8753_PWR1, 3, 0),
478 SND_SOC_DAPM_OUTPUT("LOUT1"),
479 SND_SOC_DAPM_OUTPUT("LOUT2"),
480 SND_SOC_DAPM_MIXER("Right Mixer", WM8753_PWR4, 1, 0,
481 &wm8753_right_mixer_controls[0], ARRAY_SIZE(wm8753_right_mixer_controls)),
482 SND_SOC_DAPM_PGA("Right Out 1", WM8753_PWR3, 7, 0, NULL, 0),
483 SND_SOC_DAPM_PGA("Right Out 2", WM8753_PWR3, 5, 0, NULL, 0),
484 SND_SOC_DAPM_DAC("Right DAC", "Right HiFi Playback", WM8753_PWR1, 2, 0),
485 SND_SOC_DAPM_OUTPUT("ROUT1"),
486 SND_SOC_DAPM_OUTPUT("ROUT2"),
487 SND_SOC_DAPM_MIXER("Mono Mixer", WM8753_PWR4, 2, 0,
488 &wm8753_mono_mixer_controls[0], ARRAY_SIZE(wm8753_mono_mixer_controls)),
489 SND_SOC_DAPM_PGA("Mono Out 1", WM8753_PWR3, 2, 0, NULL, 0),
490 SND_SOC_DAPM_PGA("Mono Out 2", WM8753_PWR3, 1, 0, NULL, 0),
491 SND_SOC_DAPM_DAC("Voice DAC", "Voice Playback", WM8753_PWR1, 4, 0),
492 SND_SOC_DAPM_OUTPUT("MONO1"),
493 SND_SOC_DAPM_MUX("Mono 2 Mux", SND_SOC_NOPM, 0, 0, &wm8753_mono2_controls),
494 SND_SOC_DAPM_OUTPUT("MONO2"),
495 SND_SOC_DAPM_MIXER("Out3 Left + Right", -1, 0, 0, NULL, 0),
496 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out3_controls),
497 SND_SOC_DAPM_PGA("Out 3", WM8753_PWR3, 4, 0, NULL, 0),
498 SND_SOC_DAPM_OUTPUT("OUT3"),
499 SND_SOC_DAPM_MUX("Out4 Mux", SND_SOC_NOPM, 0, 0, &wm8753_out4_controls),
500 SND_SOC_DAPM_PGA("Out 4", WM8753_PWR3, 3, 0, NULL, 0),
501 SND_SOC_DAPM_OUTPUT("OUT4"),
502 SND_SOC_DAPM_MIXER("Playback Mixer", WM8753_PWR4, 3, 0,
503 &wm8753_record_mixer_controls[0],
504 ARRAY_SIZE(wm8753_record_mixer_controls)),
505 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8753_PWR2, 3, 0),
506 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8753_PWR2, 2, 0),
507 SND_SOC_DAPM_MUX("Capture Left Mixer", SND_SOC_NOPM, 0, 0,
508 &wm8753_adc_mono_controls),
509 SND_SOC_DAPM_MUX("Capture Right Mixer", SND_SOC_NOPM, 0, 0,
510 &wm8753_adc_mono_controls),
511 SND_SOC_DAPM_MUX("Capture Left Mux", SND_SOC_NOPM, 0, 0,
512 &wm8753_adc_left_controls),
513 SND_SOC_DAPM_MUX("Capture Right Mux", SND_SOC_NOPM, 0, 0,
514 &wm8753_adc_right_controls),
515 SND_SOC_DAPM_MUX("Mic Sidetone Mux", SND_SOC_NOPM, 0, 0,
516 &wm8753_mic_mux_controls),
517 SND_SOC_DAPM_PGA("Left Capture Volume", WM8753_PWR2, 5, 0, NULL, 0),
518 SND_SOC_DAPM_PGA("Right Capture Volume", WM8753_PWR2, 4, 0, NULL, 0),
519 SND_SOC_DAPM_MIXER("ALC Mixer", WM8753_PWR2, 6, 0,
520 &wm8753_alc_mixer_controls[0], ARRAY_SIZE(wm8753_alc_mixer_controls)),
521 SND_SOC_DAPM_MUX("Line Left Mux", SND_SOC_NOPM, 0, 0,
522 &wm8753_line_left_controls),
523 SND_SOC_DAPM_MUX("Line Right Mux", SND_SOC_NOPM, 0, 0,
524 &wm8753_line_right_controls),
525 SND_SOC_DAPM_MUX("Line Mono Mux", SND_SOC_NOPM, 0, 0,
526 &wm8753_line_mono_controls),
527 SND_SOC_DAPM_MUX("Line Mixer", WM8753_PWR2, 0, 0,
528 &wm8753_line_mux_mix_controls),
529 SND_SOC_DAPM_MUX("Rx Mixer", WM8753_PWR2, 1, 0,
530 &wm8753_rx_mux_mix_controls),
531 SND_SOC_DAPM_PGA("Mic 1 Volume", WM8753_PWR2, 8, 0, NULL, 0),
532 SND_SOC_DAPM_PGA("Mic 2 Volume", WM8753_PWR2, 7, 0, NULL, 0),
533 SND_SOC_DAPM_MUX("Mic Selection Mux", SND_SOC_NOPM, 0, 0,
534 &wm8753_mic_sel_mux_controls),
535 SND_SOC_DAPM_INPUT("LINE1"),
536 SND_SOC_DAPM_INPUT("LINE2"),
537 SND_SOC_DAPM_INPUT("RXP"),
538 SND_SOC_DAPM_INPUT("RXN"),
539 SND_SOC_DAPM_INPUT("ACIN"),
540 SND_SOC_DAPM_OUTPUT("ACOP"),
541 SND_SOC_DAPM_INPUT("MIC1N"),
542 SND_SOC_DAPM_INPUT("MIC1"),
543 SND_SOC_DAPM_INPUT("MIC2N"),
544 SND_SOC_DAPM_INPUT("MIC2"),
545 SND_SOC_DAPM_VMID("VREF"),
546 };
547
548 static const struct snd_soc_dapm_route wm8753_dapm_routes[] = {
549 /* left mixer */
550 {"Left Mixer", "Left Playback Switch", "Left DAC"},
551 {"Left Mixer", "Voice Playback Switch", "Voice DAC"},
552 {"Left Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
553 {"Left Mixer", "Bypass Playback Switch", "Line Left Mux"},
554
555 /* right mixer */
556 {"Right Mixer", "Right Playback Switch", "Right DAC"},
557 {"Right Mixer", "Voice Playback Switch", "Voice DAC"},
558 {"Right Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
559 {"Right Mixer", "Bypass Playback Switch", "Line Right Mux"},
560
561 /* mono mixer */
562 {"Mono Mixer", "Voice Playback Switch", "Voice DAC"},
563 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
564 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
565 {"Mono Mixer", "Sidetone Playback Switch", "Mic Sidetone Mux"},
566 {"Mono Mixer", "Bypass Playback Switch", "Line Mono Mux"},
567
568 /* left out */
569 {"Left Out 1", NULL, "Left Mixer"},
570 {"Left Out 2", NULL, "Left Mixer"},
571 {"LOUT1", NULL, "Left Out 1"},
572 {"LOUT2", NULL, "Left Out 2"},
573
574 /* right out */
575 {"Right Out 1", NULL, "Right Mixer"},
576 {"Right Out 2", NULL, "Right Mixer"},
577 {"ROUT1", NULL, "Right Out 1"},
578 {"ROUT2", NULL, "Right Out 2"},
579
580 /* mono 1 out */
581 {"Mono Out 1", NULL, "Mono Mixer"},
582 {"MONO1", NULL, "Mono Out 1"},
583
584 /* mono 2 out */
585 {"Mono 2 Mux", "Left + Right", "Out3 Left + Right"},
586 {"Mono 2 Mux", "Inverted Mono 1", "MONO1"},
587 {"Mono 2 Mux", "Left", "Left Mixer"},
588 {"Mono 2 Mux", "Right", "Right Mixer"},
589 {"Mono Out 2", NULL, "Mono 2 Mux"},
590 {"MONO2", NULL, "Mono Out 2"},
591
592 /* out 3 */
593 {"Out3 Left + Right", NULL, "Left Mixer"},
594 {"Out3 Left + Right", NULL, "Right Mixer"},
595 {"Out3 Mux", "VREF", "VREF"},
596 {"Out3 Mux", "Left + Right", "Out3 Left + Right"},
597 {"Out3 Mux", "ROUT2", "ROUT2"},
598 {"Out 3", NULL, "Out3 Mux"},
599 {"OUT3", NULL, "Out 3"},
600
601 /* out 4 */
602 {"Out4 Mux", "VREF", "VREF"},
603 {"Out4 Mux", "Capture ST", "Playback Mixer"},
604 {"Out4 Mux", "LOUT2", "LOUT2"},
605 {"Out 4", NULL, "Out4 Mux"},
606 {"OUT4", NULL, "Out 4"},
607
608 /* record mixer */
609 {"Playback Mixer", "Left Capture Switch", "Left Mixer"},
610 {"Playback Mixer", "Voice Capture Switch", "Mono Mixer"},
611 {"Playback Mixer", "Right Capture Switch", "Right Mixer"},
612
613 /* Mic/SideTone Mux */
614 {"Mic Sidetone Mux", "Left PGA", "Left Capture Volume"},
615 {"Mic Sidetone Mux", "Right PGA", "Right Capture Volume"},
616 {"Mic Sidetone Mux", "Mic 1", "Mic 1 Volume"},
617 {"Mic Sidetone Mux", "Mic 2", "Mic 2 Volume"},
618
619 /* Capture Left Mux */
620 {"Capture Left Mux", "PGA", "Left Capture Volume"},
621 {"Capture Left Mux", "Line or RXP-RXN", "Line Left Mux"},
622 {"Capture Left Mux", "Line", "LINE1"},
623
624 /* Capture Right Mux */
625 {"Capture Right Mux", "PGA", "Right Capture Volume"},
626 {"Capture Right Mux", "Line or RXP-RXN", "Line Right Mux"},
627 {"Capture Right Mux", "Sidetone", "Playback Mixer"},
628
629 /* Mono Capture mixer-mux */
630 {"Capture Right Mixer", "Stereo", "Capture Right Mux"},
631 {"Capture Left Mixer", "Stereo", "Capture Left Mux"},
632 {"Capture Left Mixer", "Analogue Mix Left", "Capture Left Mux"},
633 {"Capture Left Mixer", "Analogue Mix Left", "Capture Right Mux"},
634 {"Capture Right Mixer", "Analogue Mix Right", "Capture Left Mux"},
635 {"Capture Right Mixer", "Analogue Mix Right", "Capture Right Mux"},
636 {"Capture Left Mixer", "Digital Mono Mix", "Capture Left Mux"},
637 {"Capture Left Mixer", "Digital Mono Mix", "Capture Right Mux"},
638 {"Capture Right Mixer", "Digital Mono Mix", "Capture Left Mux"},
639 {"Capture Right Mixer", "Digital Mono Mix", "Capture Right Mux"},
640
641 /* ADC */
642 {"Left ADC", NULL, "Capture Left Mixer"},
643 {"Right ADC", NULL, "Capture Right Mixer"},
644
645 /* Left Capture Volume */
646 {"Left Capture Volume", NULL, "ACIN"},
647
648 /* Right Capture Volume */
649 {"Right Capture Volume", NULL, "Mic 2 Volume"},
650
651 /* ALC Mixer */
652 {"ALC Mixer", "Line Capture Switch", "Line Mixer"},
653 {"ALC Mixer", "Mic2 Capture Switch", "Mic 2 Volume"},
654 {"ALC Mixer", "Mic1 Capture Switch", "Mic 1 Volume"},
655 {"ALC Mixer", "Rx Capture Switch", "Rx Mixer"},
656
657 /* Line Left Mux */
658 {"Line Left Mux", "Line 1", "LINE1"},
659 {"Line Left Mux", "Rx Mix", "Rx Mixer"},
660
661 /* Line Right Mux */
662 {"Line Right Mux", "Line 2", "LINE2"},
663 {"Line Right Mux", "Rx Mix", "Rx Mixer"},
664
665 /* Line Mono Mux */
666 {"Line Mono Mux", "Line Mix", "Line Mixer"},
667 {"Line Mono Mux", "Rx Mix", "Rx Mixer"},
668
669 /* Line Mixer/Mux */
670 {"Line Mixer", "Line 1 + 2", "LINE1"},
671 {"Line Mixer", "Line 1 - 2", "LINE1"},
672 {"Line Mixer", "Line 1 + 2", "LINE2"},
673 {"Line Mixer", "Line 1 - 2", "LINE2"},
674 {"Line Mixer", "Line 1", "LINE1"},
675 {"Line Mixer", "Line 2", "LINE2"},
676
677 /* Rx Mixer/Mux */
678 {"Rx Mixer", "RXP - RXN", "RXP"},
679 {"Rx Mixer", "RXP + RXN", "RXP"},
680 {"Rx Mixer", "RXP - RXN", "RXN"},
681 {"Rx Mixer", "RXP + RXN", "RXN"},
682 {"Rx Mixer", "RXP", "RXP"},
683 {"Rx Mixer", "RXN", "RXN"},
684
685 /* Mic 1 Volume */
686 {"Mic 1 Volume", NULL, "MIC1N"},
687 {"Mic 1 Volume", NULL, "Mic Selection Mux"},
688
689 /* Mic 2 Volume */
690 {"Mic 2 Volume", NULL, "MIC2N"},
691 {"Mic 2 Volume", NULL, "MIC2"},
692
693 /* Mic Selector Mux */
694 {"Mic Selection Mux", "Mic 1", "MIC1"},
695 {"Mic Selection Mux", "Mic 2", "MIC2N"},
696 {"Mic Selection Mux", "Mic 3", "MIC2"},
697
698 /* ACOP */
699 {"ACOP", NULL, "ALC Mixer"},
700 };
701
702 /* PLL divisors */
703 struct _pll_div {
704 u32 div2:1;
705 u32 n:4;
706 u32 k:24;
707 };
708
709 /* The size in bits of the pll divide multiplied by 10
710 * to allow rounding later */
711 #define FIXED_PLL_SIZE ((1 << 22) * 10)
712
713 static void pll_factors(struct _pll_div *pll_div, unsigned int target,
714 unsigned int source)
715 {
716 u64 Kpart;
717 unsigned int K, Ndiv, Nmod;
718
719 Ndiv = target / source;
720 if (Ndiv < 6) {
721 source >>= 1;
722 pll_div->div2 = 1;
723 Ndiv = target / source;
724 } else
725 pll_div->div2 = 0;
726
727 if ((Ndiv < 6) || (Ndiv > 12))
728 printk(KERN_WARNING
729 "wm8753: unsupported N = %u\n", Ndiv);
730
731 pll_div->n = Ndiv;
732 Nmod = target % source;
733 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
734
735 do_div(Kpart, source);
736
737 K = Kpart & 0xFFFFFFFF;
738
739 /* Check if we need to round */
740 if ((K % 10) >= 5)
741 K += 5;
742
743 /* Move down to proper range now rounding is done */
744 K /= 10;
745
746 pll_div->k = K;
747 }
748
749 static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
750 int source, unsigned int freq_in, unsigned int freq_out)
751 {
752 u16 reg, enable;
753 int offset;
754 struct snd_soc_codec *codec = codec_dai->codec;
755
756 if (pll_id < WM8753_PLL1 || pll_id > WM8753_PLL2)
757 return -ENODEV;
758
759 if (pll_id == WM8753_PLL1) {
760 offset = 0;
761 enable = 0x10;
762 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef;
763 } else {
764 offset = 4;
765 enable = 0x8;
766 reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7;
767 }
768
769 if (!freq_in || !freq_out) {
770 /* disable PLL */
771 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
772 snd_soc_write(codec, WM8753_CLOCK, reg);
773 return 0;
774 } else {
775 u16 value = 0;
776 struct _pll_div pll_div;
777
778 pll_factors(&pll_div, freq_out * 8, freq_in);
779
780 /* set up N and K PLL divisor ratios */
781 /* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
782 value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
783 snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value);
784
785 /* bits 8:0 = PLL_K[17:9] */
786 value = (pll_div.k & 0x03fe00) >> 9;
787 snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value);
788
789 /* bits 8:0 = PLL_K[8:0] */
790 value = pll_div.k & 0x0001ff;
791 snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value);
792
793 /* set PLL as input and enable */
794 snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
795 (pll_div.div2 << 3));
796 snd_soc_write(codec, WM8753_CLOCK, reg | enable);
797 }
798 return 0;
799 }
800
801 struct _coeff_div {
802 u32 mclk;
803 u32 rate;
804 u8 sr:5;
805 u8 usb:1;
806 };
807
808 /* codec hifi mclk (after PLL) clock divider coefficients */
809 static const struct _coeff_div coeff_div[] = {
810 /* 8k */
811 {12288000, 8000, 0x6, 0x0},
812 {11289600, 8000, 0x16, 0x0},
813 {18432000, 8000, 0x7, 0x0},
814 {16934400, 8000, 0x17, 0x0},
815 {12000000, 8000, 0x6, 0x1},
816
817 /* 11.025k */
818 {11289600, 11025, 0x18, 0x0},
819 {16934400, 11025, 0x19, 0x0},
820 {12000000, 11025, 0x19, 0x1},
821
822 /* 16k */
823 {12288000, 16000, 0xa, 0x0},
824 {18432000, 16000, 0xb, 0x0},
825 {12000000, 16000, 0xa, 0x1},
826
827 /* 22.05k */
828 {11289600, 22050, 0x1a, 0x0},
829 {16934400, 22050, 0x1b, 0x0},
830 {12000000, 22050, 0x1b, 0x1},
831
832 /* 32k */
833 {12288000, 32000, 0xc, 0x0},
834 {18432000, 32000, 0xd, 0x0},
835 {12000000, 32000, 0xa, 0x1},
836
837 /* 44.1k */
838 {11289600, 44100, 0x10, 0x0},
839 {16934400, 44100, 0x11, 0x0},
840 {12000000, 44100, 0x11, 0x1},
841
842 /* 48k */
843 {12288000, 48000, 0x0, 0x0},
844 {18432000, 48000, 0x1, 0x0},
845 {12000000, 48000, 0x0, 0x1},
846
847 /* 88.2k */
848 {11289600, 88200, 0x1e, 0x0},
849 {16934400, 88200, 0x1f, 0x0},
850 {12000000, 88200, 0x1f, 0x1},
851
852 /* 96k */
853 {12288000, 96000, 0xe, 0x0},
854 {18432000, 96000, 0xf, 0x0},
855 {12000000, 96000, 0xe, 0x1},
856 };
857
858 static int get_coeff(int mclk, int rate)
859 {
860 int i;
861
862 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
863 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
864 return i;
865 }
866 return -EINVAL;
867 }
868
869 /*
870 * Clock after PLL and dividers
871 */
872 static int wm8753_set_dai_sysclk(struct snd_soc_dai *codec_dai,
873 int clk_id, unsigned int freq, int dir)
874 {
875 struct snd_soc_codec *codec = codec_dai->codec;
876 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
877
878 switch (freq) {
879 case 11289600:
880 case 12000000:
881 case 12288000:
882 case 16934400:
883 case 18432000:
884 if (clk_id == WM8753_MCLK) {
885 wm8753->sysclk = freq;
886 return 0;
887 } else if (clk_id == WM8753_PCMCLK) {
888 wm8753->pcmclk = freq;
889 return 0;
890 }
891 break;
892 }
893 return -EINVAL;
894 }
895
896 /*
897 * Set's ADC and Voice DAC format.
898 */
899 static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_codec *codec,
900 unsigned int fmt)
901 {
902 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec;
903
904 /* interface format */
905 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
906 case SND_SOC_DAIFMT_I2S:
907 voice |= 0x0002;
908 break;
909 case SND_SOC_DAIFMT_RIGHT_J:
910 break;
911 case SND_SOC_DAIFMT_LEFT_J:
912 voice |= 0x0001;
913 break;
914 case SND_SOC_DAIFMT_DSP_A:
915 voice |= 0x0003;
916 break;
917 case SND_SOC_DAIFMT_DSP_B:
918 voice |= 0x0013;
919 break;
920 default:
921 return -EINVAL;
922 }
923
924 snd_soc_write(codec, WM8753_PCM, voice);
925 return 0;
926 }
927
928 /*
929 * Set PCM DAI bit size and sample rate.
930 */
931 static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
932 struct snd_pcm_hw_params *params,
933 struct snd_soc_dai *dai)
934 {
935 struct snd_soc_codec *codec = dai->codec;
936 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
937 u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3;
938 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f;
939
940 /* bit size */
941 switch (params_width(params)) {
942 case 16:
943 break;
944 case 20:
945 voice |= 0x0004;
946 break;
947 case 24:
948 voice |= 0x0008;
949 break;
950 case 32:
951 voice |= 0x000c;
952 break;
953 }
954
955 /* sample rate */
956 if (params_rate(params) * 384 == wm8753->pcmclk)
957 srate |= 0x80;
958 snd_soc_write(codec, WM8753_SRATE1, srate);
959
960 snd_soc_write(codec, WM8753_PCM, voice);
961 return 0;
962 }
963
964 /*
965 * Set's PCM dai fmt and BCLK.
966 */
967 static int wm8753_pcm_set_dai_fmt(struct snd_soc_codec *codec,
968 unsigned int fmt)
969 {
970 u16 voice, ioctl;
971
972 voice = snd_soc_read(codec, WM8753_PCM) & 0x011f;
973 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d;
974
975 /* set master/slave audio interface */
976 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
977 case SND_SOC_DAIFMT_CBS_CFS:
978 break;
979 case SND_SOC_DAIFMT_CBM_CFM:
980 ioctl |= 0x2;
981 case SND_SOC_DAIFMT_CBM_CFS:
982 voice |= 0x0040;
983 break;
984 default:
985 return -EINVAL;
986 }
987
988 /* clock inversion */
989 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
990 case SND_SOC_DAIFMT_DSP_A:
991 case SND_SOC_DAIFMT_DSP_B:
992 /* frame inversion not valid for DSP modes */
993 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
994 case SND_SOC_DAIFMT_NB_NF:
995 break;
996 case SND_SOC_DAIFMT_IB_NF:
997 voice |= 0x0080;
998 break;
999 default:
1000 return -EINVAL;
1001 }
1002 break;
1003 case SND_SOC_DAIFMT_I2S:
1004 case SND_SOC_DAIFMT_RIGHT_J:
1005 case SND_SOC_DAIFMT_LEFT_J:
1006 voice &= ~0x0010;
1007 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1008 case SND_SOC_DAIFMT_NB_NF:
1009 break;
1010 case SND_SOC_DAIFMT_IB_IF:
1011 voice |= 0x0090;
1012 break;
1013 case SND_SOC_DAIFMT_IB_NF:
1014 voice |= 0x0080;
1015 break;
1016 case SND_SOC_DAIFMT_NB_IF:
1017 voice |= 0x0010;
1018 break;
1019 default:
1020 return -EINVAL;
1021 }
1022 break;
1023 default:
1024 return -EINVAL;
1025 }
1026
1027 snd_soc_write(codec, WM8753_PCM, voice);
1028 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1029 return 0;
1030 }
1031
1032 static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1033 int div_id, int div)
1034 {
1035 struct snd_soc_codec *codec = codec_dai->codec;
1036 u16 reg;
1037
1038 switch (div_id) {
1039 case WM8753_PCMDIV:
1040 reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f;
1041 snd_soc_write(codec, WM8753_CLOCK, reg | div);
1042 break;
1043 case WM8753_BCLKDIV:
1044 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7;
1045 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1046 break;
1047 case WM8753_VXCLKDIV:
1048 reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f;
1049 snd_soc_write(codec, WM8753_SRATE2, reg | div);
1050 break;
1051 default:
1052 return -EINVAL;
1053 }
1054 return 0;
1055 }
1056
1057 /*
1058 * Set's HiFi DAC format.
1059 */
1060 static int wm8753_hdac_set_dai_fmt(struct snd_soc_codec *codec,
1061 unsigned int fmt)
1062 {
1063 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0;
1064
1065 /* interface format */
1066 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1067 case SND_SOC_DAIFMT_I2S:
1068 hifi |= 0x0002;
1069 break;
1070 case SND_SOC_DAIFMT_RIGHT_J:
1071 break;
1072 case SND_SOC_DAIFMT_LEFT_J:
1073 hifi |= 0x0001;
1074 break;
1075 case SND_SOC_DAIFMT_DSP_A:
1076 hifi |= 0x0003;
1077 break;
1078 case SND_SOC_DAIFMT_DSP_B:
1079 hifi |= 0x0013;
1080 break;
1081 default:
1082 return -EINVAL;
1083 }
1084
1085 snd_soc_write(codec, WM8753_HIFI, hifi);
1086 return 0;
1087 }
1088
1089 /*
1090 * Set's I2S DAI format.
1091 */
1092 static int wm8753_i2s_set_dai_fmt(struct snd_soc_codec *codec,
1093 unsigned int fmt)
1094 {
1095 u16 ioctl, hifi;
1096
1097 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f;
1098 ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae;
1099
1100 /* set master/slave audio interface */
1101 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1102 case SND_SOC_DAIFMT_CBS_CFS:
1103 break;
1104 case SND_SOC_DAIFMT_CBM_CFM:
1105 ioctl |= 0x1;
1106 case SND_SOC_DAIFMT_CBM_CFS:
1107 hifi |= 0x0040;
1108 break;
1109 default:
1110 return -EINVAL;
1111 }
1112
1113 /* clock inversion */
1114 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1115 case SND_SOC_DAIFMT_DSP_A:
1116 case SND_SOC_DAIFMT_DSP_B:
1117 /* frame inversion not valid for DSP modes */
1118 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1119 case SND_SOC_DAIFMT_NB_NF:
1120 break;
1121 case SND_SOC_DAIFMT_IB_NF:
1122 hifi |= 0x0080;
1123 break;
1124 default:
1125 return -EINVAL;
1126 }
1127 break;
1128 case SND_SOC_DAIFMT_I2S:
1129 case SND_SOC_DAIFMT_RIGHT_J:
1130 case SND_SOC_DAIFMT_LEFT_J:
1131 hifi &= ~0x0010;
1132 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1133 case SND_SOC_DAIFMT_NB_NF:
1134 break;
1135 case SND_SOC_DAIFMT_IB_IF:
1136 hifi |= 0x0090;
1137 break;
1138 case SND_SOC_DAIFMT_IB_NF:
1139 hifi |= 0x0080;
1140 break;
1141 case SND_SOC_DAIFMT_NB_IF:
1142 hifi |= 0x0010;
1143 break;
1144 default:
1145 return -EINVAL;
1146 }
1147 break;
1148 default:
1149 return -EINVAL;
1150 }
1151
1152 snd_soc_write(codec, WM8753_HIFI, hifi);
1153 snd_soc_write(codec, WM8753_IOCTL, ioctl);
1154 return 0;
1155 }
1156
1157 /*
1158 * Set PCM DAI bit size and sample rate.
1159 */
1160 static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
1161 struct snd_pcm_hw_params *params,
1162 struct snd_soc_dai *dai)
1163 {
1164 struct snd_soc_codec *codec = dai->codec;
1165 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1166 u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0;
1167 u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3;
1168 int coeff;
1169
1170 /* is digital filter coefficient valid ? */
1171 coeff = get_coeff(wm8753->sysclk, params_rate(params));
1172 if (coeff < 0) {
1173 printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
1174 return coeff;
1175 }
1176 snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
1177 coeff_div[coeff].usb);
1178
1179 /* bit size */
1180 switch (params_width(params)) {
1181 case 16:
1182 break;
1183 case 20:
1184 hifi |= 0x0004;
1185 break;
1186 case 24:
1187 hifi |= 0x0008;
1188 break;
1189 case 32:
1190 hifi |= 0x000c;
1191 break;
1192 }
1193
1194 snd_soc_write(codec, WM8753_HIFI, hifi);
1195 return 0;
1196 }
1197
1198 static int wm8753_mode1v_set_dai_fmt(struct snd_soc_codec *codec,
1199 unsigned int fmt)
1200 {
1201 u16 clock;
1202
1203 /* set clk source as pcmclk */
1204 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1205 snd_soc_write(codec, WM8753_CLOCK, clock);
1206
1207 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1208 }
1209
1210 static int wm8753_mode1h_set_dai_fmt(struct snd_soc_codec *codec,
1211 unsigned int fmt)
1212 {
1213 return wm8753_hdac_set_dai_fmt(codec, fmt);
1214 }
1215
1216 static int wm8753_mode2_set_dai_fmt(struct snd_soc_codec *codec,
1217 unsigned int fmt)
1218 {
1219 u16 clock;
1220
1221 /* set clk source as pcmclk */
1222 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1223 snd_soc_write(codec, WM8753_CLOCK, clock);
1224
1225 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1226 }
1227
1228 static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_codec *codec,
1229 unsigned int fmt)
1230 {
1231 u16 clock;
1232
1233 /* set clk source as mclk */
1234 clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
1235 snd_soc_write(codec, WM8753_CLOCK, clock | 0x4);
1236
1237 if (wm8753_hdac_set_dai_fmt(codec, fmt) < 0)
1238 return -EINVAL;
1239 return wm8753_vdac_adc_set_dai_fmt(codec, fmt);
1240 }
1241
1242 static int wm8753_hifi_write_dai_fmt(struct snd_soc_codec *codec,
1243 unsigned int fmt)
1244 {
1245 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1246 int ret = 0;
1247
1248 switch (wm8753->dai_func) {
1249 case 0:
1250 ret = wm8753_mode1h_set_dai_fmt(codec, fmt);
1251 break;
1252 case 1:
1253 ret = wm8753_mode2_set_dai_fmt(codec, fmt);
1254 break;
1255 case 2:
1256 case 3:
1257 ret = wm8753_mode3_4_set_dai_fmt(codec, fmt);
1258 break;
1259 default:
1260 break;
1261 }
1262 if (ret)
1263 return ret;
1264
1265 return wm8753_i2s_set_dai_fmt(codec, fmt);
1266 }
1267
1268 static int wm8753_hifi_set_dai_fmt(struct snd_soc_dai *codec_dai,
1269 unsigned int fmt)
1270 {
1271 struct snd_soc_codec *codec = codec_dai->codec;
1272 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1273
1274 wm8753->hifi_fmt = fmt;
1275
1276 return wm8753_hifi_write_dai_fmt(codec, fmt);
1277 };
1278
1279 static int wm8753_voice_write_dai_fmt(struct snd_soc_codec *codec,
1280 unsigned int fmt)
1281 {
1282 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1283 int ret = 0;
1284
1285 if (wm8753->dai_func != 0)
1286 return 0;
1287
1288 ret = wm8753_mode1v_set_dai_fmt(codec, fmt);
1289 if (ret)
1290 return ret;
1291 ret = wm8753_pcm_set_dai_fmt(codec, fmt);
1292 if (ret)
1293 return ret;
1294
1295 return 0;
1296 };
1297
1298 static int wm8753_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
1299 unsigned int fmt)
1300 {
1301 struct snd_soc_codec *codec = codec_dai->codec;
1302 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1303
1304 wm8753->voice_fmt = fmt;
1305
1306 return wm8753_voice_write_dai_fmt(codec, fmt);
1307 };
1308
1309 static int wm8753_mute(struct snd_soc_dai *dai, int mute)
1310 {
1311 struct snd_soc_codec *codec = dai->codec;
1312 u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7;
1313 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1314
1315 /* the digital mute covers the HiFi and Voice DAC's on the WM8753.
1316 * make sure we check if they are not both active when we mute */
1317 if (mute && wm8753->dai_func == 1) {
1318 if (!snd_soc_codec_is_active(codec))
1319 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1320 } else {
1321 if (mute)
1322 snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
1323 else
1324 snd_soc_write(codec, WM8753_DAC, mute_reg);
1325 }
1326
1327 return 0;
1328 }
1329
1330 static void wm8753_charge_work(struct work_struct *work)
1331 {
1332 struct wm8753_priv *wm8753 =
1333 container_of(work, struct wm8753_priv, charge_work.work);
1334
1335 /* Set to 500k */
1336 regmap_update_bits(wm8753->regmap, WM8753_PWR1, 0x0180, 0x0100);
1337 }
1338
1339 static int wm8753_set_bias_level(struct snd_soc_codec *codec,
1340 enum snd_soc_bias_level level)
1341 {
1342 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1343 u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e;
1344
1345 switch (level) {
1346 case SND_SOC_BIAS_ON:
1347 /* set vmid to 50k and unmute dac */
1348 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
1349 break;
1350 case SND_SOC_BIAS_PREPARE:
1351 /* Wait until fully charged */
1352 flush_delayed_work(&wm8753->charge_work);
1353 break;
1354 case SND_SOC_BIAS_STANDBY:
1355 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
1356 /* set vmid to 5k for quick power up */
1357 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
1358 schedule_delayed_work(&wm8753->charge_work,
1359 msecs_to_jiffies(caps_charge));
1360 } else {
1361 /* mute dac and set vmid to 500k, enable VREF */
1362 snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
1363 }
1364 break;
1365 case SND_SOC_BIAS_OFF:
1366 cancel_delayed_work_sync(&wm8753->charge_work);
1367 snd_soc_write(codec, WM8753_PWR1, 0x0001);
1368 break;
1369 }
1370 return 0;
1371 }
1372
1373 #define WM8753_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
1374 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
1375 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1376 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
1377
1378 #define WM8753_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1379 SNDRV_PCM_FMTBIT_S24_LE)
1380
1381 /*
1382 * The WM8753 supports up to 4 different and mutually exclusive DAI
1383 * configurations. This gives 2 PCM's available for use, hifi and voice.
1384 * NOTE: The Voice PCM cannot play or capture audio to the CPU as it's DAI
1385 * is connected between the wm8753 and a BT codec or GSM modem.
1386 *
1387 * 1. Voice over PCM DAI - HIFI DAC over HIFI DAI
1388 * 2. Voice over HIFI DAI - HIFI disabled
1389 * 3. Voice disabled - HIFI over HIFI
1390 * 4. Voice disabled - HIFI over HIFI, uses voice DAI LRC for capture
1391 */
1392 static const struct snd_soc_dai_ops wm8753_dai_ops_hifi_mode = {
1393 .hw_params = wm8753_i2s_hw_params,
1394 .digital_mute = wm8753_mute,
1395 .set_fmt = wm8753_hifi_set_dai_fmt,
1396 .set_clkdiv = wm8753_set_dai_clkdiv,
1397 .set_pll = wm8753_set_dai_pll,
1398 .set_sysclk = wm8753_set_dai_sysclk,
1399 };
1400
1401 static const struct snd_soc_dai_ops wm8753_dai_ops_voice_mode = {
1402 .hw_params = wm8753_pcm_hw_params,
1403 .digital_mute = wm8753_mute,
1404 .set_fmt = wm8753_voice_set_dai_fmt,
1405 .set_clkdiv = wm8753_set_dai_clkdiv,
1406 .set_pll = wm8753_set_dai_pll,
1407 .set_sysclk = wm8753_set_dai_sysclk,
1408 };
1409
1410 static struct snd_soc_dai_driver wm8753_dai[] = {
1411 /* DAI HiFi mode 1 */
1412 { .name = "wm8753-hifi",
1413 .playback = {
1414 .stream_name = "HiFi Playback",
1415 .channels_min = 1,
1416 .channels_max = 2,
1417 .rates = WM8753_RATES,
1418 .formats = WM8753_FORMATS
1419 },
1420 .capture = { /* dummy for fast DAI switching */
1421 .stream_name = "Capture",
1422 .channels_min = 1,
1423 .channels_max = 2,
1424 .rates = WM8753_RATES,
1425 .formats = WM8753_FORMATS
1426 },
1427 .ops = &wm8753_dai_ops_hifi_mode,
1428 },
1429 /* DAI Voice mode 1 */
1430 { .name = "wm8753-voice",
1431 .playback = {
1432 .stream_name = "Voice Playback",
1433 .channels_min = 1,
1434 .channels_max = 1,
1435 .rates = WM8753_RATES,
1436 .formats = WM8753_FORMATS,
1437 },
1438 .capture = {
1439 .stream_name = "Capture",
1440 .channels_min = 1,
1441 .channels_max = 2,
1442 .rates = WM8753_RATES,
1443 .formats = WM8753_FORMATS,
1444 },
1445 .ops = &wm8753_dai_ops_voice_mode,
1446 },
1447 };
1448
1449 static int wm8753_resume(struct snd_soc_codec *codec)
1450 {
1451 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1452
1453 regcache_sync(wm8753->regmap);
1454
1455 return 0;
1456 }
1457
1458 static int wm8753_probe(struct snd_soc_codec *codec)
1459 {
1460 struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
1461 int ret;
1462
1463 INIT_DELAYED_WORK(&wm8753->charge_work, wm8753_charge_work);
1464
1465 ret = wm8753_reset(codec);
1466 if (ret < 0) {
1467 dev_err(codec->dev, "Failed to issue reset: %d\n", ret);
1468 return ret;
1469 }
1470
1471 wm8753->dai_func = 0;
1472
1473 /* set the update bits */
1474 snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
1475 snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
1476 snd_soc_update_bits(codec, WM8753_LADC, 0x0100, 0x0100);
1477 snd_soc_update_bits(codec, WM8753_RADC, 0x0100, 0x0100);
1478 snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100);
1479 snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100);
1480 snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100);
1481 snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100);
1482 snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100);
1483 snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100);
1484
1485 return 0;
1486 }
1487
1488 static struct snd_soc_codec_driver soc_codec_dev_wm8753 = {
1489 .probe = wm8753_probe,
1490 .resume = wm8753_resume,
1491 .set_bias_level = wm8753_set_bias_level,
1492 .suspend_bias_off = true,
1493
1494 .controls = wm8753_snd_controls,
1495 .num_controls = ARRAY_SIZE(wm8753_snd_controls),
1496 .dapm_widgets = wm8753_dapm_widgets,
1497 .num_dapm_widgets = ARRAY_SIZE(wm8753_dapm_widgets),
1498 .dapm_routes = wm8753_dapm_routes,
1499 .num_dapm_routes = ARRAY_SIZE(wm8753_dapm_routes),
1500 };
1501
1502 static const struct of_device_id wm8753_of_match[] = {
1503 { .compatible = "wlf,wm8753", },
1504 { }
1505 };
1506 MODULE_DEVICE_TABLE(of, wm8753_of_match);
1507
1508 static const struct regmap_config wm8753_regmap = {
1509 .reg_bits = 7,
1510 .val_bits = 9,
1511
1512 .max_register = WM8753_ADCTL2,
1513 .writeable_reg = wm8753_writeable,
1514 .volatile_reg = wm8753_volatile,
1515
1516 .cache_type = REGCACHE_RBTREE,
1517 .reg_defaults = wm8753_reg_defaults,
1518 .num_reg_defaults = ARRAY_SIZE(wm8753_reg_defaults),
1519 };
1520
1521 #if defined(CONFIG_SPI_MASTER)
1522 static int wm8753_spi_probe(struct spi_device *spi)
1523 {
1524 struct wm8753_priv *wm8753;
1525 int ret;
1526
1527 wm8753 = devm_kzalloc(&spi->dev, sizeof(struct wm8753_priv),
1528 GFP_KERNEL);
1529 if (wm8753 == NULL)
1530 return -ENOMEM;
1531
1532 spi_set_drvdata(spi, wm8753);
1533
1534 wm8753->regmap = devm_regmap_init_spi(spi, &wm8753_regmap);
1535 if (IS_ERR(wm8753->regmap)) {
1536 ret = PTR_ERR(wm8753->regmap);
1537 dev_err(&spi->dev, "Failed to allocate register map: %d\n",
1538 ret);
1539 return ret;
1540 }
1541
1542 ret = snd_soc_register_codec(&spi->dev, &soc_codec_dev_wm8753,
1543 wm8753_dai, ARRAY_SIZE(wm8753_dai));
1544 if (ret != 0)
1545 dev_err(&spi->dev, "Failed to register CODEC: %d\n", ret);
1546
1547 return ret;
1548 }
1549
1550 static int wm8753_spi_remove(struct spi_device *spi)
1551 {
1552 snd_soc_unregister_codec(&spi->dev);
1553 return 0;
1554 }
1555
1556 static struct spi_driver wm8753_spi_driver = {
1557 .driver = {
1558 .name = "wm8753",
1559 .owner = THIS_MODULE,
1560 .of_match_table = wm8753_of_match,
1561 },
1562 .probe = wm8753_spi_probe,
1563 .remove = wm8753_spi_remove,
1564 };
1565 #endif /* CONFIG_SPI_MASTER */
1566
1567 #if IS_ENABLED(CONFIG_I2C)
1568 static int wm8753_i2c_probe(struct i2c_client *i2c,
1569 const struct i2c_device_id *id)
1570 {
1571 struct wm8753_priv *wm8753;
1572 int ret;
1573
1574 wm8753 = devm_kzalloc(&i2c->dev, sizeof(struct wm8753_priv),
1575 GFP_KERNEL);
1576 if (wm8753 == NULL)
1577 return -ENOMEM;
1578
1579 i2c_set_clientdata(i2c, wm8753);
1580
1581 wm8753->regmap = devm_regmap_init_i2c(i2c, &wm8753_regmap);
1582 if (IS_ERR(wm8753->regmap)) {
1583 ret = PTR_ERR(wm8753->regmap);
1584 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1585 ret);
1586 return ret;
1587 }
1588
1589 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_wm8753,
1590 wm8753_dai, ARRAY_SIZE(wm8753_dai));
1591 if (ret != 0)
1592 dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret);
1593
1594 return ret;
1595 }
1596
1597 static int wm8753_i2c_remove(struct i2c_client *client)
1598 {
1599 snd_soc_unregister_codec(&client->dev);
1600 return 0;
1601 }
1602
1603 static const struct i2c_device_id wm8753_i2c_id[] = {
1604 { "wm8753", 0 },
1605 { }
1606 };
1607 MODULE_DEVICE_TABLE(i2c, wm8753_i2c_id);
1608
1609 static struct i2c_driver wm8753_i2c_driver = {
1610 .driver = {
1611 .name = "wm8753",
1612 .owner = THIS_MODULE,
1613 .of_match_table = wm8753_of_match,
1614 },
1615 .probe = wm8753_i2c_probe,
1616 .remove = wm8753_i2c_remove,
1617 .id_table = wm8753_i2c_id,
1618 };
1619 #endif
1620
1621 static int __init wm8753_modinit(void)
1622 {
1623 int ret = 0;
1624 #if IS_ENABLED(CONFIG_I2C)
1625 ret = i2c_add_driver(&wm8753_i2c_driver);
1626 if (ret != 0) {
1627 printk(KERN_ERR "Failed to register wm8753 I2C driver: %d\n",
1628 ret);
1629 }
1630 #endif
1631 #if defined(CONFIG_SPI_MASTER)
1632 ret = spi_register_driver(&wm8753_spi_driver);
1633 if (ret != 0) {
1634 printk(KERN_ERR "Failed to register wm8753 SPI driver: %d\n",
1635 ret);
1636 }
1637 #endif
1638 return ret;
1639 }
1640 module_init(wm8753_modinit);
1641
1642 static void __exit wm8753_exit(void)
1643 {
1644 #if IS_ENABLED(CONFIG_I2C)
1645 i2c_del_driver(&wm8753_i2c_driver);
1646 #endif
1647 #if defined(CONFIG_SPI_MASTER)
1648 spi_unregister_driver(&wm8753_spi_driver);
1649 #endif
1650 }
1651 module_exit(wm8753_exit);
1652
1653 MODULE_DESCRIPTION("ASoC WM8753 driver");
1654 MODULE_AUTHOR("Liam Girdwood");
1655 MODULE_LICENSE("GPL");
Linux with added FPC-III support