1 * Clock bindings for Freescale Vybrid VF610 SOC
4 - compatible: Should be "fsl,vf610-ccm"
5 - reg: Address and length of the register set
6 - #clock-cells: Should be <1>
8 The clock consumer should specify the desired clock by having the clock
9 ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
10 for the full list of VF610 clock IDs.
15 compatible = "fsl,vf610-ccm";
16 reg = <0x4006b000 0x1000>;
20 uart1: serial@40028000 {
21 compatible = "fsl,vf610-uart";
22 reg = <0x40028000 0x1000>;
23 interrupts = <0 62 0x04>;
24 clocks = <&clks VF610_CLK_UART1>;