Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux/fpc-iii.git] / arch / arm / mach-s5pv210 / mach-torbreck.c
blob579afe89842a3b169c9532e46096cfef7c998b9e
1 /* linux/arch/arm/mach-s5pv210/mach-torbreck.c
3 * Copyright (c) 2010 aESOP Community
4 * http://www.aesop.or.kr/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
11 #include <linux/kernel.h>
12 #include <linux/types.h>
13 #include <linux/i2c.h>
14 #include <linux/init.h>
15 #include <linux/serial_core.h>
17 #include <asm/mach/arch.h>
18 #include <asm/mach/map.h>
19 #include <asm/setup.h>
20 #include <asm/mach-types.h>
22 #include <mach/map.h>
23 #include <mach/regs-clock.h>
25 #include <plat/regs-serial.h>
26 #include <plat/devs.h>
27 #include <plat/cpu.h>
28 #include <linux/platform_data/i2c-s3c2410.h>
29 #include <plat/samsung-time.h>
31 #include "common.h"
33 /* Following are default values for UCON, ULCON and UFCON UART registers */
34 #define TORBRECK_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
35 S3C2410_UCON_RXILEVEL | \
36 S3C2410_UCON_TXIRQMODE | \
37 S3C2410_UCON_RXIRQMODE | \
38 S3C2410_UCON_RXFIFO_TOI | \
39 S3C2443_UCON_RXERR_IRQEN)
41 #define TORBRECK_ULCON_DEFAULT S3C2410_LCON_CS8
43 #define TORBRECK_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
44 S5PV210_UFCON_TXTRIG4 | \
45 S5PV210_UFCON_RXTRIG4)
47 static struct s3c2410_uartcfg torbreck_uartcfgs[] __initdata = {
48 [0] = {
49 .hwport = 0,
50 .flags = 0,
51 .ucon = TORBRECK_UCON_DEFAULT,
52 .ulcon = TORBRECK_ULCON_DEFAULT,
53 .ufcon = TORBRECK_UFCON_DEFAULT,
55 [1] = {
56 .hwport = 1,
57 .flags = 0,
58 .ucon = TORBRECK_UCON_DEFAULT,
59 .ulcon = TORBRECK_ULCON_DEFAULT,
60 .ufcon = TORBRECK_UFCON_DEFAULT,
62 [2] = {
63 .hwport = 2,
64 .flags = 0,
65 .ucon = TORBRECK_UCON_DEFAULT,
66 .ulcon = TORBRECK_ULCON_DEFAULT,
67 .ufcon = TORBRECK_UFCON_DEFAULT,
69 [3] = {
70 .hwport = 3,
71 .flags = 0,
72 .ucon = TORBRECK_UCON_DEFAULT,
73 .ulcon = TORBRECK_ULCON_DEFAULT,
74 .ufcon = TORBRECK_UFCON_DEFAULT,
78 static struct platform_device *torbreck_devices[] __initdata = {
79 &s5pv210_device_iis0,
80 &s3c_device_cfcon,
81 &s3c_device_hsmmc0,
82 &s3c_device_hsmmc1,
83 &s3c_device_hsmmc2,
84 &s3c_device_hsmmc3,
85 &s3c_device_i2c0,
86 &s3c_device_i2c1,
87 &s3c_device_i2c2,
88 &s3c_device_rtc,
89 &s3c_device_wdt,
92 static struct i2c_board_info torbreck_i2c_devs0[] __initdata = {
93 /* To Be Updated */
96 static struct i2c_board_info torbreck_i2c_devs1[] __initdata = {
97 /* To Be Updated */
100 static struct i2c_board_info torbreck_i2c_devs2[] __initdata = {
101 /* To Be Updated */
104 static void __init torbreck_map_io(void)
106 s5pv210_init_io(NULL, 0);
107 s3c24xx_init_clocks(24000000);
108 s3c24xx_init_uarts(torbreck_uartcfgs, ARRAY_SIZE(torbreck_uartcfgs));
109 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
112 static void __init torbreck_machine_init(void)
114 s3c_i2c0_set_platdata(NULL);
115 s3c_i2c1_set_platdata(NULL);
116 s3c_i2c2_set_platdata(NULL);
117 i2c_register_board_info(0, torbreck_i2c_devs0,
118 ARRAY_SIZE(torbreck_i2c_devs0));
119 i2c_register_board_info(1, torbreck_i2c_devs1,
120 ARRAY_SIZE(torbreck_i2c_devs1));
121 i2c_register_board_info(2, torbreck_i2c_devs2,
122 ARRAY_SIZE(torbreck_i2c_devs2));
124 platform_add_devices(torbreck_devices, ARRAY_SIZE(torbreck_devices));
127 MACHINE_START(TORBRECK, "TORBRECK")
128 /* Maintainer: Hyunchul Ko <ghcstop@gmail.com> */
129 .atag_offset = 0x100,
130 .init_irq = s5pv210_init_irq,
131 .map_io = torbreck_map_io,
132 .init_machine = torbreck_machine_init,
133 .init_time = samsung_timer_init,
134 .restart = s5pv210_restart,
135 MACHINE_END