arch/arm/mach-tegra/tegra.c

   1 /*
   2  * NVIDIA Tegra SoC device tree board support
   3  *
   4  * Copyright (C) 2011, 2013, NVIDIA Corporation
   5  * Copyright (C) 2010 Secret Lab Technologies, Ltd.
   6  * Copyright (C) 2010 Google, Inc.
   7  *
   8  * This software is licensed under the terms of the GNU General Public
   9  * License version 2, as published by the Free Software Foundation, and
  10  * may be copied, distributed, and modified under those terms.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  */
  18
  19 #include <linux/kernel.h>
  20 #include <linux/init.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/serial_8250.h>
  23 #include <linux/clk.h>
  24 #include <linux/dma-mapping.h>
  25 #include <linux/irqdomain.h>
  26 #include <linux/of.h>
  27 #include <linux/of_address.h>
  28 #include <linux/of_fdt.h>
  29 #include <linux/of_platform.h>
  30 #include <linux/pda_power.h>
  31 #include <linux/io.h>
  32 #include <linux/slab.h>
  33 #include <linux/sys_soc.h>
  34 #include <linux/usb/tegra_usb_phy.h>
  35 #include <linux/clk/tegra.h>
  36 #include <linux/irqchip.h>
  37
  38 #include <asm/hardware/cache-l2x0.h>
  39 #include <asm/mach-types.h>
  40 #include <asm/mach/arch.h>
  41 #include <asm/mach/time.h>
  42 #include <asm/setup.h>
  43 #include <asm/trusted_foundations.h>
  44
  45 #include "apbio.h"
  46 #include "board.h"
  47 #include "common.h"
  48 #include "cpuidle.h"
  49 #include "fuse.h"
  50 #include "iomap.h"
  51 #include "irq.h"
  52 #include "pmc.h"
  53 #include "pm.h"
  54 #include "reset.h"
  55 #include "sleep.h"
  56
  57 /*
  58  * Storage for debug-macro.S's state.
  59  *
  60  * This must be in .data not .bss so that it gets initialized each time the
  61  * kernel is loaded. The data is declared here rather than debug-macro.S so
  62  * that multiple inclusions of debug-macro.S point at the same data.
  63  */
  64 u32 tegra_uart_config[3] = {
  65         /* Debug UART initialization required */
  66         1,
  67         /* Debug UART physical address */
  68         0,
  69         /* Debug UART virtual address */
  70         0,
  71 };
  72
  73 static void __init tegra_init_cache(void)
  74 {
  75 #ifdef CONFIG_CACHE_L2X0
  76         int ret;
  77         void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
  78         u32 aux_ctrl, cache_type;
  79
  80         cache_type = readl(p + L2X0_CACHE_TYPE);
  81         aux_ctrl = (cache_type & 0x700) << (17-8);
  82         aux_ctrl |= 0x7C400001;
  83
  84         ret = l2x0_of_init(aux_ctrl, 0x8200c3fe);
  85         if (!ret)
  86                 l2x0_saved_regs_addr = virt_to_phys(&l2x0_saved_regs);
  87 #endif
  88 }
  89
  90 static void __init tegra_init_early(void)
  91 {
  92         of_register_trusted_foundations();
  93         tegra_apb_io_init();
  94         tegra_init_fuse();
  95         tegra_cpu_reset_handler_init();
  96         tegra_init_cache();
  97         tegra_powergate_init();
  98         tegra_hotplug_init();
  99 }
 100
 101 static void __init tegra_dt_init_irq(void)
 102 {
 103         tegra_pmc_init_irq();
 104         tegra_init_irq();
 105         irqchip_init();
 106         tegra_legacy_irq_syscore_init();
 107 }
 108
 109 static void __init tegra_dt_init(void)
 110 {
 111         struct soc_device_attribute *soc_dev_attr;
 112         struct soc_device *soc_dev;
 113         struct device *parent = NULL;
 114
 115         tegra_pmc_init();
 116
 117         tegra_clocks_apply_init_table();
 118
 119         soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
 120         if (!soc_dev_attr)
 121                 goto out;
 122
 123         soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
 124         soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
 125         soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id);
 126
 127         soc_dev = soc_device_register(soc_dev_attr);
 128         if (IS_ERR(soc_dev)) {
 129                 kfree(soc_dev_attr->family);
 130                 kfree(soc_dev_attr->revision);
 131                 kfree(soc_dev_attr->soc_id);
 132                 kfree(soc_dev_attr);
 133                 goto out;
 134         }
 135
 136         parent = soc_device_to_device(soc_dev);
 137
 138         /*
 139          * Finished with the static registrations now; fill in the missing
 140          * devices
 141          */
 142 out:
 143         of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
 144 }
 145
 146 static void __init paz00_init(void)
 147 {
 148         if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
 149                 tegra_paz00_wifikill_init();
 150 }
 151
 152 static struct {
 153         char *machine;
 154         void (*init)(void);
 155 } board_init_funcs[] = {
 156         { "compal,paz00", paz00_init },
 157 };
 158
 159 static void __init tegra_dt_init_late(void)
 160 {
 161         int i;
 162
 163         tegra_init_suspend();
 164         tegra_cpuidle_init();
 165         tegra_powergate_debugfs_init();
 166
 167         for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
 168                 if (of_machine_is_compatible(board_init_funcs[i].machine)) {
 169                         board_init_funcs[i].init();
 170                         break;
 171                 }
 172         }
 173 }
 174
 175 static const char * const tegra_dt_board_compat[] = {
 176         "nvidia,tegra124",
 177         "nvidia,tegra114",
 178         "nvidia,tegra30",
 179         "nvidia,tegra20",
 180         NULL
 181 };
 182
 183 DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
 184         .map_io         = tegra_map_common_io,
 185         .smp            = smp_ops(tegra_smp_ops),
 186         .init_early     = tegra_init_early,
 187         .init_irq       = tegra_dt_init_irq,
 188         .init_machine   = tegra_dt_init,
 189         .init_late      = tegra_dt_init_late,
 190         .restart        = tegra_pmc_restart,
 191         .dt_compat      = tegra_dt_board_compat,
 192 MACHINE_END