Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux/fpc-iii.git] / arch / mips / pmcs-msp71xx / msp_setup.c
blob396b2967ad856bb974da6ff8055d27037cd9b654
1 /*
2 * The generic setup file for PMC-Sierra MSP processors
4 * Copyright 2005-2007 PMC-Sierra, Inc,
5 * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
13 #include <asm/bootinfo.h>
14 #include <asm/cacheflush.h>
15 #include <asm/idle.h>
16 #include <asm/r4kcache.h>
17 #include <asm/reboot.h>
18 #include <asm/smp-ops.h>
19 #include <asm/time.h>
21 #include <msp_prom.h>
22 #include <msp_regs.h>
24 #if defined(CONFIG_PMC_MSP7120_GW)
25 #include <msp_regops.h>
26 #define MSP_BOARD_RESET_GPIO 9
27 #endif
29 extern void msp_serial_setup(void);
30 extern void pmctwiled_setup(void);
32 #if defined(CONFIG_PMC_MSP7120_EVAL) || \
33 defined(CONFIG_PMC_MSP7120_GW) || \
34 defined(CONFIG_PMC_MSP7120_FPGA)
36 * Performs the reset for MSP7120-based boards
38 void msp7120_reset(void)
40 void *start, *end, *iptr;
41 register int i;
43 /* Diasble all interrupts */
44 local_irq_disable();
45 #ifdef CONFIG_SYS_SUPPORTS_MULTITHREADING
46 dvpe();
47 #endif
49 /* Cache the reset code of this function */
50 __asm__ __volatile__ (
51 " .set push \n"
52 " .set mips3 \n"
53 " la %0,startpoint \n"
54 " la %1,endpoint \n"
55 " .set pop \n"
56 : "=r" (start), "=r" (end)
60 for (iptr = (void *)((unsigned int)start & ~(L1_CACHE_BYTES - 1));
61 iptr < end; iptr += L1_CACHE_BYTES)
62 cache_op(Fill, iptr);
64 __asm__ __volatile__ (
65 "startpoint: \n"
68 /* Put the DDRC into self-refresh mode */
69 DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16);
72 * IMPORTANT!
73 * DO NOT do anything from here on out that might even
74 * think about fetching from RAM - i.e., don't call any
75 * non-inlined functions, and be VERY sure that any inline
76 * functions you do call do NOT access any sort of RAM
77 * anywhere!
80 /* Wait a bit for the DDRC to settle */
81 for (i = 0; i < 100000000; i++);
83 #if defined(CONFIG_PMC_MSP7120_GW)
85 * Set GPIO 9 HI, (tied to board reset logic)
86 * GPIO 9 is the 4th GPIO of register 3
88 * NOTE: We cannot use the higher-level msp_gpio_mode()/out()
89 * as GPIO char driver may not be enabled and it would look up
90 * data inRAM!
92 set_value_reg32(GPIO_CFG3_REG, 0xf000, 0x8000);
93 set_reg32(GPIO_DATA3_REG, 8);
96 * In case GPIO9 doesn't reset the board (jumper configurable!)
97 * fallback to device reset below.
99 #endif
100 /* Set bit 1 of the MSP7120 reset register */
101 *RST_SET_REG = 0x00000001;
103 __asm__ __volatile__ (
104 "endpoint: \n"
107 #endif
109 void msp_restart(char *command)
111 printk(KERN_WARNING "Now rebooting .......\n");
113 #if defined(CONFIG_PMC_MSP7120_EVAL) || \
114 defined(CONFIG_PMC_MSP7120_GW) || \
115 defined(CONFIG_PMC_MSP7120_FPGA)
116 msp7120_reset();
117 #else
118 /* No chip-specific reset code, just jump to the ROM reset vector */
119 set_c0_status(ST0_BEV | ST0_ERL);
120 change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
121 flush_cache_all();
122 write_c0_wired(0);
124 __asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
125 #endif
128 void msp_halt(void)
130 printk(KERN_WARNING "\n** You can safely turn off the power\n");
131 while (1)
132 /* If possible call official function to get CPU WARs */
133 if (cpu_wait)
134 (*cpu_wait)();
135 else
136 __asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0");
139 void msp_power_off(void)
141 msp_halt();
144 void __init plat_mem_setup(void)
146 _machine_restart = msp_restart;
147 _machine_halt = msp_halt;
148 pm_power_off = msp_power_off;
151 extern struct plat_smp_ops msp_smtc_smp_ops;
153 void __init prom_init(void)
155 unsigned long family;
156 unsigned long revision;
158 prom_argc = fw_arg0;
159 prom_argv = (char **)fw_arg1;
160 prom_envp = (char **)fw_arg2;
163 * Someday we can use this with PMON2000 to get a
164 * platform call prom routines for output etc. without
165 * having to use grody hacks. For now it's unused.
167 * struct callvectors *cv = (struct callvectors *) fw_arg3;
169 family = identify_family();
170 revision = identify_revision();
172 switch (family) {
173 case FAMILY_FPGA:
174 if (FPGA_IS_MSP4200(revision)) {
175 /* Old-style revision ID */
176 mips_machtype = MACH_MSP4200_FPGA;
177 } else {
178 mips_machtype = MACH_MSP_OTHER;
180 break;
182 case FAMILY_MSP4200:
183 #if defined(CONFIG_PMC_MSP4200_EVAL)
184 mips_machtype = MACH_MSP4200_EVAL;
185 #elif defined(CONFIG_PMC_MSP4200_GW)
186 mips_machtype = MACH_MSP4200_GW;
187 #else
188 mips_machtype = MACH_MSP_OTHER;
189 #endif
190 break;
192 case FAMILY_MSP4200_FPGA:
193 mips_machtype = MACH_MSP4200_FPGA;
194 break;
196 case FAMILY_MSP7100:
197 #if defined(CONFIG_PMC_MSP7120_EVAL)
198 mips_machtype = MACH_MSP7120_EVAL;
199 #elif defined(CONFIG_PMC_MSP7120_GW)
200 mips_machtype = MACH_MSP7120_GW;
201 #else
202 mips_machtype = MACH_MSP_OTHER;
203 #endif
204 break;
206 case FAMILY_MSP7100_FPGA:
207 mips_machtype = MACH_MSP7120_FPGA;
208 break;
210 default:
211 /* we don't recognize the machine */
212 mips_machtype = MACH_UNKNOWN;
213 panic("***Bogosity factor five***, exiting");
214 break;
217 prom_init_cmdline();
219 prom_meminit();
222 * Sub-system setup follows.
223 * Setup functions can either be called here or using the
224 * subsys_initcall mechanism (i.e. see msp_pci_setup). The
225 * order in which they are called can be changed by using the
226 * link order in arch/mips/pmc-sierra/msp71xx/Makefile.
228 * NOTE: Please keep sub-system specific initialization code
229 * in separate specific files.
231 msp_serial_setup();
233 if (register_vsmp_smp_ops()) {
234 #ifdef CONFIG_MIPS_MT_SMTC
235 register_smp_ops(&msp_smtc_smp_ops);
236 #endif
239 #ifdef CONFIG_PMCTWILED
241 * Setup LED states before the subsys_initcall loads other
242 * dependent drivers/modules.
244 pmctwiled_setup();
245 #endif