arch/mips/pmcs-msp71xx/msp_smtc.c

   1 /*
   2  * MSP71xx Platform-specific hooks for SMP operation
   3  */
   4 #include <linux/irq.h>
   5 #include <linux/init.h>
   6
   7 #include <asm/mipsmtregs.h>
   8 #include <asm/mipsregs.h>
   9 #include <asm/smtc.h>
  10 #include <asm/smtc_ipi.h>
  11
  12 /* VPE/SMP Prototype implements platform interfaces directly */
  13
  14 /*
  15  * Cause the specified action to be performed on a targeted "CPU"
  16  */
  17
  18 static void msp_smtc_send_ipi_single(int cpu, unsigned int action)
  19 {
  20         /* "CPU" may be TC of same VPE, VPE of same CPU, or different CPU */
  21         smtc_send_ipi(cpu, LINUX_SMP_IPI, action);
  22 }
  23
  24 static void msp_smtc_send_ipi_mask(const struct cpumask *mask,
  25                                                 unsigned int action)
  26 {
  27         unsigned int i;
  28
  29         for_each_cpu(i, mask)
  30                 msp_smtc_send_ipi_single(i, action);
  31 }
  32
  33 /*
  34  * Post-config but pre-boot cleanup entry point
  35  */
  36 static void msp_smtc_init_secondary(void)
  37 {
  38         int myvpe;
  39
  40         /* Don't enable Malta I/O interrupts (IP2) for secondary VPEs */
  41         myvpe = read_c0_tcbind() & TCBIND_CURVPE;
  42         if (myvpe > 0)
  43                 change_c0_status(ST0_IM, STATUSF_IP0 | STATUSF_IP1 |
  44                                 STATUSF_IP6 | STATUSF_IP7);
  45         smtc_init_secondary();
  46 }
  47
  48 /*
  49  * Platform "CPU" startup hook
  50  */
  51 static void msp_smtc_boot_secondary(int cpu, struct task_struct *idle)
  52 {
  53         smtc_boot_secondary(cpu, idle);
  54 }
  55
  56 /*
  57  * SMP initialization finalization entry point
  58  */
  59 static void msp_smtc_smp_finish(void)
  60 {
  61         smtc_smp_finish();
  62 }
  63
  64 /*
  65  * Hook for after all CPUs are online
  66  */
  67
  68 static void msp_smtc_cpus_done(void)
  69 {
  70 }
  71
  72 /*
  73  * Platform SMP pre-initialization
  74  *
  75  * As noted above, we can assume a single CPU for now
  76  * but it may be multithreaded.
  77  */
  78
  79 static void __init msp_smtc_smp_setup(void)
  80 {
  81         /*
  82          * we won't get the definitive value until
  83          * we've run smtc_prepare_cpus later, but
  84          */
  85
  86         if (read_c0_config3() & (1 << 2))
  87                 smp_num_siblings = smtc_build_cpu_map(0);
  88 }
  89
  90 static void __init msp_smtc_prepare_cpus(unsigned int max_cpus)
  91 {
  92         smtc_prepare_cpus(max_cpus);
  93 }
  94
  95 struct plat_smp_ops msp_smtc_smp_ops = {
  96         .send_ipi_single        = msp_smtc_send_ipi_single,
  97         .send_ipi_mask          = msp_smtc_send_ipi_mask,
  98         .init_secondary         = msp_smtc_init_secondary,
  99         .smp_finish             = msp_smtc_smp_finish,
 100         .cpus_done              = msp_smtc_cpus_done,
 101         .boot_secondary         = msp_smtc_boot_secondary,
 102         .smp_setup              = msp_smtc_smp_setup,
 103         .prepare_cpus           = msp_smtc_prepare_cpus,
 104 };