drivers/media/dvb-frontends/cxd2820r_core.c

   1 /*
   2  * Sony CXD2820R demodulator driver
   3  *
   4  * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
   5  *
   6  *    This program is free software; you can redistribute it and/or modify
   7  *    it under the terms of the GNU General Public License as published by
   8  *    the Free Software Foundation; either version 2 of the License, or
   9  *    (at your option) any later version.
  10  *
  11  *    This program is distributed in the hope that it will be useful,
  12  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *    GNU General Public License for more details.
  15  *
  16  *    You should have received a copy of the GNU General Public License along
  17  *    with this program; if not, write to the Free Software Foundation, Inc.,
  18  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19  */
  20
  21
  22 #include "cxd2820r_priv.h"
  23
  24 /* Max transfer size done by I2C transfer functions */
  25 #define MAX_XFER_SIZE  64
  26
  27 /* write multiple registers */
  28 static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
  29         u8 *val, int len)
  30 {
  31         int ret;
  32         u8 buf[MAX_XFER_SIZE];
  33         struct i2c_msg msg[1] = {
  34                 {
  35                         .addr = i2c,
  36                         .flags = 0,
  37                         .len = len + 1,
  38                         .buf = buf,
  39                 }
  40         };
  41
  42         if (1 + len > sizeof(buf)) {
  43                 dev_warn(&priv->i2c->dev,
  44                          "%s: i2c wr reg=%04x: len=%d is too big!\n",
  45                          KBUILD_MODNAME, reg, len);
  46                 return -EINVAL;
  47         }
  48
  49         buf[0] = reg;
  50         memcpy(&buf[1], val, len);
  51
  52         ret = i2c_transfer(priv->i2c, msg, 1);
  53         if (ret == 1) {
  54                 ret = 0;
  55         } else {
  56                 dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
  57                                 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  58                 ret = -EREMOTEIO;
  59         }
  60         return ret;
  61 }
  62
  63 /* read multiple registers */
  64 static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
  65         u8 *val, int len)
  66 {
  67         int ret;
  68         u8 buf[MAX_XFER_SIZE];
  69         struct i2c_msg msg[2] = {
  70                 {
  71                         .addr = i2c,
  72                         .flags = 0,
  73                         .len = 1,
  74                         .buf = &reg,
  75                 }, {
  76                         .addr = i2c,
  77                         .flags = I2C_M_RD,
  78                         .len = len,
  79                         .buf = buf,
  80                 }
  81         };
  82
  83         if (len > sizeof(buf)) {
  84                 dev_warn(&priv->i2c->dev,
  85                          "%s: i2c wr reg=%04x: len=%d is too big!\n",
  86                          KBUILD_MODNAME, reg, len);
  87                 return -EINVAL;
  88         }
  89
  90         ret = i2c_transfer(priv->i2c, msg, 2);
  91         if (ret == 2) {
  92                 memcpy(val, buf, len);
  93                 ret = 0;
  94         } else {
  95                 dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
  96                                 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
  97                 ret = -EREMOTEIO;
  98         }
  99
 100         return ret;
 101 }
 102
 103 /* write multiple registers */
 104 int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
 105         int len)
 106 {
 107         int ret;
 108         u8 i2c_addr;
 109         u8 reg = (reginfo >> 0) & 0xff;
 110         u8 bank = (reginfo >> 8) & 0xff;
 111         u8 i2c = (reginfo >> 16) & 0x01;
 112
 113         /* select I2C */
 114         if (i2c)
 115                 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
 116         else
 117                 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
 118
 119         /* switch bank if needed */
 120         if (bank != priv->bank[i2c]) {
 121                 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
 122                 if (ret)
 123                         return ret;
 124                 priv->bank[i2c] = bank;
 125         }
 126         return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
 127 }
 128
 129 /* read multiple registers */
 130 int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
 131         int len)
 132 {
 133         int ret;
 134         u8 i2c_addr;
 135         u8 reg = (reginfo >> 0) & 0xff;
 136         u8 bank = (reginfo >> 8) & 0xff;
 137         u8 i2c = (reginfo >> 16) & 0x01;
 138
 139         /* select I2C */
 140         if (i2c)
 141                 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
 142         else
 143                 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
 144
 145         /* switch bank if needed */
 146         if (bank != priv->bank[i2c]) {
 147                 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
 148                 if (ret)
 149                         return ret;
 150                 priv->bank[i2c] = bank;
 151         }
 152         return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
 153 }
 154
 155 /* write single register */
 156 int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
 157 {
 158         return cxd2820r_wr_regs(priv, reg, &val, 1);
 159 }
 160
 161 /* read single register */
 162 int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
 163 {
 164         return cxd2820r_rd_regs(priv, reg, val, 1);
 165 }
 166
 167 /* write single register with mask */
 168 int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
 169         u8 mask)
 170 {
 171         int ret;
 172         u8 tmp;
 173
 174         /* no need for read if whole reg is written */
 175         if (mask != 0xff) {
 176                 ret = cxd2820r_rd_reg(priv, reg, &tmp);
 177                 if (ret)
 178                         return ret;
 179
 180                 val &= mask;
 181                 tmp &= ~mask;
 182                 val |= tmp;
 183         }
 184
 185         return cxd2820r_wr_reg(priv, reg, val);
 186 }
 187
 188 int cxd2820r_gpio(struct dvb_frontend *fe, u8 *gpio)
 189 {
 190         struct cxd2820r_priv *priv = fe->demodulator_priv;
 191         int ret, i;
 192         u8 tmp0, tmp1;
 193
 194         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 195                         fe->dtv_property_cache.delivery_system);
 196
 197         /* update GPIOs only when needed */
 198         if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
 199                 return 0;
 200
 201         tmp0 = 0x00;
 202         tmp1 = 0x00;
 203         for (i = 0; i < sizeof(priv->gpio); i++) {
 204                 /* enable / disable */
 205                 if (gpio[i] & CXD2820R_GPIO_E)
 206                         tmp0 |= (2 << 6) >> (2 * i);
 207                 else
 208                         tmp0 |= (1 << 6) >> (2 * i);
 209
 210                 /* input / output */
 211                 if (gpio[i] & CXD2820R_GPIO_I)
 212                         tmp1 |= (1 << (3 + i));
 213                 else
 214                         tmp1 |= (0 << (3 + i));
 215
 216                 /* high / low */
 217                 if (gpio[i] & CXD2820R_GPIO_H)
 218                         tmp1 |= (1 << (0 + i));
 219                 else
 220                         tmp1 |= (0 << (0 + i));
 221
 222                 dev_dbg(&priv->i2c->dev, "%s: gpio i=%d %02x %02x\n", __func__,
 223                                 i, tmp0, tmp1);
 224         }
 225
 226         dev_dbg(&priv->i2c->dev, "%s: wr gpio=%02x %02x\n", __func__, tmp0,
 227                         tmp1);
 228
 229         /* write bits [7:2] */
 230         ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
 231         if (ret)
 232                 goto error;
 233
 234         /* write bits [5:0] */
 235         ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
 236         if (ret)
 237                 goto error;
 238
 239         memcpy(priv->gpio, gpio, sizeof(priv->gpio));
 240
 241         return ret;
 242 error:
 243         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 244         return ret;
 245 }
 246
 247 /* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
 248 u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
 249 {
 250         return div_u64(dividend + (divisor / 2), divisor);
 251 }
 252
 253 static int cxd2820r_set_frontend(struct dvb_frontend *fe)
 254 {
 255         struct cxd2820r_priv *priv = fe->demodulator_priv;
 256         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 257         int ret;
 258
 259         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 260                         fe->dtv_property_cache.delivery_system);
 261
 262         switch (c->delivery_system) {
 263         case SYS_DVBT:
 264                 ret = cxd2820r_init_t(fe);
 265                 if (ret < 0)
 266                         goto err;
 267                 ret = cxd2820r_set_frontend_t(fe);
 268                 if (ret < 0)
 269                         goto err;
 270                 break;
 271         case SYS_DVBT2:
 272                 ret = cxd2820r_init_t(fe);
 273                 if (ret < 0)
 274                         goto err;
 275                 ret = cxd2820r_set_frontend_t2(fe);
 276                 if (ret < 0)
 277                         goto err;
 278                 break;
 279         case SYS_DVBC_ANNEX_A:
 280                 ret = cxd2820r_init_c(fe);
 281                 if (ret < 0)
 282                         goto err;
 283                 ret = cxd2820r_set_frontend_c(fe);
 284                 if (ret < 0)
 285                         goto err;
 286                 break;
 287         default:
 288                 dev_dbg(&priv->i2c->dev, "%s: error state=%d\n", __func__,
 289                                 fe->dtv_property_cache.delivery_system);
 290                 ret = -EINVAL;
 291                 break;
 292         }
 293 err:
 294         return ret;
 295 }
 296 static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
 297 {
 298         struct cxd2820r_priv *priv = fe->demodulator_priv;
 299         int ret;
 300
 301         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 302                         fe->dtv_property_cache.delivery_system);
 303
 304         switch (fe->dtv_property_cache.delivery_system) {
 305         case SYS_DVBT:
 306                 ret = cxd2820r_read_status_t(fe, status);
 307                 break;
 308         case SYS_DVBT2:
 309                 ret = cxd2820r_read_status_t2(fe, status);
 310                 break;
 311         case SYS_DVBC_ANNEX_A:
 312                 ret = cxd2820r_read_status_c(fe, status);
 313                 break;
 314         default:
 315                 ret = -EINVAL;
 316                 break;
 317         }
 318         return ret;
 319 }
 320
 321 static int cxd2820r_get_frontend(struct dvb_frontend *fe)
 322 {
 323         struct cxd2820r_priv *priv = fe->demodulator_priv;
 324         int ret;
 325
 326         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 327                         fe->dtv_property_cache.delivery_system);
 328
 329         if (priv->delivery_system == SYS_UNDEFINED)
 330                 return 0;
 331
 332         switch (fe->dtv_property_cache.delivery_system) {
 333         case SYS_DVBT:
 334                 ret = cxd2820r_get_frontend_t(fe);
 335                 break;
 336         case SYS_DVBT2:
 337                 ret = cxd2820r_get_frontend_t2(fe);
 338                 break;
 339         case SYS_DVBC_ANNEX_A:
 340                 ret = cxd2820r_get_frontend_c(fe);
 341                 break;
 342         default:
 343                 ret = -EINVAL;
 344                 break;
 345         }
 346         return ret;
 347 }
 348
 349 static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
 350 {
 351         struct cxd2820r_priv *priv = fe->demodulator_priv;
 352         int ret;
 353
 354         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 355                         fe->dtv_property_cache.delivery_system);
 356
 357         switch (fe->dtv_property_cache.delivery_system) {
 358         case SYS_DVBT:
 359                 ret = cxd2820r_read_ber_t(fe, ber);
 360                 break;
 361         case SYS_DVBT2:
 362                 ret = cxd2820r_read_ber_t2(fe, ber);
 363                 break;
 364         case SYS_DVBC_ANNEX_A:
 365                 ret = cxd2820r_read_ber_c(fe, ber);
 366                 break;
 367         default:
 368                 ret = -EINVAL;
 369                 break;
 370         }
 371         return ret;
 372 }
 373
 374 static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 375 {
 376         struct cxd2820r_priv *priv = fe->demodulator_priv;
 377         int ret;
 378
 379         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 380                         fe->dtv_property_cache.delivery_system);
 381
 382         switch (fe->dtv_property_cache.delivery_system) {
 383         case SYS_DVBT:
 384                 ret = cxd2820r_read_signal_strength_t(fe, strength);
 385                 break;
 386         case SYS_DVBT2:
 387                 ret = cxd2820r_read_signal_strength_t2(fe, strength);
 388                 break;
 389         case SYS_DVBC_ANNEX_A:
 390                 ret = cxd2820r_read_signal_strength_c(fe, strength);
 391                 break;
 392         default:
 393                 ret = -EINVAL;
 394                 break;
 395         }
 396         return ret;
 397 }
 398
 399 static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
 400 {
 401         struct cxd2820r_priv *priv = fe->demodulator_priv;
 402         int ret;
 403
 404         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 405                         fe->dtv_property_cache.delivery_system);
 406
 407         switch (fe->dtv_property_cache.delivery_system) {
 408         case SYS_DVBT:
 409                 ret = cxd2820r_read_snr_t(fe, snr);
 410                 break;
 411         case SYS_DVBT2:
 412                 ret = cxd2820r_read_snr_t2(fe, snr);
 413                 break;
 414         case SYS_DVBC_ANNEX_A:
 415                 ret = cxd2820r_read_snr_c(fe, snr);
 416                 break;
 417         default:
 418                 ret = -EINVAL;
 419                 break;
 420         }
 421         return ret;
 422 }
 423
 424 static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 425 {
 426         struct cxd2820r_priv *priv = fe->demodulator_priv;
 427         int ret;
 428
 429         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 430                         fe->dtv_property_cache.delivery_system);
 431
 432         switch (fe->dtv_property_cache.delivery_system) {
 433         case SYS_DVBT:
 434                 ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
 435                 break;
 436         case SYS_DVBT2:
 437                 ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
 438                 break;
 439         case SYS_DVBC_ANNEX_A:
 440                 ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
 441                 break;
 442         default:
 443                 ret = -EINVAL;
 444                 break;
 445         }
 446         return ret;
 447 }
 448
 449 static int cxd2820r_init(struct dvb_frontend *fe)
 450 {
 451         return 0;
 452 }
 453
 454 static int cxd2820r_sleep(struct dvb_frontend *fe)
 455 {
 456         struct cxd2820r_priv *priv = fe->demodulator_priv;
 457         int ret;
 458
 459         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 460                         fe->dtv_property_cache.delivery_system);
 461
 462         switch (fe->dtv_property_cache.delivery_system) {
 463         case SYS_DVBT:
 464                 ret = cxd2820r_sleep_t(fe);
 465                 break;
 466         case SYS_DVBT2:
 467                 ret = cxd2820r_sleep_t2(fe);
 468                 break;
 469         case SYS_DVBC_ANNEX_A:
 470                 ret = cxd2820r_sleep_c(fe);
 471                 break;
 472         default:
 473                 ret = -EINVAL;
 474                 break;
 475         }
 476         return ret;
 477 }
 478
 479 static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
 480                                       struct dvb_frontend_tune_settings *s)
 481 {
 482         struct cxd2820r_priv *priv = fe->demodulator_priv;
 483         int ret;
 484
 485         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 486                         fe->dtv_property_cache.delivery_system);
 487
 488         switch (fe->dtv_property_cache.delivery_system) {
 489         case SYS_DVBT:
 490                 ret = cxd2820r_get_tune_settings_t(fe, s);
 491                 break;
 492         case SYS_DVBT2:
 493                 ret = cxd2820r_get_tune_settings_t2(fe, s);
 494                 break;
 495         case SYS_DVBC_ANNEX_A:
 496                 ret = cxd2820r_get_tune_settings_c(fe, s);
 497                 break;
 498         default:
 499                 ret = -EINVAL;
 500                 break;
 501         }
 502         return ret;
 503 }
 504
 505 static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe)
 506 {
 507         struct cxd2820r_priv *priv = fe->demodulator_priv;
 508         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 509         int ret, i;
 510         fe_status_t status = 0;
 511
 512         dev_dbg(&priv->i2c->dev, "%s: delsys=%d\n", __func__,
 513                         fe->dtv_property_cache.delivery_system);
 514
 515         /* switch between DVB-T and DVB-T2 when tune fails */
 516         if (priv->last_tune_failed) {
 517                 if (priv->delivery_system == SYS_DVBT) {
 518                         ret = cxd2820r_sleep_t(fe);
 519                         if (ret)
 520                                 goto error;
 521
 522                         c->delivery_system = SYS_DVBT2;
 523                 } else if (priv->delivery_system == SYS_DVBT2) {
 524                         ret = cxd2820r_sleep_t2(fe);
 525                         if (ret)
 526                                 goto error;
 527
 528                         c->delivery_system = SYS_DVBT;
 529                 }
 530         }
 531
 532         /* set frontend */
 533         ret = cxd2820r_set_frontend(fe);
 534         if (ret)
 535                 goto error;
 536
 537
 538         /* frontend lock wait loop count */
 539         switch (priv->delivery_system) {
 540         case SYS_DVBT:
 541         case SYS_DVBC_ANNEX_A:
 542                 i = 20;
 543                 break;
 544         case SYS_DVBT2:
 545                 i = 40;
 546                 break;
 547         case SYS_UNDEFINED:
 548         default:
 549                 i = 0;
 550                 break;
 551         }
 552
 553         /* wait frontend lock */
 554         for (; i > 0; i--) {
 555                 dev_dbg(&priv->i2c->dev, "%s: loop=%d\n", __func__, i);
 556                 msleep(50);
 557                 ret = cxd2820r_read_status(fe, &status);
 558                 if (ret)
 559                         goto error;
 560
 561                 if (status & FE_HAS_LOCK)
 562                         break;
 563         }
 564
 565         /* check if we have a valid signal */
 566         if (status & FE_HAS_LOCK) {
 567                 priv->last_tune_failed = 0;
 568                 return DVBFE_ALGO_SEARCH_SUCCESS;
 569         } else {
 570                 priv->last_tune_failed = 1;
 571                 return DVBFE_ALGO_SEARCH_AGAIN;
 572         }
 573
 574 error:
 575         dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
 576         return DVBFE_ALGO_SEARCH_ERROR;
 577 }
 578
 579 static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
 580 {
 581         return DVBFE_ALGO_CUSTOM;
 582 }
 583
 584 static void cxd2820r_release(struct dvb_frontend *fe)
 585 {
 586         struct cxd2820r_priv *priv = fe->demodulator_priv;
 587         int uninitialized_var(ret); /* silence compiler warning */
 588
 589         dev_dbg(&priv->i2c->dev, "%s\n", __func__);
 590
 591 #ifdef CONFIG_GPIOLIB
 592         /* remove GPIOs */
 593         if (priv->gpio_chip.label) {
 594                 ret = gpiochip_remove(&priv->gpio_chip);
 595                 if (ret)
 596                         dev_err(&priv->i2c->dev, "%s: gpiochip_remove() " \
 597                                         "failed=%d\n", KBUILD_MODNAME, ret);
 598         }
 599 #endif
 600         kfree(priv);
 601         return;
 602 }
 603
 604 static int cxd2820r_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 605 {
 606         struct cxd2820r_priv *priv = fe->demodulator_priv;
 607
 608         dev_dbg(&priv->i2c->dev, "%s: %d\n", __func__, enable);
 609
 610         /* Bit 0 of reg 0xdb in bank 0x00 controls I2C repeater */
 611         return cxd2820r_wr_reg_mask(priv, 0xdb, enable ? 1 : 0, 0x1);
 612 }
 613
 614 #ifdef CONFIG_GPIOLIB
 615 static int cxd2820r_gpio_direction_output(struct gpio_chip *chip, unsigned nr,
 616                 int val)
 617 {
 618         struct cxd2820r_priv *priv =
 619                         container_of(chip, struct cxd2820r_priv, gpio_chip);
 620         u8 gpio[GPIO_COUNT];
 621
 622         dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
 623
 624         memcpy(gpio, priv->gpio, sizeof(gpio));
 625         gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
 626
 627         return cxd2820r_gpio(&priv->fe, gpio);
 628 }
 629
 630 static void cxd2820r_gpio_set(struct gpio_chip *chip, unsigned nr, int val)
 631 {
 632         struct cxd2820r_priv *priv =
 633                         container_of(chip, struct cxd2820r_priv, gpio_chip);
 634         u8 gpio[GPIO_COUNT];
 635
 636         dev_dbg(&priv->i2c->dev, "%s: nr=%d val=%d\n", __func__, nr, val);
 637
 638         memcpy(gpio, priv->gpio, sizeof(gpio));
 639         gpio[nr] = CXD2820R_GPIO_E | CXD2820R_GPIO_O | (val << 2);
 640
 641         (void) cxd2820r_gpio(&priv->fe, gpio);
 642
 643         return;
 644 }
 645
 646 static int cxd2820r_gpio_get(struct gpio_chip *chip, unsigned nr)
 647 {
 648         struct cxd2820r_priv *priv =
 649                         container_of(chip, struct cxd2820r_priv, gpio_chip);
 650
 651         dev_dbg(&priv->i2c->dev, "%s: nr=%d\n", __func__, nr);
 652
 653         return (priv->gpio[nr] >> 2) & 0x01;
 654 }
 655 #endif
 656
 657 static const struct dvb_frontend_ops cxd2820r_ops = {
 658         .delsys = { SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A },
 659         /* default: DVB-T/T2 */
 660         .info = {
 661                 .name = "Sony CXD2820R",
 662
 663                 .caps = FE_CAN_FEC_1_2                  |
 664                         FE_CAN_FEC_2_3                  |
 665                         FE_CAN_FEC_3_4                  |
 666                         FE_CAN_FEC_5_6                  |
 667                         FE_CAN_FEC_7_8                  |
 668                         FE_CAN_FEC_AUTO                 |
 669                         FE_CAN_QPSK                     |
 670                         FE_CAN_QAM_16                   |
 671                         FE_CAN_QAM_32                   |
 672                         FE_CAN_QAM_64                   |
 673                         FE_CAN_QAM_128                  |
 674                         FE_CAN_QAM_256                  |
 675                         FE_CAN_QAM_AUTO                 |
 676                         FE_CAN_TRANSMISSION_MODE_AUTO   |
 677                         FE_CAN_GUARD_INTERVAL_AUTO      |
 678                         FE_CAN_HIERARCHY_AUTO           |
 679                         FE_CAN_MUTE_TS                  |
 680                         FE_CAN_2G_MODULATION            |
 681                         FE_CAN_MULTISTREAM
 682                 },
 683
 684         .release                = cxd2820r_release,
 685         .init                   = cxd2820r_init,
 686         .sleep                  = cxd2820r_sleep,
 687
 688         .get_tune_settings      = cxd2820r_get_tune_settings,
 689         .i2c_gate_ctrl          = cxd2820r_i2c_gate_ctrl,
 690
 691         .get_frontend           = cxd2820r_get_frontend,
 692
 693         .get_frontend_algo      = cxd2820r_get_frontend_algo,
 694         .search                 = cxd2820r_search,
 695
 696         .read_status            = cxd2820r_read_status,
 697         .read_snr               = cxd2820r_read_snr,
 698         .read_ber               = cxd2820r_read_ber,
 699         .read_ucblocks          = cxd2820r_read_ucblocks,
 700         .read_signal_strength   = cxd2820r_read_signal_strength,
 701 };
 702
 703 struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
 704                 struct i2c_adapter *i2c, int *gpio_chip_base
 705 )
 706 {
 707         struct cxd2820r_priv *priv;
 708         int ret;
 709         u8 tmp;
 710
 711         priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
 712         if (!priv) {
 713                 ret = -ENOMEM;
 714                 dev_err(&i2c->dev, "%s: kzalloc() failed\n",
 715                                 KBUILD_MODNAME);
 716                 goto error;
 717         }
 718
 719         priv->i2c = i2c;
 720         memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
 721         memcpy(&priv->fe.ops, &cxd2820r_ops, sizeof(struct dvb_frontend_ops));
 722         priv->fe.demodulator_priv = priv;
 723
 724         priv->bank[0] = priv->bank[1] = 0xff;
 725         ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
 726         dev_dbg(&priv->i2c->dev, "%s: chip id=%02x\n", __func__, tmp);
 727         if (ret || tmp != 0xe1)
 728                 goto error;
 729
 730         if (gpio_chip_base) {
 731 #ifdef CONFIG_GPIOLIB
 732                 /* add GPIOs */
 733                 priv->gpio_chip.label = KBUILD_MODNAME;
 734                 priv->gpio_chip.dev = &priv->i2c->dev;
 735                 priv->gpio_chip.owner = THIS_MODULE;
 736                 priv->gpio_chip.direction_output =
 737                                 cxd2820r_gpio_direction_output;
 738                 priv->gpio_chip.set = cxd2820r_gpio_set;
 739                 priv->gpio_chip.get = cxd2820r_gpio_get;
 740                 priv->gpio_chip.base = -1; /* dynamic allocation */
 741                 priv->gpio_chip.ngpio = GPIO_COUNT;
 742                 priv->gpio_chip.can_sleep = 1;
 743                 ret = gpiochip_add(&priv->gpio_chip);
 744                 if (ret)
 745                         goto error;
 746
 747                 dev_dbg(&priv->i2c->dev, "%s: gpio_chip.base=%d\n", __func__,
 748                                 priv->gpio_chip.base);
 749
 750                 *gpio_chip_base = priv->gpio_chip.base;
 751 #else
 752                 /*
 753                  * Use static GPIO configuration if GPIOLIB is undefined.
 754                  * This is fallback condition.
 755                  */
 756                 u8 gpio[GPIO_COUNT];
 757                 gpio[0] = (*gpio_chip_base >> 0) & 0x07;
 758                 gpio[1] = (*gpio_chip_base >> 3) & 0x07;
 759                 gpio[2] = 0;
 760                 ret = cxd2820r_gpio(&priv->fe, gpio);
 761                 if (ret)
 762                         goto error;
 763 #endif
 764         }
 765
 766         return &priv->fe;
 767 error:
 768         dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
 769         kfree(priv);
 770         return NULL;
 771 }
 772 EXPORT_SYMBOL(cxd2820r_attach);
 773
 774 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
 775 MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
 776 MODULE_LICENSE("GPL");