2 * i.MX drm driver - LVDS display bridge
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
21 #include <linux/module.h>
22 #include <linux/clk.h>
24 #include <drm/drm_fb_helper.h>
25 #include <drm/drm_crtc_helper.h>
26 #include <linux/mfd/syscon.h>
27 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
28 #include <linux/of_address.h>
29 #include <linux/of_device.h>
30 #include <video/of_videomode.h>
31 #include <linux/regmap.h>
32 #include <linux/videodev2.h>
36 #define DRIVER_NAME "imx-ldb"
38 #define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
39 #define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
40 #define LDB_CH0_MODE_EN_MASK (3 << 0)
41 #define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
42 #define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
43 #define LDB_CH1_MODE_EN_MASK (3 << 2)
44 #define LDB_SPLIT_MODE_EN (1 << 4)
45 #define LDB_DATA_WIDTH_CH0_24 (1 << 5)
46 #define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
47 #define LDB_DATA_WIDTH_CH1_24 (1 << 7)
48 #define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
49 #define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
50 #define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
51 #define LDB_BGREF_RMODE_INT (1 << 15)
53 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
54 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
58 struct imx_ldb_channel
{
60 struct drm_connector connector
;
61 struct imx_drm_connector
*imx_drm_connector
;
62 struct drm_encoder encoder
;
63 struct imx_drm_encoder
*imx_drm_encoder
;
67 struct drm_display_mode mode
;
78 struct regmap
*regmap
;
80 struct imx_ldb_channel channel
[2];
81 struct clk
*clk
[2]; /* our own clock */
82 struct clk
*clk_sel
[4]; /* parent of display clock */
83 struct clk
*clk_pll
[2]; /* upstream clock we can adjust */
85 const struct bus_mux
*lvds_mux
;
88 static enum drm_connector_status
imx_ldb_connector_detect(
89 struct drm_connector
*connector
, bool force
)
91 return connector_status_connected
;
94 static void imx_ldb_connector_destroy(struct drm_connector
*connector
)
96 /* do not free here */
99 static int imx_ldb_connector_get_modes(struct drm_connector
*connector
)
101 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
104 if (imx_ldb_ch
->edid
) {
105 drm_mode_connector_update_edid_property(connector
,
107 num_modes
= drm_add_edid_modes(connector
, imx_ldb_ch
->edid
);
110 if (imx_ldb_ch
->mode_valid
) {
111 struct drm_display_mode
*mode
;
113 mode
= drm_mode_create(connector
->dev
);
114 drm_mode_copy(mode
, &imx_ldb_ch
->mode
);
115 mode
->type
|= DRM_MODE_TYPE_DRIVER
| DRM_MODE_TYPE_PREFERRED
;
116 drm_mode_probed_add(connector
, mode
);
123 static int imx_ldb_connector_mode_valid(struct drm_connector
*connector
,
124 struct drm_display_mode
*mode
)
129 static struct drm_encoder
*imx_ldb_connector_best_encoder(
130 struct drm_connector
*connector
)
132 struct imx_ldb_channel
*imx_ldb_ch
= con_to_imx_ldb_ch(connector
);
134 return &imx_ldb_ch
->encoder
;
137 static void imx_ldb_encoder_dpms(struct drm_encoder
*encoder
, int mode
)
141 static bool imx_ldb_encoder_mode_fixup(struct drm_encoder
*encoder
,
142 const struct drm_display_mode
*mode
,
143 struct drm_display_mode
*adjusted_mode
)
148 static void imx_ldb_set_clock(struct imx_ldb
*ldb
, int mux
, int chno
,
149 unsigned long serial_clk
, unsigned long di_clk
)
153 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
154 clk_get_rate(ldb
->clk_pll
[chno
]), serial_clk
);
155 clk_set_rate(ldb
->clk_pll
[chno
], serial_clk
);
157 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
158 clk_get_rate(ldb
->clk_pll
[chno
]));
160 dev_dbg(ldb
->dev
, "%s: now: %ld want: %ld\n", __func__
,
161 clk_get_rate(ldb
->clk
[chno
]),
163 clk_set_rate(ldb
->clk
[chno
], di_clk
);
165 dev_dbg(ldb
->dev
, "%s after: %ld\n", __func__
,
166 clk_get_rate(ldb
->clk
[chno
]));
168 /* set display clock mux to LDB input clock */
169 ret
= clk_set_parent(ldb
->clk_sel
[mux
], ldb
->clk
[chno
]);
171 dev_err(ldb
->dev
, "unable to set di%d parent clock to ldb_di%d\n", mux
, chno
);
174 static void imx_ldb_encoder_prepare(struct drm_encoder
*encoder
)
176 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
177 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
178 struct drm_display_mode
*mode
= &encoder
->crtc
->mode
;
180 unsigned long serial_clk
;
181 unsigned long di_clk
= mode
->clock
* 1000;
182 int mux
= imx_drm_encoder_get_mux_id(imx_ldb_ch
->imx_drm_encoder
,
185 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
186 /* dual channel LVDS mode */
187 serial_clk
= 3500UL * mode
->clock
;
188 imx_ldb_set_clock(ldb
, mux
, 0, serial_clk
, di_clk
);
189 imx_ldb_set_clock(ldb
, mux
, 1, serial_clk
, di_clk
);
191 serial_clk
= 7000UL * mode
->clock
;
192 imx_ldb_set_clock(ldb
, mux
, imx_ldb_ch
->chno
, serial_clk
, di_clk
);
195 switch (imx_ldb_ch
->chno
) {
197 pixel_fmt
= (ldb
->ldb_ctrl
& LDB_DATA_WIDTH_CH0_24
) ?
198 V4L2_PIX_FMT_RGB24
: V4L2_PIX_FMT_BGR666
;
201 pixel_fmt
= (ldb
->ldb_ctrl
& LDB_DATA_WIDTH_CH1_24
) ?
202 V4L2_PIX_FMT_RGB24
: V4L2_PIX_FMT_BGR666
;
205 dev_err(ldb
->dev
, "unable to config di%d panel format\n",
207 pixel_fmt
= V4L2_PIX_FMT_RGB24
;
210 imx_drm_crtc_panel_format(encoder
->crtc
, DRM_MODE_ENCODER_LVDS
,
214 static void imx_ldb_encoder_commit(struct drm_encoder
*encoder
)
216 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
217 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
218 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
219 int mux
= imx_drm_encoder_get_mux_id(imx_ldb_ch
->imx_drm_encoder
,
223 clk_prepare_enable(ldb
->clk
[0]);
224 clk_prepare_enable(ldb
->clk
[1]);
227 if (imx_ldb_ch
== &ldb
->channel
[0] || dual
) {
228 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
229 if (mux
== 0 || ldb
->lvds_mux
)
230 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI0
;
232 ldb
->ldb_ctrl
|= LDB_CH0_MODE_EN_TO_DI1
;
234 if (imx_ldb_ch
== &ldb
->channel
[1] || dual
) {
235 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
236 if (mux
== 1 || ldb
->lvds_mux
)
237 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI1
;
239 ldb
->ldb_ctrl
|= LDB_CH1_MODE_EN_TO_DI0
;
243 const struct bus_mux
*lvds_mux
= NULL
;
245 if (imx_ldb_ch
== &ldb
->channel
[0])
246 lvds_mux
= &ldb
->lvds_mux
[0];
247 else if (imx_ldb_ch
== &ldb
->channel
[1])
248 lvds_mux
= &ldb
->lvds_mux
[1];
250 regmap_update_bits(ldb
->regmap
, lvds_mux
->reg
, lvds_mux
->mask
,
251 mux
<< lvds_mux
->shift
);
254 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
257 static void imx_ldb_encoder_mode_set(struct drm_encoder
*encoder
,
258 struct drm_display_mode
*mode
,
259 struct drm_display_mode
*adjusted_mode
)
261 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
262 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
263 int dual
= ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
;
265 if (mode
->clock
> 170000) {
267 "%s: mode exceeds 170 MHz pixel clock\n", __func__
);
269 if (mode
->clock
> 85000 && !dual
) {
271 "%s: mode exceeds 85 MHz pixel clock\n", __func__
);
274 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
275 if (imx_ldb_ch
== &ldb
->channel
[0]) {
276 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
277 ldb
->ldb_ctrl
|= LDB_DI0_VS_POL_ACT_LOW
;
278 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
279 ldb
->ldb_ctrl
&= ~LDB_DI0_VS_POL_ACT_LOW
;
281 if (imx_ldb_ch
== &ldb
->channel
[1]) {
282 if (mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
283 ldb
->ldb_ctrl
|= LDB_DI1_VS_POL_ACT_LOW
;
284 else if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
285 ldb
->ldb_ctrl
&= ~LDB_DI1_VS_POL_ACT_LOW
;
289 static void imx_ldb_encoder_disable(struct drm_encoder
*encoder
)
291 struct imx_ldb_channel
*imx_ldb_ch
= enc_to_imx_ldb_ch(encoder
);
292 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
295 * imx_ldb_encoder_disable is called by
296 * drm_helper_disable_unused_functions without
297 * the encoder being enabled before.
299 if (imx_ldb_ch
== &ldb
->channel
[0] &&
300 (ldb
->ldb_ctrl
& LDB_CH0_MODE_EN_MASK
) == 0)
302 else if (imx_ldb_ch
== &ldb
->channel
[1] &&
303 (ldb
->ldb_ctrl
& LDB_CH1_MODE_EN_MASK
) == 0)
306 if (imx_ldb_ch
== &ldb
->channel
[0])
307 ldb
->ldb_ctrl
&= ~LDB_CH0_MODE_EN_MASK
;
308 else if (imx_ldb_ch
== &ldb
->channel
[1])
309 ldb
->ldb_ctrl
&= ~LDB_CH1_MODE_EN_MASK
;
311 regmap_write(ldb
->regmap
, IOMUXC_GPR2
, ldb
->ldb_ctrl
);
313 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
314 clk_disable_unprepare(ldb
->clk
[0]);
315 clk_disable_unprepare(ldb
->clk
[1]);
319 static void imx_ldb_encoder_destroy(struct drm_encoder
*encoder
)
321 /* do not free here */
324 static struct drm_connector_funcs imx_ldb_connector_funcs
= {
325 .dpms
= drm_helper_connector_dpms
,
326 .fill_modes
= drm_helper_probe_single_connector_modes
,
327 .detect
= imx_ldb_connector_detect
,
328 .destroy
= imx_ldb_connector_destroy
,
331 static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs
= {
332 .get_modes
= imx_ldb_connector_get_modes
,
333 .best_encoder
= imx_ldb_connector_best_encoder
,
334 .mode_valid
= imx_ldb_connector_mode_valid
,
337 static struct drm_encoder_funcs imx_ldb_encoder_funcs
= {
338 .destroy
= imx_ldb_encoder_destroy
,
341 static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs
= {
342 .dpms
= imx_ldb_encoder_dpms
,
343 .mode_fixup
= imx_ldb_encoder_mode_fixup
,
344 .prepare
= imx_ldb_encoder_prepare
,
345 .commit
= imx_ldb_encoder_commit
,
346 .mode_set
= imx_ldb_encoder_mode_set
,
347 .disable
= imx_ldb_encoder_disable
,
350 static int imx_ldb_get_clk(struct imx_ldb
*ldb
, int chno
)
354 sprintf(clkname
, "di%d", chno
);
355 ldb
->clk
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
356 if (IS_ERR(ldb
->clk
[chno
]))
357 return PTR_ERR(ldb
->clk
[chno
]);
359 sprintf(clkname
, "di%d_pll", chno
);
360 ldb
->clk_pll
[chno
] = devm_clk_get(ldb
->dev
, clkname
);
362 return PTR_ERR_OR_ZERO(ldb
->clk_pll
[chno
]);
365 static int imx_ldb_register(struct imx_ldb_channel
*imx_ldb_ch
)
368 struct imx_ldb
*ldb
= imx_ldb_ch
->ldb
;
370 ret
= imx_ldb_get_clk(ldb
, imx_ldb_ch
->chno
);
373 if (ldb
->ldb_ctrl
& LDB_SPLIT_MODE_EN
) {
374 ret
|= imx_ldb_get_clk(ldb
, 1);
379 imx_ldb_ch
->connector
.funcs
= &imx_ldb_connector_funcs
;
380 imx_ldb_ch
->encoder
.funcs
= &imx_ldb_encoder_funcs
;
382 imx_ldb_ch
->encoder
.encoder_type
= DRM_MODE_ENCODER_LVDS
;
383 imx_ldb_ch
->connector
.connector_type
= DRM_MODE_CONNECTOR_LVDS
;
385 drm_encoder_helper_add(&imx_ldb_ch
->encoder
,
386 &imx_ldb_encoder_helper_funcs
);
387 ret
= imx_drm_add_encoder(&imx_ldb_ch
->encoder
,
388 &imx_ldb_ch
->imx_drm_encoder
, THIS_MODULE
);
390 dev_err(ldb
->dev
, "adding encoder failed with %d\n", ret
);
394 drm_connector_helper_add(&imx_ldb_ch
->connector
,
395 &imx_ldb_connector_helper_funcs
);
397 ret
= imx_drm_add_connector(&imx_ldb_ch
->connector
,
398 &imx_ldb_ch
->imx_drm_connector
, THIS_MODULE
);
400 imx_drm_remove_encoder(imx_ldb_ch
->imx_drm_encoder
);
401 dev_err(ldb
->dev
, "adding connector failed with %d\n", ret
);
405 drm_mode_connector_attach_encoder(&imx_ldb_ch
->connector
,
406 &imx_ldb_ch
->encoder
);
416 static const char * const imx_ldb_bit_mappings
[] = {
417 [LVDS_BIT_MAP_SPWG
] = "spwg",
418 [LVDS_BIT_MAP_JEIDA
] = "jeida",
421 static const int of_get_data_mapping(struct device_node
*np
)
426 ret
= of_property_read_string(np
, "fsl,data-mapping", &bm
);
430 for (i
= 0; i
< ARRAY_SIZE(imx_ldb_bit_mappings
); i
++)
431 if (!strcasecmp(bm
, imx_ldb_bit_mappings
[i
]))
437 static struct bus_mux imx6q_lvds_mux
[2] = {
441 .mask
= IMX6Q_GPR3_LVDS0_MUX_CTL_MASK
,
445 .mask
= IMX6Q_GPR3_LVDS1_MUX_CTL_MASK
,
450 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
451 * of_match_device will walk through this list and take the first entry
452 * matching any of its compatible values. Therefore, the more generic
453 * entries (in this case fsl,imx53-ldb) need to be ordered last.
455 static const struct of_device_id imx_ldb_dt_ids
[] = {
456 { .compatible
= "fsl,imx6q-ldb", .data
= imx6q_lvds_mux
, },
457 { .compatible
= "fsl,imx53-ldb", .data
= NULL
, },
460 MODULE_DEVICE_TABLE(of
, imx_ldb_dt_ids
);
462 static int imx_ldb_probe(struct platform_device
*pdev
)
464 struct device_node
*np
= pdev
->dev
.of_node
;
465 const struct of_device_id
*of_id
=
466 of_match_device(imx_ldb_dt_ids
, &pdev
->dev
);
467 struct device_node
*child
;
469 struct imx_ldb
*imx_ldb
;
476 imx_ldb
= devm_kzalloc(&pdev
->dev
, sizeof(*imx_ldb
), GFP_KERNEL
);
480 imx_ldb
->regmap
= syscon_regmap_lookup_by_phandle(np
, "gpr");
481 if (IS_ERR(imx_ldb
->regmap
)) {
482 dev_err(&pdev
->dev
, "failed to get parent regmap\n");
483 return PTR_ERR(imx_ldb
->regmap
);
486 imx_ldb
->dev
= &pdev
->dev
;
489 imx_ldb
->lvds_mux
= of_id
->data
;
491 dual
= of_property_read_bool(np
, "fsl,dual-channel");
493 imx_ldb
->ldb_ctrl
|= LDB_SPLIT_MODE_EN
;
496 * There are three different possible clock mux configurations:
497 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
498 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
499 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
500 * Map them all to di0_sel...di3_sel.
502 for (i
= 0; i
< 4; i
++) {
505 sprintf(clkname
, "di%d_sel", i
);
506 imx_ldb
->clk_sel
[i
] = devm_clk_get(imx_ldb
->dev
, clkname
);
507 if (IS_ERR(imx_ldb
->clk_sel
[i
])) {
508 ret
= PTR_ERR(imx_ldb
->clk_sel
[i
]);
509 imx_ldb
->clk_sel
[i
] = NULL
;
516 for_each_child_of_node(np
, child
) {
517 struct imx_ldb_channel
*channel
;
519 ret
= of_property_read_u32(child
, "reg", &i
);
520 if (ret
|| i
< 0 || i
> 1)
524 dev_warn(&pdev
->dev
, "dual-channel mode, ignoring second output\n");
528 if (!of_device_is_available(child
))
531 channel
= &imx_ldb
->channel
[i
];
532 channel
->ldb
= imx_ldb
;
535 edidp
= of_get_property(child
, "edid", &channel
->edid_len
);
537 channel
->edid
= kmemdup(edidp
, channel
->edid_len
,
540 ret
= of_get_drm_display_mode(child
, &channel
->mode
, 0);
542 channel
->mode_valid
= 1;
545 ret
= of_property_read_u32(child
, "fsl,data-width", &datawidth
);
548 else if (datawidth
!= 18 && datawidth
!= 24)
551 mapping
= of_get_data_mapping(child
);
553 case LVDS_BIT_MAP_SPWG
:
554 if (datawidth
== 24) {
556 imx_ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
;
558 imx_ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
;
561 case LVDS_BIT_MAP_JEIDA
:
562 if (datawidth
== 18) {
563 dev_err(&pdev
->dev
, "JEIDA standard only supported in 24 bit\n");
567 imx_ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH0_24
| LDB_BIT_MAP_CH0_JEIDA
;
569 imx_ldb
->ldb_ctrl
|= LDB_DATA_WIDTH_CH1_24
| LDB_BIT_MAP_CH1_JEIDA
;
572 dev_err(&pdev
->dev
, "data mapping not specified or invalid\n");
576 ret
= imx_ldb_register(channel
);
580 imx_drm_encoder_add_possible_crtcs(channel
->imx_drm_encoder
, child
);
583 platform_set_drvdata(pdev
, imx_ldb
);
588 static int imx_ldb_remove(struct platform_device
*pdev
)
590 struct imx_ldb
*imx_ldb
= platform_get_drvdata(pdev
);
593 for (i
= 0; i
< 2; i
++) {
594 struct imx_ldb_channel
*channel
= &imx_ldb
->channel
[i
];
595 struct drm_connector
*connector
= &channel
->connector
;
596 struct drm_encoder
*encoder
= &channel
->encoder
;
598 drm_mode_connector_detach_encoder(connector
, encoder
);
600 imx_drm_remove_connector(channel
->imx_drm_connector
);
601 imx_drm_remove_encoder(channel
->imx_drm_encoder
);
607 static struct platform_driver imx_ldb_driver
= {
608 .probe
= imx_ldb_probe
,
609 .remove
= imx_ldb_remove
,
611 .of_match_table
= imx_ldb_dt_ids
,
613 .owner
= THIS_MODULE
,
617 module_platform_driver(imx_ldb_driver
);
619 MODULE_DESCRIPTION("i.MX LVDS driver");
620 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
621 MODULE_LICENSE("GPL");
622 MODULE_ALIAS("platform:" DRIVER_NAME
);