Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux/fpc-iii.git] / drivers / staging / imx-drm / ipuv3-crtc.c
blob22be104fbda97526980481011ad5250121b52948
1 /*
2 * i.MX IPUv3 Graphics driver
4 * Copyright (C) 2011 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
18 * MA 02110-1301, USA.
20 #include <linux/module.h>
21 #include <linux/export.h>
22 #include <linux/device.h>
23 #include <linux/platform_device.h>
24 #include <drm/drmP.h>
25 #include <drm/drm_crtc_helper.h>
26 #include <linux/fb.h>
27 #include <linux/clk.h>
28 #include <linux/errno.h>
29 #include <drm/drm_gem_cma_helper.h>
30 #include <drm/drm_fb_cma_helper.h>
32 #include "ipu-v3/imx-ipu-v3.h"
33 #include "imx-drm.h"
34 #include "ipuv3-plane.h"
36 #define DRIVER_DESC "i.MX IPUv3 Graphics"
38 struct ipu_crtc {
39 struct device *dev;
40 struct drm_crtc base;
41 struct imx_drm_crtc *imx_crtc;
43 /* plane[0] is the full plane, plane[1] is the partial plane */
44 struct ipu_plane *plane[2];
46 struct ipu_dc *dc;
47 struct ipu_di *di;
48 int enabled;
49 struct drm_pending_vblank_event *page_flip_event;
50 struct drm_framebuffer *newfb;
51 int irq;
52 u32 interface_pix_fmt;
53 unsigned long di_clkflags;
54 int di_hsync_pin;
55 int di_vsync_pin;
58 #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
60 static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
62 if (ipu_crtc->enabled)
63 return;
65 ipu_di_enable(ipu_crtc->di);
66 ipu_dc_enable_channel(ipu_crtc->dc);
67 ipu_plane_enable(ipu_crtc->plane[0]);
69 ipu_crtc->enabled = 1;
72 static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
74 if (!ipu_crtc->enabled)
75 return;
77 ipu_plane_disable(ipu_crtc->plane[0]);
78 ipu_dc_disable_channel(ipu_crtc->dc);
79 ipu_di_disable(ipu_crtc->di);
81 ipu_crtc->enabled = 0;
84 static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
86 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
88 dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
90 switch (mode) {
91 case DRM_MODE_DPMS_ON:
92 ipu_fb_enable(ipu_crtc);
93 break;
94 case DRM_MODE_DPMS_STANDBY:
95 case DRM_MODE_DPMS_SUSPEND:
96 case DRM_MODE_DPMS_OFF:
97 ipu_fb_disable(ipu_crtc);
98 break;
102 static int ipu_page_flip(struct drm_crtc *crtc,
103 struct drm_framebuffer *fb,
104 struct drm_pending_vblank_event *event,
105 uint32_t page_flip_flags)
107 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
108 int ret;
110 if (ipu_crtc->newfb)
111 return -EBUSY;
113 ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
114 if (ret) {
115 dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
116 list_del(&event->base.link);
118 return ret;
121 ipu_crtc->newfb = fb;
122 ipu_crtc->page_flip_event = event;
123 crtc->fb = fb;
125 return 0;
128 static const struct drm_crtc_funcs ipu_crtc_funcs = {
129 .set_config = drm_crtc_helper_set_config,
130 .destroy = drm_crtc_cleanup,
131 .page_flip = ipu_page_flip,
134 static int ipu_crtc_mode_set(struct drm_crtc *crtc,
135 struct drm_display_mode *orig_mode,
136 struct drm_display_mode *mode,
137 int x, int y,
138 struct drm_framebuffer *old_fb)
140 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
141 int ret;
142 struct ipu_di_signal_cfg sig_cfg = {};
143 u32 out_pixel_fmt;
145 dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
146 mode->hdisplay);
147 dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
148 mode->vdisplay);
150 out_pixel_fmt = ipu_crtc->interface_pix_fmt;
152 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
153 sig_cfg.interlaced = 1;
154 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
155 sig_cfg.Hsync_pol = 1;
156 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
157 sig_cfg.Vsync_pol = 1;
159 sig_cfg.enable_pol = 1;
160 sig_cfg.clk_pol = 1;
161 sig_cfg.width = mode->hdisplay;
162 sig_cfg.height = mode->vdisplay;
163 sig_cfg.pixel_fmt = out_pixel_fmt;
164 sig_cfg.h_start_width = mode->htotal - mode->hsync_end;
165 sig_cfg.h_sync_width = mode->hsync_end - mode->hsync_start;
166 sig_cfg.h_end_width = mode->hsync_start - mode->hdisplay;
168 sig_cfg.v_start_width = mode->vtotal - mode->vsync_end;
169 sig_cfg.v_sync_width = mode->vsync_end - mode->vsync_start;
170 sig_cfg.v_end_width = mode->vsync_start - mode->vdisplay;
171 sig_cfg.pixelclock = mode->clock * 1000;
172 sig_cfg.clkflags = ipu_crtc->di_clkflags;
174 sig_cfg.v_to_h_sync = 0;
176 sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
177 sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;
179 ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, sig_cfg.interlaced,
180 out_pixel_fmt, mode->hdisplay);
181 if (ret) {
182 dev_err(ipu_crtc->dev,
183 "initializing display controller failed with %d\n",
184 ret);
185 return ret;
188 ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
189 if (ret) {
190 dev_err(ipu_crtc->dev,
191 "initializing panel failed with %d\n", ret);
192 return ret;
195 return ipu_plane_mode_set(ipu_crtc->plane[0], crtc, mode, crtc->fb,
196 0, 0, mode->hdisplay, mode->vdisplay,
197 x, y, mode->hdisplay, mode->vdisplay);
200 static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
202 unsigned long flags;
203 struct drm_device *drm = ipu_crtc->base.dev;
205 spin_lock_irqsave(&drm->event_lock, flags);
206 if (ipu_crtc->page_flip_event)
207 drm_send_vblank_event(drm, -1, ipu_crtc->page_flip_event);
208 ipu_crtc->page_flip_event = NULL;
209 imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
210 spin_unlock_irqrestore(&drm->event_lock, flags);
213 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
215 struct ipu_crtc *ipu_crtc = dev_id;
217 imx_drm_handle_vblank(ipu_crtc->imx_crtc);
219 if (ipu_crtc->newfb) {
220 ipu_crtc->newfb = NULL;
221 ipu_plane_set_base(ipu_crtc->plane[0], ipu_crtc->base.fb,
222 ipu_crtc->plane[0]->x, ipu_crtc->plane[0]->y);
223 ipu_crtc_handle_pageflip(ipu_crtc);
226 return IRQ_HANDLED;
229 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
230 const struct drm_display_mode *mode,
231 struct drm_display_mode *adjusted_mode)
233 return true;
236 static void ipu_crtc_prepare(struct drm_crtc *crtc)
238 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
240 ipu_fb_disable(ipu_crtc);
243 static void ipu_crtc_commit(struct drm_crtc *crtc)
245 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
247 ipu_fb_enable(ipu_crtc);
250 static struct drm_crtc_helper_funcs ipu_helper_funcs = {
251 .dpms = ipu_crtc_dpms,
252 .mode_fixup = ipu_crtc_mode_fixup,
253 .mode_set = ipu_crtc_mode_set,
254 .prepare = ipu_crtc_prepare,
255 .commit = ipu_crtc_commit,
258 static int ipu_enable_vblank(struct drm_crtc *crtc)
260 return 0;
263 static void ipu_disable_vblank(struct drm_crtc *crtc)
265 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
267 ipu_crtc->page_flip_event = NULL;
268 ipu_crtc->newfb = NULL;
271 static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc, u32 encoder_type,
272 u32 pixfmt, int hsync_pin, int vsync_pin)
274 struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
276 ipu_crtc->interface_pix_fmt = pixfmt;
277 ipu_crtc->di_hsync_pin = hsync_pin;
278 ipu_crtc->di_vsync_pin = vsync_pin;
280 switch (encoder_type) {
281 case DRM_MODE_ENCODER_DAC:
282 case DRM_MODE_ENCODER_TVDAC:
283 case DRM_MODE_ENCODER_LVDS:
284 ipu_crtc->di_clkflags = IPU_DI_CLKMODE_SYNC |
285 IPU_DI_CLKMODE_EXT;
286 break;
287 case DRM_MODE_ENCODER_NONE:
288 ipu_crtc->di_clkflags = 0;
289 break;
292 return 0;
295 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
296 .enable_vblank = ipu_enable_vblank,
297 .disable_vblank = ipu_disable_vblank,
298 .set_interface_pix_fmt = ipu_set_interface_pix_fmt,
299 .crtc_funcs = &ipu_crtc_funcs,
300 .crtc_helper_funcs = &ipu_helper_funcs,
303 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
305 if (!IS_ERR_OR_NULL(ipu_crtc->dc))
306 ipu_dc_put(ipu_crtc->dc);
307 if (!IS_ERR_OR_NULL(ipu_crtc->di))
308 ipu_di_put(ipu_crtc->di);
311 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
312 struct ipu_client_platformdata *pdata)
314 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
315 int ret;
317 ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
318 if (IS_ERR(ipu_crtc->dc)) {
319 ret = PTR_ERR(ipu_crtc->dc);
320 goto err_out;
323 ipu_crtc->di = ipu_di_get(ipu, pdata->di);
324 if (IS_ERR(ipu_crtc->di)) {
325 ret = PTR_ERR(ipu_crtc->di);
326 goto err_out;
329 return 0;
330 err_out:
331 ipu_put_resources(ipu_crtc);
333 return ret;
336 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
337 struct ipu_client_platformdata *pdata)
339 struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
340 int dp = -EINVAL;
341 int ret;
342 int id;
344 ret = ipu_get_resources(ipu_crtc, pdata);
345 if (ret) {
346 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
347 ret);
348 return ret;
351 ret = imx_drm_add_crtc(&ipu_crtc->base,
352 &ipu_crtc->imx_crtc,
353 &ipu_crtc_helper_funcs, THIS_MODULE,
354 ipu_crtc->dev->parent->of_node, pdata->di);
355 if (ret) {
356 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
357 goto err_put_resources;
360 if (pdata->dp >= 0)
361 dp = IPU_DP_FLOW_SYNC_BG;
362 id = imx_drm_crtc_id(ipu_crtc->imx_crtc);
363 ipu_crtc->plane[0] = ipu_plane_init(ipu_crtc->base.dev, ipu,
364 pdata->dma[0], dp, BIT(id), true);
365 ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
366 if (ret) {
367 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
368 ret);
369 goto err_remove_crtc;
372 /* If this crtc is using the DP, add an overlay plane */
373 if (pdata->dp >= 0 && pdata->dma[1] > 0) {
374 ipu_crtc->plane[1] = ipu_plane_init(ipu_crtc->base.dev, ipu,
375 pdata->dma[1],
376 IPU_DP_FLOW_SYNC_FG,
377 BIT(id), false);
378 if (IS_ERR(ipu_crtc->plane[1]))
379 ipu_crtc->plane[1] = NULL;
382 ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
383 ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
384 "imx_drm", ipu_crtc);
385 if (ret < 0) {
386 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
387 goto err_put_plane_res;
390 return 0;
392 err_put_plane_res:
393 ipu_plane_put_resources(ipu_crtc->plane[0]);
394 err_remove_crtc:
395 imx_drm_remove_crtc(ipu_crtc->imx_crtc);
396 err_put_resources:
397 ipu_put_resources(ipu_crtc);
399 return ret;
402 static int ipu_drm_probe(struct platform_device *pdev)
404 struct ipu_client_platformdata *pdata = pdev->dev.platform_data;
405 struct ipu_crtc *ipu_crtc;
406 int ret;
408 if (!pdata)
409 return -EINVAL;
411 ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
412 if (ret)
413 return ret;
415 ipu_crtc = devm_kzalloc(&pdev->dev, sizeof(*ipu_crtc), GFP_KERNEL);
416 if (!ipu_crtc)
417 return -ENOMEM;
419 ipu_crtc->dev = &pdev->dev;
421 ret = ipu_crtc_init(ipu_crtc, pdata);
422 if (ret)
423 return ret;
425 platform_set_drvdata(pdev, ipu_crtc);
427 return 0;
430 static int ipu_drm_remove(struct platform_device *pdev)
432 struct ipu_crtc *ipu_crtc = platform_get_drvdata(pdev);
434 imx_drm_remove_crtc(ipu_crtc->imx_crtc);
436 ipu_plane_put_resources(ipu_crtc->plane[0]);
437 ipu_put_resources(ipu_crtc);
439 return 0;
442 static struct platform_driver ipu_drm_driver = {
443 .driver = {
444 .name = "imx-ipuv3-crtc",
446 .probe = ipu_drm_probe,
447 .remove = ipu_drm_remove,
449 module_platform_driver(ipu_drm_driver);
451 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
452 MODULE_DESCRIPTION(DRIVER_DESC);
453 MODULE_LICENSE("GPL");
454 MODULE_ALIAS("platform:imx-ipuv3-crtc");