Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
[linux/fpc-iii.git] / drivers / usb / host / ehci-fsl.c
blob6f2c8d3899d2cfb00f14fe641341f68944943213
1 /*
2 * Copyright 2005-2009 MontaVista Software, Inc.
3 * Copyright 2008,2012 Freescale Semiconductor, Inc.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software Foundation,
17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
20 * by Hunter Wu.
21 * Power Management support by Dave Liu <daveliu@freescale.com>,
22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23 * Anton Vorontsov <avorontsov@ru.mvista.com>.
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/err.h>
31 #include <linux/platform_device.h>
32 #include <linux/fsl_devices.h>
34 #include "ehci-fsl.h"
36 /* configure so an HC device and id are always provided */
37 /* always called with process context; sleeping is OK */
39 /**
40 * usb_hcd_fsl_probe - initialize FSL-based HCDs
41 * @drvier: Driver to be used for this HCD
42 * @pdev: USB Host Controller being probed
43 * Context: !in_interrupt()
45 * Allocates basic resources for this USB host controller.
48 static int usb_hcd_fsl_probe(const struct hc_driver *driver,
49 struct platform_device *pdev)
51 struct fsl_usb2_platform_data *pdata;
52 struct usb_hcd *hcd;
53 struct resource *res;
54 int irq;
55 int retval;
57 pr_debug("initializing FSL-SOC USB Controller\n");
59 /* Need platform data for setup */
60 pdata = dev_get_platdata(&pdev->dev);
61 if (!pdata) {
62 dev_err(&pdev->dev,
63 "No platform data for %s.\n", dev_name(&pdev->dev));
64 return -ENODEV;
68 * This is a host mode driver, verify that we're supposed to be
69 * in host mode.
71 if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
72 (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
73 (pdata->operating_mode == FSL_USB2_DR_OTG))) {
74 dev_err(&pdev->dev,
75 "Non Host Mode configured for %s. Wrong driver linked.\n",
76 dev_name(&pdev->dev));
77 return -ENODEV;
80 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
81 if (!res) {
82 dev_err(&pdev->dev,
83 "Found HC with no IRQ. Check %s setup!\n",
84 dev_name(&pdev->dev));
85 return -ENODEV;
87 irq = res->start;
89 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
90 if (!hcd) {
91 retval = -ENOMEM;
92 goto err1;
95 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
96 if (!res) {
97 dev_err(&pdev->dev,
98 "Found HC with no register addr. Check %s setup!\n",
99 dev_name(&pdev->dev));
100 retval = -ENODEV;
101 goto err2;
103 hcd->rsrc_start = res->start;
104 hcd->rsrc_len = resource_size(res);
105 hcd->regs = devm_ioremap_resource(&pdev->dev, res);
106 if (IS_ERR(hcd->regs)) {
107 retval = PTR_ERR(hcd->regs);
108 goto err2;
111 pdata->regs = hcd->regs;
113 if (pdata->power_budget)
114 hcd->power_budget = pdata->power_budget;
117 * do platform specific init: check the clock, grab/config pins, etc.
119 if (pdata->init && pdata->init(pdev)) {
120 retval = -ENODEV;
121 goto err2;
124 /* Enable USB controller, 83xx or 8536 */
125 if (pdata->have_sysif_regs && pdata->controller_ver < FSL_USB_VER_1_6)
126 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
128 /* Don't need to set host mode here. It will be done by tdi_reset() */
130 retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
131 if (retval != 0)
132 goto err2;
133 device_wakeup_enable(hcd->self.controller);
135 #ifdef CONFIG_USB_OTG
136 if (pdata->operating_mode == FSL_USB2_DR_OTG) {
137 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
139 hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2);
140 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n",
141 hcd, ehci, hcd->phy);
143 if (!IS_ERR_OR_NULL(hcd->phy)) {
144 retval = otg_set_host(hcd->phy->otg,
145 &ehci_to_hcd(ehci)->self);
146 if (retval) {
147 usb_put_phy(hcd->phy);
148 goto err2;
150 } else {
151 dev_err(&pdev->dev, "can't find phy\n");
152 retval = -ENODEV;
153 goto err2;
156 #endif
157 return retval;
159 err2:
160 usb_put_hcd(hcd);
161 err1:
162 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
163 if (pdata->exit)
164 pdata->exit(pdev);
165 return retval;
168 /* may be called without controller electrically present */
169 /* may be called with controller, bus, and devices active */
172 * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
173 * @dev: USB Host Controller being removed
174 * Context: !in_interrupt()
176 * Reverses the effect of usb_hcd_fsl_probe().
179 static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
180 struct platform_device *pdev)
182 struct fsl_usb2_platform_data *pdata = dev_get_platdata(&pdev->dev);
184 if (!IS_ERR_OR_NULL(hcd->phy)) {
185 otg_set_host(hcd->phy->otg, NULL);
186 usb_put_phy(hcd->phy);
189 usb_remove_hcd(hcd);
192 * do platform specific un-initialization:
193 * release iomux pins, disable clock, etc.
195 if (pdata->exit)
196 pdata->exit(pdev);
197 usb_put_hcd(hcd);
200 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
201 enum fsl_usb2_phy_modes phy_mode,
202 unsigned int port_offset)
204 u32 portsc;
205 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
206 void __iomem *non_ehci = hcd->regs;
207 struct device *dev = hcd->self.controller;
208 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
210 if (pdata->controller_ver < 0) {
211 dev_warn(hcd->self.controller, "Could not get controller version\n");
212 return -ENODEV;
215 portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
216 portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
218 switch (phy_mode) {
219 case FSL_USB2_PHY_ULPI:
220 if (pdata->have_sysif_regs && pdata->controller_ver) {
221 /* controller version 1.6 or above */
222 clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
223 setbits32(non_ehci + FSL_SOC_USB_CTRL,
224 ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
226 portsc |= PORT_PTS_ULPI;
227 break;
228 case FSL_USB2_PHY_SERIAL:
229 portsc |= PORT_PTS_SERIAL;
230 break;
231 case FSL_USB2_PHY_UTMI_WIDE:
232 portsc |= PORT_PTS_PTW;
233 /* fall through */
234 case FSL_USB2_PHY_UTMI:
235 if (pdata->have_sysif_regs && pdata->controller_ver) {
236 /* controller version 1.6 or above */
237 setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
238 mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to
239 become stable - 10ms*/
241 /* enable UTMI PHY */
242 if (pdata->have_sysif_regs)
243 setbits32(non_ehci + FSL_SOC_USB_CTRL,
244 CTRL_UTMI_PHY_EN);
245 portsc |= PORT_PTS_UTMI;
246 break;
247 case FSL_USB2_PHY_NONE:
248 break;
251 if (pdata->have_sysif_regs && pdata->controller_ver &&
252 (phy_mode == FSL_USB2_PHY_ULPI)) {
253 /* check PHY_CLK_VALID to get phy clk valid */
254 if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
255 PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
256 in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
257 dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
258 return -EINVAL;
262 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
264 if (phy_mode != FSL_USB2_PHY_ULPI && pdata->have_sysif_regs)
265 setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
267 return 0;
270 static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
272 struct usb_hcd *hcd = ehci_to_hcd(ehci);
273 struct fsl_usb2_platform_data *pdata;
274 void __iomem *non_ehci = hcd->regs;
276 pdata = dev_get_platdata(hcd->self.controller);
278 if (pdata->have_sysif_regs) {
280 * Turn on cache snooping hardware, since some PowerPC platforms
281 * wholly rely on hardware to deal with cache coherent
284 /* Setup Snooping for all the 4GB space */
285 /* SNOOP1 starts from 0x0, size 2G */
286 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
287 /* SNOOP2 starts from 0x80000000, size 2G */
288 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
291 if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
292 (pdata->operating_mode == FSL_USB2_DR_OTG))
293 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
294 return -EINVAL;
296 if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
297 unsigned int chip, rev, svr;
299 svr = mfspr(SPRN_SVR);
300 chip = svr >> 16;
301 rev = (svr >> 4) & 0xf;
303 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
304 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
305 ehci->has_fsl_port_bug = 1;
307 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
308 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
309 return -EINVAL;
311 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
312 if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1))
313 return -EINVAL;
316 if (pdata->have_sysif_regs) {
317 #ifdef CONFIG_FSL_SOC_BOOKE
318 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
319 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
320 #else
321 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
322 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
323 #endif
324 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
327 return 0;
330 /* called after powerup, by probe or system-pm "wakeup" */
331 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
333 if (ehci_fsl_usb_setup(ehci))
334 return -EINVAL;
336 return 0;
339 /* called during probe() after chip reset completes */
340 static int ehci_fsl_setup(struct usb_hcd *hcd)
342 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
343 int retval;
344 struct fsl_usb2_platform_data *pdata;
345 struct device *dev;
347 dev = hcd->self.controller;
348 pdata = dev_get_platdata(hcd->self.controller);
349 ehci->big_endian_desc = pdata->big_endian_desc;
350 ehci->big_endian_mmio = pdata->big_endian_mmio;
352 /* EHCI registers start at offset 0x100 */
353 ehci->caps = hcd->regs + 0x100;
355 #ifdef CONFIG_PPC_83xx
357 * Deal with MPC834X that need port power to be cycled after the power
358 * fault condition is removed. Otherwise the state machine does not
359 * reflect PORTSC[CSC] correctly.
361 ehci->need_oc_pp_cycle = 1;
362 #endif
364 hcd->has_tt = 1;
366 retval = ehci_setup(hcd);
367 if (retval)
368 return retval;
370 if (of_device_is_compatible(dev->parent->of_node,
371 "fsl,mpc5121-usb2-dr")) {
373 * set SBUSCFG:AHBBRST so that control msgs don't
374 * fail when doing heavy PATA writes.
376 ehci_writel(ehci, SBUSCFG_INCR8,
377 hcd->regs + FSL_SOC_USB_SBUSCFG);
380 retval = ehci_fsl_reinit(ehci);
381 return retval;
384 struct ehci_fsl {
385 struct ehci_hcd ehci;
387 #ifdef CONFIG_PM
388 /* Saved USB PHY settings, need to restore after deep sleep. */
389 u32 usb_ctrl;
390 #endif
393 #ifdef CONFIG_PM
395 #ifdef CONFIG_PPC_MPC512x
396 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
398 struct usb_hcd *hcd = dev_get_drvdata(dev);
399 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
400 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
401 u32 tmp;
403 #ifdef CONFIG_DYNAMIC_DEBUG
404 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
405 mode &= USBMODE_CM_MASK;
406 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */
408 dev_dbg(dev, "suspend=%d already_suspended=%d "
409 "mode=%d usbcmd %08x\n", pdata->suspended,
410 pdata->already_suspended, mode, tmp);
411 #endif
414 * If the controller is already suspended, then this must be a
415 * PM suspend. Remember this fact, so that we will leave the
416 * controller suspended at PM resume time.
418 if (pdata->suspended) {
419 dev_dbg(dev, "already suspended, leaving early\n");
420 pdata->already_suspended = 1;
421 return 0;
424 dev_dbg(dev, "suspending...\n");
426 ehci->rh_state = EHCI_RH_SUSPENDED;
427 dev->power.power_state = PMSG_SUSPEND;
429 /* ignore non-host interrupts */
430 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
432 /* stop the controller */
433 tmp = ehci_readl(ehci, &ehci->regs->command);
434 tmp &= ~CMD_RUN;
435 ehci_writel(ehci, tmp, &ehci->regs->command);
437 /* save EHCI registers */
438 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
439 pdata->pm_command &= ~CMD_RUN;
440 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status);
441 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable);
442 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index);
443 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment);
444 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list);
445 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next);
446 pdata->pm_configured_flag =
447 ehci_readl(ehci, &ehci->regs->configured_flag);
448 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
449 pdata->pm_usbgenctrl = ehci_readl(ehci,
450 hcd->regs + FSL_SOC_USB_USBGENCTRL);
452 /* clear the W1C bits */
453 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
455 pdata->suspended = 1;
457 /* clear PP to cut power to the port */
458 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
459 tmp &= ~PORT_POWER;
460 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
462 return 0;
465 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
467 struct usb_hcd *hcd = dev_get_drvdata(dev);
468 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
469 struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
470 u32 tmp;
472 dev_dbg(dev, "suspend=%d already_suspended=%d\n",
473 pdata->suspended, pdata->already_suspended);
476 * If the controller was already suspended at suspend time,
477 * then don't resume it now.
479 if (pdata->already_suspended) {
480 dev_dbg(dev, "already suspended, leaving early\n");
481 pdata->already_suspended = 0;
482 return 0;
485 if (!pdata->suspended) {
486 dev_dbg(dev, "not suspended, leaving early\n");
487 return 0;
490 pdata->suspended = 0;
492 dev_dbg(dev, "resuming...\n");
494 /* set host mode */
495 tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
496 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
498 ehci_writel(ehci, pdata->pm_usbgenctrl,
499 hcd->regs + FSL_SOC_USB_USBGENCTRL);
500 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
501 hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
503 ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
505 /* restore EHCI registers */
506 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
507 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
508 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
509 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
510 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
511 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
512 ehci_writel(ehci, pdata->pm_configured_flag,
513 &ehci->regs->configured_flag);
514 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
516 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
517 ehci->rh_state = EHCI_RH_RUNNING;
518 dev->power.power_state = PMSG_ON;
520 tmp = ehci_readl(ehci, &ehci->regs->command);
521 tmp |= CMD_RUN;
522 ehci_writel(ehci, tmp, &ehci->regs->command);
524 usb_hcd_resume_root_hub(hcd);
526 return 0;
528 #else
529 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
531 return 0;
534 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
536 return 0;
538 #endif /* CONFIG_PPC_MPC512x */
540 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
542 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
544 return container_of(ehci, struct ehci_fsl, ehci);
547 static int ehci_fsl_drv_suspend(struct device *dev)
549 struct usb_hcd *hcd = dev_get_drvdata(dev);
550 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
551 void __iomem *non_ehci = hcd->regs;
553 if (of_device_is_compatible(dev->parent->of_node,
554 "fsl,mpc5121-usb2-dr")) {
555 return ehci_fsl_mpc512x_drv_suspend(dev);
558 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
559 device_may_wakeup(dev));
560 if (!fsl_deep_sleep())
561 return 0;
563 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
564 return 0;
567 static int ehci_fsl_drv_resume(struct device *dev)
569 struct usb_hcd *hcd = dev_get_drvdata(dev);
570 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
571 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
572 void __iomem *non_ehci = hcd->regs;
574 if (of_device_is_compatible(dev->parent->of_node,
575 "fsl,mpc5121-usb2-dr")) {
576 return ehci_fsl_mpc512x_drv_resume(dev);
579 ehci_prepare_ports_for_controller_resume(ehci);
580 if (!fsl_deep_sleep())
581 return 0;
583 usb_root_hub_lost_power(hcd->self.root_hub);
585 /* Restore USB PHY settings and enable the controller. */
586 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
588 ehci_reset(ehci);
589 ehci_fsl_reinit(ehci);
591 return 0;
594 static int ehci_fsl_drv_restore(struct device *dev)
596 struct usb_hcd *hcd = dev_get_drvdata(dev);
598 usb_root_hub_lost_power(hcd->self.root_hub);
599 return 0;
602 static struct dev_pm_ops ehci_fsl_pm_ops = {
603 .suspend = ehci_fsl_drv_suspend,
604 .resume = ehci_fsl_drv_resume,
605 .restore = ehci_fsl_drv_restore,
608 #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops)
609 #else
610 #define EHCI_FSL_PM_OPS NULL
611 #endif /* CONFIG_PM */
613 #ifdef CONFIG_USB_OTG
614 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
616 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
617 u32 status;
619 if (!port)
620 return -EINVAL;
622 port--;
624 /* start port reset before HNP protocol time out */
625 status = readl(&ehci->regs->port_status[port]);
626 if (!(status & PORT_CONNECT))
627 return -ENODEV;
629 /* khubd will finish the reset later */
630 if (ehci_is_TDI(ehci)) {
631 writel(PORT_RESET |
632 (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
633 &ehci->regs->port_status[port]);
634 } else {
635 writel(PORT_RESET, &ehci->regs->port_status[port]);
638 return 0;
640 #else
641 #define ehci_start_port_reset NULL
642 #endif /* CONFIG_USB_OTG */
645 static const struct hc_driver ehci_fsl_hc_driver = {
646 .description = hcd_name,
647 .product_desc = "Freescale On-Chip EHCI Host Controller",
648 .hcd_priv_size = sizeof(struct ehci_fsl),
651 * generic hardware linkage
653 .irq = ehci_irq,
654 .flags = HCD_USB2 | HCD_MEMORY | HCD_BH,
657 * basic lifecycle operations
659 .reset = ehci_fsl_setup,
660 .start = ehci_run,
661 .stop = ehci_stop,
662 .shutdown = ehci_shutdown,
665 * managing i/o requests and associated device resources
667 .urb_enqueue = ehci_urb_enqueue,
668 .urb_dequeue = ehci_urb_dequeue,
669 .endpoint_disable = ehci_endpoint_disable,
670 .endpoint_reset = ehci_endpoint_reset,
673 * scheduling support
675 .get_frame_number = ehci_get_frame,
678 * root hub support
680 .hub_status_data = ehci_hub_status_data,
681 .hub_control = ehci_hub_control,
682 .bus_suspend = ehci_bus_suspend,
683 .bus_resume = ehci_bus_resume,
684 .start_port_reset = ehci_start_port_reset,
685 .relinquish_port = ehci_relinquish_port,
686 .port_handed_over = ehci_port_handed_over,
688 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
691 static int ehci_fsl_drv_probe(struct platform_device *pdev)
693 if (usb_disabled())
694 return -ENODEV;
696 /* FIXME we only want one one probe() not two */
697 return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
700 static int ehci_fsl_drv_remove(struct platform_device *pdev)
702 struct usb_hcd *hcd = platform_get_drvdata(pdev);
704 /* FIXME we only want one one remove() not two */
705 usb_hcd_fsl_remove(hcd, pdev);
706 return 0;
709 MODULE_ALIAS("platform:fsl-ehci");
711 static struct platform_driver ehci_fsl_driver = {
712 .probe = ehci_fsl_drv_probe,
713 .remove = ehci_fsl_drv_remove,
714 .shutdown = usb_hcd_platform_shutdown,
715 .driver = {
716 .name = "fsl-ehci",
717 .owner = THIS_MODULE,
718 .pm = EHCI_FSL_PM_OPS,