drivers/usb/host/uhci-pci.c

   1 /*
   2  * UHCI HCD (Host Controller Driver) PCI Bus Glue.
   3  *
   4  * Extracted from uhci-hcd.c:
   5  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   6  *
   7  * (C) Copyright 1999 Linus Torvalds
   8  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
   9  * (C) Copyright 1999 Randy Dunlap
  10  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  11  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  12  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  13  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  14  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  15  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  16  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  17  * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
  18  */
  19
  20 #include "pci-quirks.h"
  21
  22 /*
  23  * Make sure the controller is completely inactive, unable to
  24  * generate interrupts or do DMA.
  25  */
  26 static void uhci_pci_reset_hc(struct uhci_hcd *uhci)
  27 {
  28         uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr);
  29 }
  30
  31 /*
  32  * Initialize a controller that was newly discovered or has just been
  33  * resumed.  In either case we can't be sure of its previous state.
  34  *
  35  * Returns: 1 if the controller was reset, 0 otherwise.
  36  */
  37 static int uhci_pci_check_and_reset_hc(struct uhci_hcd *uhci)
  38 {
  39         return uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)),
  40                                 uhci->io_addr);
  41 }
  42
  43 /*
  44  * Store the basic register settings needed by the controller.
  45  * This function is called at the end of configure_hc in uhci-hcd.c.
  46  */
  47 static void uhci_pci_configure_hc(struct uhci_hcd *uhci)
  48 {
  49         struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
  50
  51         /* Enable PIRQ */
  52         pci_write_config_word(pdev, USBLEGSUP, USBLEGSUP_DEFAULT);
  53
  54         /* Disable platform-specific non-PME# wakeup */
  55         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
  56                 pci_write_config_byte(pdev, USBRES_INTEL, 0);
  57 }
  58
  59 static int uhci_pci_resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
  60 {
  61         int port;
  62
  63         switch (to_pci_dev(uhci_dev(uhci))->vendor) {
  64         default:
  65                 break;
  66
  67         case PCI_VENDOR_ID_GENESYS:
  68                 /* Genesys Logic's GL880S controllers don't generate
  69                  * resume-detect interrupts.
  70                  */
  71                 return 1;
  72
  73         case PCI_VENDOR_ID_INTEL:
  74                 /* Some of Intel's USB controllers have a bug that causes
  75                  * resume-detect interrupts if any port has an over-current
  76                  * condition.  To make matters worse, some motherboards
  77                  * hardwire unused USB ports' over-current inputs active!
  78                  * To prevent problems, we will not enable resume-detect
  79                  * interrupts if any ports are OC.
  80                  */
  81                 for (port = 0; port < uhci->rh_numports; ++port) {
  82                         if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
  83                                         USBPORTSC_OC)
  84                                 return 1;
  85                 }
  86                 break;
  87         }
  88         return 0;
  89 }
  90
  91 static int uhci_pci_global_suspend_mode_is_broken(struct uhci_hcd *uhci)
  92 {
  93         int port;
  94         const char *sys_info;
  95         static const char bad_Asus_board[] = "A7V8X";
  96
  97         /* One of Asus's motherboards has a bug which causes it to
  98          * wake up immediately from suspend-to-RAM if any of the ports
  99          * are connected.  In such cases we will not set EGSM.
 100          */
 101         sys_info = dmi_get_system_info(DMI_BOARD_NAME);
 102         if (sys_info && !strcmp(sys_info, bad_Asus_board)) {
 103                 for (port = 0; port < uhci->rh_numports; ++port) {
 104                         if (inw(uhci->io_addr + USBPORTSC1 + port * 2) &
 105                                         USBPORTSC_CCS)
 106                                 return 1;
 107                 }
 108         }
 109
 110         return 0;
 111 }
 112
 113 static int uhci_pci_init(struct usb_hcd *hcd)
 114 {
 115         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 116
 117         uhci->io_addr = (unsigned long) hcd->rsrc_start;
 118
 119         uhci->rh_numports = uhci_count_ports(hcd);
 120
 121         /* Intel controllers report the OverCurrent bit active on.
 122          * VIA controllers report it active off, so we'll adjust the
 123          * bit value.  (It's not standardized in the UHCI spec.)
 124          */
 125         if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA)
 126                 uhci->oc_low = 1;
 127
 128         /* HP's server management chip requires a longer port reset delay. */
 129         if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP)
 130                 uhci->wait_for_hp = 1;
 131
 132         /* Set up pointers to PCI-specific functions */
 133         uhci->reset_hc = uhci_pci_reset_hc;
 134         uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc;
 135         uhci->configure_hc = uhci_pci_configure_hc;
 136         uhci->resume_detect_interrupts_are_broken =
 137                 uhci_pci_resume_detect_interrupts_are_broken;
 138         uhci->global_suspend_mode_is_broken =
 139                 uhci_pci_global_suspend_mode_is_broken;
 140
 141
 142         /* Kick BIOS off this hardware and reset if the controller
 143          * isn't already safely quiescent.
 144          */
 145         check_and_reset_hc(uhci);
 146         return 0;
 147 }
 148
 149 /* Make sure the controller is quiescent and that we're not using it
 150  * any more.  This is mainly for the benefit of programs which, like kexec,
 151  * expect the hardware to be idle: not doing DMA or generating IRQs.
 152  *
 153  * This routine may be called in a damaged or failing kernel.  Hence we
 154  * do not acquire the spinlock before shutting down the controller.
 155  */
 156 static void uhci_shutdown(struct pci_dev *pdev)
 157 {
 158         struct usb_hcd *hcd = pci_get_drvdata(pdev);
 159
 160         uhci_hc_died(hcd_to_uhci(hcd));
 161 }
 162
 163 #ifdef CONFIG_PM
 164
 165 static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated);
 166
 167 static int uhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
 168 {
 169         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 170         struct pci_dev *pdev = to_pci_dev(uhci_dev(uhci));
 171         int rc = 0;
 172
 173         dev_dbg(uhci_dev(uhci), "%s\n", __func__);
 174
 175         spin_lock_irq(&uhci->lock);
 176         if (!HCD_HW_ACCESSIBLE(hcd) || uhci->dead)
 177                 goto done_okay;         /* Already suspended or dead */
 178
 179         /* All PCI host controllers are required to disable IRQ generation
 180          * at the source, so we must turn off PIRQ.
 181          */
 182         pci_write_config_word(pdev, USBLEGSUP, 0);
 183         clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 184
 185         /* Enable platform-specific non-PME# wakeup */
 186         if (do_wakeup) {
 187                 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
 188                         pci_write_config_byte(pdev, USBRES_INTEL,
 189                                         USBPORT1EN | USBPORT2EN);
 190         }
 191
 192 done_okay:
 193         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 194         spin_unlock_irq(&uhci->lock);
 195
 196         synchronize_irq(hcd->irq);
 197
 198         /* Check for race with a wakeup request */
 199         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
 200                 uhci_pci_resume(hcd, false);
 201                 rc = -EBUSY;
 202         }
 203         return rc;
 204 }
 205
 206 static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
 207 {
 208         struct uhci_hcd *uhci = hcd_to_uhci(hcd);
 209
 210         dev_dbg(uhci_dev(uhci), "%s\n", __func__);
 211
 212         /* Since we aren't in D3 any more, it's safe to set this flag
 213          * even if the controller was dead.
 214          */
 215         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
 216
 217         spin_lock_irq(&uhci->lock);
 218
 219         /* Make sure resume from hibernation re-enumerates everything */
 220         if (hibernated) {
 221                 uhci->reset_hc(uhci);
 222                 finish_reset(uhci);
 223         }
 224
 225         /* The firmware may have changed the controller settings during
 226          * a system wakeup.  Check it and reconfigure to avoid problems.
 227          */
 228         else {
 229                 check_and_reset_hc(uhci);
 230         }
 231         configure_hc(uhci);
 232
 233         /* Tell the core if the controller had to be reset */
 234         if (uhci->rh_state == UHCI_RH_RESET)
 235                 usb_root_hub_lost_power(hcd->self.root_hub);
 236
 237         spin_unlock_irq(&uhci->lock);
 238
 239         /* If interrupts don't work and remote wakeup is enabled then
 240          * the suspended root hub needs to be polled.
 241          */
 242         if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup)
 243                 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
 244
 245         /* Does the root hub have a port wakeup pending? */
 246         usb_hcd_poll_rh_status(hcd);
 247         return 0;
 248 }
 249
 250 #endif
 251
 252 static const struct hc_driver uhci_driver = {
 253         .description =          hcd_name,
 254         .product_desc =         "UHCI Host Controller",
 255         .hcd_priv_size =        sizeof(struct uhci_hcd),
 256
 257         /* Generic hardware linkage */
 258         .irq =                  uhci_irq,
 259         .flags =                HCD_USB11,
 260
 261         /* Basic lifecycle operations */
 262         .reset =                uhci_pci_init,
 263         .start =                uhci_start,
 264 #ifdef CONFIG_PM
 265         .pci_suspend =          uhci_pci_suspend,
 266         .pci_resume =           uhci_pci_resume,
 267         .bus_suspend =          uhci_rh_suspend,
 268         .bus_resume =           uhci_rh_resume,
 269 #endif
 270         .stop =                 uhci_stop,
 271
 272         .urb_enqueue =          uhci_urb_enqueue,
 273         .urb_dequeue =          uhci_urb_dequeue,
 274
 275         .endpoint_disable =     uhci_hcd_endpoint_disable,
 276         .get_frame_number =     uhci_hcd_get_frame_number,
 277
 278         .hub_status_data =      uhci_hub_status_data,
 279         .hub_control =          uhci_hub_control,
 280 };
 281
 282 static const struct pci_device_id uhci_pci_ids[] = { {
 283         /* handle any USB UHCI controller */
 284         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0),
 285         .driver_data =  (unsigned long) &uhci_driver,
 286         }, { /* end: all zeroes */ }
 287 };
 288
 289 MODULE_DEVICE_TABLE(pci, uhci_pci_ids);
 290
 291 static struct pci_driver uhci_pci_driver = {
 292         .name =         (char *)hcd_name,
 293         .id_table =     uhci_pci_ids,
 294
 295         .probe =        usb_hcd_pci_probe,
 296         .remove =       usb_hcd_pci_remove,
 297         .shutdown =     uhci_shutdown,
 298
 299 #ifdef CONFIG_PM
 300         .driver =       {
 301                 .pm =   &usb_hcd_pci_pm_ops
 302         },
 303 #endif
 304 };
 305
 306 MODULE_SOFTDEP("pre: ehci_pci");