drivers/mtd/nand/r852.c

   1 /*
   2  * Copyright © 2009 - Maxim Levitsky
   3  * driver for Ricoh xD readers
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 #include <linux/kernel.h>
  11 #include <linux/module.h>
  12 #include <linux/jiffies.h>
  13 #include <linux/workqueue.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/pci.h>
  16 #include <linux/pci_ids.h>
  17 #include <linux/delay.h>
  18 #include <linux/slab.h>
  19 #include <asm/byteorder.h>
  20 #include <linux/sched.h>
  21 #include "sm_common.h"
  22 #include "r852.h"
  23
  24
  25 static bool r852_enable_dma = 1;
  26 module_param(r852_enable_dma, bool, S_IRUGO);
  27 MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)");
  28
  29 static int debug;
  30 module_param(debug, int, S_IRUGO | S_IWUSR);
  31 MODULE_PARM_DESC(debug, "Debug level (0-2)");
  32
  33 /* read register */
  34 static inline uint8_t r852_read_reg(struct r852_device *dev, int address)
  35 {
  36         uint8_t reg = readb(dev->mmio + address);
  37         return reg;
  38 }
  39
  40 /* write register */
  41 static inline void r852_write_reg(struct r852_device *dev,
  42                                                 int address, uint8_t value)
  43 {
  44         writeb(value, dev->mmio + address);
  45         mmiowb();
  46 }
  47
  48
  49 /* read dword sized register */
  50 static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address)
  51 {
  52         uint32_t reg = le32_to_cpu(readl(dev->mmio + address));
  53         return reg;
  54 }
  55
  56 /* write dword sized register */
  57 static inline void r852_write_reg_dword(struct r852_device *dev,
  58                                                         int address, uint32_t value)
  59 {
  60         writel(cpu_to_le32(value), dev->mmio + address);
  61         mmiowb();
  62 }
  63
  64 /* returns pointer to our private structure */
  65 static inline struct r852_device *r852_get_dev(struct mtd_info *mtd)
  66 {
  67         struct nand_chip *chip = mtd->priv;
  68         return chip->priv;
  69 }
  70
  71
  72 /* check if controller supports dma */
  73 static void r852_dma_test(struct r852_device *dev)
  74 {
  75         dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) &
  76                 (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2);
  77
  78         if (!dev->dma_usable)
  79                 message("Non dma capable device detected, dma disabled");
  80
  81         if (!r852_enable_dma) {
  82                 message("disabling dma on user request");
  83                 dev->dma_usable = 0;
  84         }
  85 }
  86
  87 /*
  88  * Enable dma. Enables ether first or second stage of the DMA,
  89  * Expects dev->dma_dir and dev->dma_state be set
  90  */
  91 static void r852_dma_enable(struct r852_device *dev)
  92 {
  93         uint8_t dma_reg, dma_irq_reg;
  94
  95         /* Set up dma settings */
  96         dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS);
  97         dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY);
  98
  99         if (dev->dma_dir)
 100                 dma_reg |= R852_DMA_READ;
 101
 102         if (dev->dma_state == DMA_INTERNAL) {
 103                 dma_reg |= R852_DMA_INTERNAL;
 104                 /* Precaution to make sure HW doesn't write */
 105                         /* to random kernel memory */
 106                 r852_write_reg_dword(dev, R852_DMA_ADDR,
 107                         cpu_to_le32(dev->phys_bounce_buffer));
 108         } else {
 109                 dma_reg |= R852_DMA_MEMORY;
 110                 r852_write_reg_dword(dev, R852_DMA_ADDR,
 111                         cpu_to_le32(dev->phys_dma_addr));
 112         }
 113
 114         /* Precaution: make sure write reached the device */
 115         r852_read_reg_dword(dev, R852_DMA_ADDR);
 116
 117         r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg);
 118
 119         /* Set dma irq */
 120         dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
 121         r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
 122                 dma_irq_reg |
 123                 R852_DMA_IRQ_INTERNAL |
 124                 R852_DMA_IRQ_ERROR |
 125                 R852_DMA_IRQ_MEMORY);
 126 }
 127
 128 /*
 129  * Disable dma, called from the interrupt handler, which specifies
 130  * success of the operation via 'error' argument
 131  */
 132 static void r852_dma_done(struct r852_device *dev, int error)
 133 {
 134         WARN_ON(dev->dma_stage == 0);
 135
 136         r852_write_reg_dword(dev, R852_DMA_IRQ_STA,
 137                         r852_read_reg_dword(dev, R852_DMA_IRQ_STA));
 138
 139         r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0);
 140         r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0);
 141
 142         /* Precaution to make sure HW doesn't write to random kernel memory */
 143         r852_write_reg_dword(dev, R852_DMA_ADDR,
 144                 cpu_to_le32(dev->phys_bounce_buffer));
 145         r852_read_reg_dword(dev, R852_DMA_ADDR);
 146
 147         dev->dma_error = error;
 148         dev->dma_stage = 0;
 149
 150         if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer)
 151                 pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN,
 152                         dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE);
 153 }
 154
 155 /*
 156  * Wait, till dma is done, which includes both phases of it
 157  */
 158 static int r852_dma_wait(struct r852_device *dev)
 159 {
 160         long timeout = wait_for_completion_timeout(&dev->dma_done,
 161                                 msecs_to_jiffies(1000));
 162         if (!timeout) {
 163                 dbg("timeout waiting for DMA interrupt");
 164                 return -ETIMEDOUT;
 165         }
 166
 167         return 0;
 168 }
 169
 170 /*
 171  * Read/Write one page using dma. Only pages can be read (512 bytes)
 172 */
 173 static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read)
 174 {
 175         int bounce = 0;
 176         unsigned long flags;
 177         int error;
 178
 179         dev->dma_error = 0;
 180
 181         /* Set dma direction */
 182         dev->dma_dir = do_read;
 183         dev->dma_stage = 1;
 184         reinit_completion(&dev->dma_done);
 185
 186         dbg_verbose("doing dma %s ", do_read ? "read" : "write");
 187
 188         /* Set initial dma state: for reading first fill on board buffer,
 189           from device, for writes first fill the buffer  from memory*/
 190         dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY;
 191
 192         /* if incoming buffer is not page aligned, we should do bounce */
 193         if ((unsigned long)buf & (R852_DMA_LEN-1))
 194                 bounce = 1;
 195
 196         if (!bounce) {
 197                 dev->phys_dma_addr = pci_map_single(dev->pci_dev, (void *)buf,
 198                         R852_DMA_LEN,
 199                         (do_read ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE));
 200
 201                 if (pci_dma_mapping_error(dev->pci_dev, dev->phys_dma_addr))
 202                         bounce = 1;
 203         }
 204
 205         if (bounce) {
 206                 dbg_verbose("dma: using bounce buffer");
 207                 dev->phys_dma_addr = dev->phys_bounce_buffer;
 208                 if (!do_read)
 209                         memcpy(dev->bounce_buffer, buf, R852_DMA_LEN);
 210         }
 211
 212         /* Enable DMA */
 213         spin_lock_irqsave(&dev->irqlock, flags);
 214         r852_dma_enable(dev);
 215         spin_unlock_irqrestore(&dev->irqlock, flags);
 216
 217         /* Wait till complete */
 218         error = r852_dma_wait(dev);
 219
 220         if (error) {
 221                 r852_dma_done(dev, error);
 222                 return;
 223         }
 224
 225         if (do_read && bounce)
 226                 memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN);
 227 }
 228
 229 /*
 230  * Program data lines of the nand chip to send data to it
 231  */
 232 static void r852_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
 233 {
 234         struct r852_device *dev = r852_get_dev(mtd);
 235         uint32_t reg;
 236
 237         /* Don't allow any access to hardware if we suspect card removal */
 238         if (dev->card_unstable)
 239                 return;
 240
 241         /* Special case for whole sector read */
 242         if (len == R852_DMA_LEN && dev->dma_usable) {
 243                 r852_do_dma(dev, (uint8_t *)buf, 0);
 244                 return;
 245         }
 246
 247         /* write DWORD chinks - faster */
 248         while (len >= 4) {
 249                 reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24;
 250                 r852_write_reg_dword(dev, R852_DATALINE, reg);
 251                 buf += 4;
 252                 len -= 4;
 253
 254         }
 255
 256         /* write rest */
 257         while (len > 0) {
 258                 r852_write_reg(dev, R852_DATALINE, *buf++);
 259                 len--;
 260         }
 261 }
 262
 263 /*
 264  * Read data lines of the nand chip to retrieve data
 265  */
 266 static void r852_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
 267 {
 268         struct r852_device *dev = r852_get_dev(mtd);
 269         uint32_t reg;
 270
 271         if (dev->card_unstable) {
 272                 /* since we can't signal error here, at least, return
 273                         predictable buffer */
 274                 memset(buf, 0, len);
 275                 return;
 276         }
 277
 278         /* special case for whole sector read */
 279         if (len == R852_DMA_LEN && dev->dma_usable) {
 280                 r852_do_dma(dev, buf, 1);
 281                 return;
 282         }
 283
 284         /* read in dword sized chunks */
 285         while (len >= 4) {
 286
 287                 reg = r852_read_reg_dword(dev, R852_DATALINE);
 288                 *buf++ = reg & 0xFF;
 289                 *buf++ = (reg >> 8) & 0xFF;
 290                 *buf++ = (reg >> 16) & 0xFF;
 291                 *buf++ = (reg >> 24) & 0xFF;
 292                 len -= 4;
 293         }
 294
 295         /* read the reset by bytes */
 296         while (len--)
 297                 *buf++ = r852_read_reg(dev, R852_DATALINE);
 298 }
 299
 300 /*
 301  * Read one byte from nand chip
 302  */
 303 static uint8_t r852_read_byte(struct mtd_info *mtd)
 304 {
 305         struct r852_device *dev = r852_get_dev(mtd);
 306
 307         /* Same problem as in r852_read_buf.... */
 308         if (dev->card_unstable)
 309                 return 0;
 310
 311         return r852_read_reg(dev, R852_DATALINE);
 312 }
 313
 314 /*
 315  * Control several chip lines & send commands
 316  */
 317 static void r852_cmdctl(struct mtd_info *mtd, int dat, unsigned int ctrl)
 318 {
 319         struct r852_device *dev = r852_get_dev(mtd);
 320
 321         if (dev->card_unstable)
 322                 return;
 323
 324         if (ctrl & NAND_CTRL_CHANGE) {
 325
 326                 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND |
 327                                  R852_CTL_ON | R852_CTL_CARDENABLE);
 328
 329                 if (ctrl & NAND_ALE)
 330                         dev->ctlreg |= R852_CTL_DATA;
 331
 332                 if (ctrl & NAND_CLE)
 333                         dev->ctlreg |= R852_CTL_COMMAND;
 334
 335                 if (ctrl & NAND_NCE)
 336                         dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON);
 337                 else
 338                         dev->ctlreg &= ~R852_CTL_WRITE;
 339
 340                 /* when write is stareted, enable write access */
 341                 if (dat == NAND_CMD_ERASE1)
 342                         dev->ctlreg |= R852_CTL_WRITE;
 343
 344                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 345         }
 346
 347          /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need
 348                 to set write mode */
 349         if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) {
 350                 dev->ctlreg |= R852_CTL_WRITE;
 351                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 352         }
 353
 354         if (dat != NAND_CMD_NONE)
 355                 r852_write_reg(dev, R852_DATALINE, dat);
 356 }
 357
 358 /*
 359  * Wait till card is ready.
 360  * based on nand_wait, but returns errors on DMA error
 361  */
 362 static int r852_wait(struct mtd_info *mtd, struct nand_chip *chip)
 363 {
 364         struct r852_device *dev = chip->priv;
 365
 366         unsigned long timeout;
 367         int status;
 368
 369         timeout = jiffies + (chip->state == FL_ERASING ?
 370                 msecs_to_jiffies(400) : msecs_to_jiffies(20));
 371
 372         while (time_before(jiffies, timeout))
 373                 if (chip->dev_ready(mtd))
 374                         break;
 375
 376         chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1);
 377         status = (int)chip->read_byte(mtd);
 378
 379         /* Unfortunelly, no way to send detailed error status... */
 380         if (dev->dma_error) {
 381                 status |= NAND_STATUS_FAIL;
 382                 dev->dma_error = 0;
 383         }
 384         return status;
 385 }
 386
 387 /*
 388  * Check if card is ready
 389  */
 390
 391 static int r852_ready(struct mtd_info *mtd)
 392 {
 393         struct r852_device *dev = r852_get_dev(mtd);
 394         return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY);
 395 }
 396
 397
 398 /*
 399  * Set ECC engine mode
 400 */
 401
 402 static void r852_ecc_hwctl(struct mtd_info *mtd, int mode)
 403 {
 404         struct r852_device *dev = r852_get_dev(mtd);
 405
 406         if (dev->card_unstable)
 407                 return;
 408
 409         switch (mode) {
 410         case NAND_ECC_READ:
 411         case NAND_ECC_WRITE:
 412                 /* enable ecc generation/check*/
 413                 dev->ctlreg |= R852_CTL_ECC_ENABLE;
 414
 415                 /* flush ecc buffer */
 416                 r852_write_reg(dev, R852_CTL,
 417                         dev->ctlreg | R852_CTL_ECC_ACCESS);
 418
 419                 r852_read_reg_dword(dev, R852_DATALINE);
 420                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 421                 return;
 422
 423         case NAND_ECC_READSYN:
 424                 /* disable ecc generation */
 425                 dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
 426                 r852_write_reg(dev, R852_CTL, dev->ctlreg);
 427         }
 428 }
 429
 430 /*
 431  * Calculate ECC, only used for writes
 432  */
 433
 434 static int r852_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,
 435                                                         uint8_t *ecc_code)
 436 {
 437         struct r852_device *dev = r852_get_dev(mtd);
 438         struct sm_oob *oob = (struct sm_oob *)ecc_code;
 439         uint32_t ecc1, ecc2;
 440
 441         if (dev->card_unstable)
 442                 return 0;
 443
 444         dev->ctlreg &= ~R852_CTL_ECC_ENABLE;
 445         r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
 446
 447         ecc1 = r852_read_reg_dword(dev, R852_DATALINE);
 448         ecc2 = r852_read_reg_dword(dev, R852_DATALINE);
 449
 450         oob->ecc1[0] = (ecc1) & 0xFF;
 451         oob->ecc1[1] = (ecc1 >> 8) & 0xFF;
 452         oob->ecc1[2] = (ecc1 >> 16) & 0xFF;
 453
 454         oob->ecc2[0] = (ecc2) & 0xFF;
 455         oob->ecc2[1] = (ecc2 >> 8) & 0xFF;
 456         oob->ecc2[2] = (ecc2 >> 16) & 0xFF;
 457
 458         r852_write_reg(dev, R852_CTL, dev->ctlreg);
 459         return 0;
 460 }
 461
 462 /*
 463  * Correct the data using ECC, hw did almost everything for us
 464  */
 465
 466 static int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat,
 467                                 uint8_t *read_ecc, uint8_t *calc_ecc)
 468 {
 469         uint32_t ecc_reg;
 470         uint8_t ecc_status, err_byte;
 471         int i, error = 0;
 472
 473         struct r852_device *dev = r852_get_dev(mtd);
 474
 475         if (dev->card_unstable)
 476                 return 0;
 477
 478         if (dev->dma_error) {
 479                 dev->dma_error = 0;
 480                 return -1;
 481         }
 482
 483         r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS);
 484         ecc_reg = r852_read_reg_dword(dev, R852_DATALINE);
 485         r852_write_reg(dev, R852_CTL, dev->ctlreg);
 486
 487         for (i = 0 ; i <= 1 ; i++) {
 488
 489                 ecc_status = (ecc_reg >> 8) & 0xFF;
 490
 491                 /* ecc uncorrectable error */
 492                 if (ecc_status & R852_ECC_FAIL) {
 493                         dbg("ecc: unrecoverable error, in half %d", i);
 494                         error = -1;
 495                         goto exit;
 496                 }
 497
 498                 /* correctable error */
 499                 if (ecc_status & R852_ECC_CORRECTABLE) {
 500
 501                         err_byte = ecc_reg & 0xFF;
 502                         dbg("ecc: recoverable error, "
 503                                 "in half %d, byte %d, bit %d", i,
 504                                 err_byte, ecc_status & R852_ECC_ERR_BIT_MSK);
 505
 506                         dat[err_byte] ^=
 507                                 1 << (ecc_status & R852_ECC_ERR_BIT_MSK);
 508                         error++;
 509                 }
 510
 511                 dat += 256;
 512                 ecc_reg >>= 16;
 513         }
 514 exit:
 515         return error;
 516 }
 517
 518 /*
 519  * This is copy of nand_read_oob_std
 520  * nand_read_oob_syndrome assumes we can send column address - we can't
 521  */
 522 static int r852_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
 523                              int page)
 524 {
 525         chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page);
 526         chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
 527         return 0;
 528 }
 529
 530 /*
 531  * Start the nand engine
 532  */
 533
 534 static void r852_engine_enable(struct r852_device *dev)
 535 {
 536         if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) {
 537                 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
 538                 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
 539         } else {
 540                 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED);
 541                 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON);
 542         }
 543         msleep(300);
 544         r852_write_reg(dev, R852_CTL, 0);
 545 }
 546
 547
 548 /*
 549  * Stop the nand engine
 550  */
 551
 552 static void r852_engine_disable(struct r852_device *dev)
 553 {
 554         r852_write_reg_dword(dev, R852_HW, 0);
 555         r852_write_reg(dev, R852_CTL, R852_CTL_RESET);
 556 }
 557
 558 /*
 559  * Test if card is present
 560  */
 561
 562 static void r852_card_update_present(struct r852_device *dev)
 563 {
 564         unsigned long flags;
 565         uint8_t reg;
 566
 567         spin_lock_irqsave(&dev->irqlock, flags);
 568         reg = r852_read_reg(dev, R852_CARD_STA);
 569         dev->card_detected = !!(reg & R852_CARD_STA_PRESENT);
 570         spin_unlock_irqrestore(&dev->irqlock, flags);
 571 }
 572
 573 /*
 574  * Update card detection IRQ state according to current card state
 575  * which is read in r852_card_update_present
 576  */
 577 static void r852_update_card_detect(struct r852_device *dev)
 578 {
 579         int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
 580         dev->card_unstable = 0;
 581
 582         card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT);
 583         card_detect_reg |= R852_CARD_IRQ_GENABLE;
 584
 585         card_detect_reg |= dev->card_detected ?
 586                 R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT;
 587
 588         r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg);
 589 }
 590
 591 static ssize_t r852_media_type_show(struct device *sys_dev,
 592                         struct device_attribute *attr, char *buf)
 593 {
 594         struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev);
 595         struct r852_device *dev = r852_get_dev(mtd);
 596         char *data = dev->sm ? "smartmedia" : "xd";
 597
 598         strcpy(buf, data);
 599         return strlen(data);
 600 }
 601
 602 static DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL);
 603
 604
 605 /* Detect properties of card in slot */
 606 static void r852_update_media_status(struct r852_device *dev)
 607 {
 608         uint8_t reg;
 609         unsigned long flags;
 610         int readonly;
 611
 612         spin_lock_irqsave(&dev->irqlock, flags);
 613         if (!dev->card_detected) {
 614                 message("card removed");
 615                 spin_unlock_irqrestore(&dev->irqlock, flags);
 616                 return ;
 617         }
 618
 619         readonly  = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO;
 620         reg = r852_read_reg(dev, R852_DMA_CAP);
 621         dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT);
 622
 623         message("detected %s %s card in slot",
 624                 dev->sm ? "SmartMedia" : "xD",
 625                 readonly ? "readonly" : "writeable");
 626
 627         dev->readonly = readonly;
 628         spin_unlock_irqrestore(&dev->irqlock, flags);
 629 }
 630
 631 /*
 632  * Register the nand device
 633  * Called when the card is detected
 634  */
 635 static int r852_register_nand_device(struct r852_device *dev)
 636 {
 637         dev->mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
 638
 639         if (!dev->mtd)
 640                 goto error1;
 641
 642         WARN_ON(dev->card_registred);
 643
 644         dev->mtd->owner = THIS_MODULE;
 645         dev->mtd->priv = dev->chip;
 646         dev->mtd->dev.parent = &dev->pci_dev->dev;
 647
 648         if (dev->readonly)
 649                 dev->chip->options |= NAND_ROM;
 650
 651         r852_engine_enable(dev);
 652
 653         if (sm_register_device(dev->mtd, dev->sm))
 654                 goto error2;
 655
 656         if (device_create_file(&dev->mtd->dev, &dev_attr_media_type)) {
 657                 message("can't create media type sysfs attribute");
 658                 goto error3;
 659         }
 660
 661         dev->card_registred = 1;
 662         return 0;
 663 error3:
 664         nand_release(dev->mtd);
 665 error2:
 666         kfree(dev->mtd);
 667 error1:
 668         /* Force card redetect */
 669         dev->card_detected = 0;
 670         return -1;
 671 }
 672
 673 /*
 674  * Unregister the card
 675  */
 676
 677 static void r852_unregister_nand_device(struct r852_device *dev)
 678 {
 679         if (!dev->card_registred)
 680                 return;
 681
 682         device_remove_file(&dev->mtd->dev, &dev_attr_media_type);
 683         nand_release(dev->mtd);
 684         r852_engine_disable(dev);
 685         dev->card_registred = 0;
 686         kfree(dev->mtd);
 687         dev->mtd = NULL;
 688 }
 689
 690 /* Card state updater */
 691 static void r852_card_detect_work(struct work_struct *work)
 692 {
 693         struct r852_device *dev =
 694                 container_of(work, struct r852_device, card_detect_work.work);
 695
 696         r852_card_update_present(dev);
 697         r852_update_card_detect(dev);
 698         dev->card_unstable = 0;
 699
 700         /* False alarm */
 701         if (dev->card_detected == dev->card_registred)
 702                 goto exit;
 703
 704         /* Read media properties */
 705         r852_update_media_status(dev);
 706
 707         /* Register the card */
 708         if (dev->card_detected)
 709                 r852_register_nand_device(dev);
 710         else
 711                 r852_unregister_nand_device(dev);
 712 exit:
 713         r852_update_card_detect(dev);
 714 }
 715
 716 /* Ack + disable IRQ generation */
 717 static void r852_disable_irqs(struct r852_device *dev)
 718 {
 719         uint8_t reg;
 720         reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE);
 721         r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK);
 722
 723         reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE);
 724         r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE,
 725                                         reg & ~R852_DMA_IRQ_MASK);
 726
 727         r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK);
 728         r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK);
 729 }
 730
 731 /* Interrupt handler */
 732 static irqreturn_t r852_irq(int irq, void *data)
 733 {
 734         struct r852_device *dev = (struct r852_device *)data;
 735
 736         uint8_t card_status, dma_status;
 737         unsigned long flags;
 738         irqreturn_t ret = IRQ_NONE;
 739
 740         spin_lock_irqsave(&dev->irqlock, flags);
 741
 742         /* handle card detection interrupts first */
 743         card_status = r852_read_reg(dev, R852_CARD_IRQ_STA);
 744         r852_write_reg(dev, R852_CARD_IRQ_STA, card_status);
 745
 746         if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) {
 747
 748                 ret = IRQ_HANDLED;
 749                 dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT);
 750
 751                 /* we shouldn't receive any interrupts if we wait for card
 752                         to settle */
 753                 WARN_ON(dev->card_unstable);
 754
 755                 /* disable irqs while card is unstable */
 756                 /* this will timeout DMA if active, but better that garbage */
 757                 r852_disable_irqs(dev);
 758
 759                 if (dev->card_unstable)
 760                         goto out;
 761
 762                 /* let, card state to settle a bit, and then do the work */
 763                 dev->card_unstable = 1;
 764                 queue_delayed_work(dev->card_workqueue,
 765                         &dev->card_detect_work, msecs_to_jiffies(100));
 766                 goto out;
 767         }
 768
 769
 770         /* Handle dma interrupts */
 771         dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA);
 772         r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status);
 773
 774         if (dma_status & R852_DMA_IRQ_MASK) {
 775
 776                 ret = IRQ_HANDLED;
 777
 778                 if (dma_status & R852_DMA_IRQ_ERROR) {
 779                         dbg("received dma error IRQ");
 780                         r852_dma_done(dev, -EIO);
 781                         complete(&dev->dma_done);
 782                         goto out;
 783                 }
 784
 785                 /* received DMA interrupt out of nowhere? */
 786                 WARN_ON_ONCE(dev->dma_stage == 0);
 787
 788                 if (dev->dma_stage == 0)
 789                         goto out;
 790
 791                 /* done device access */
 792                 if (dev->dma_state == DMA_INTERNAL &&
 793                                 (dma_status & R852_DMA_IRQ_INTERNAL)) {
 794
 795                         dev->dma_state = DMA_MEMORY;
 796                         dev->dma_stage++;
 797                 }
 798
 799                 /* done memory DMA */
 800                 if (dev->dma_state == DMA_MEMORY &&
 801                                 (dma_status & R852_DMA_IRQ_MEMORY)) {
 802                         dev->dma_state = DMA_INTERNAL;
 803                         dev->dma_stage++;
 804                 }
 805
 806                 /* Enable 2nd half of dma dance */
 807                 if (dev->dma_stage == 2)
 808                         r852_dma_enable(dev);
 809
 810                 /* Operation done */
 811                 if (dev->dma_stage == 3) {
 812                         r852_dma_done(dev, 0);
 813                         complete(&dev->dma_done);
 814                 }
 815                 goto out;
 816         }
 817
 818         /* Handle unknown interrupts */
 819         if (dma_status)
 820                 dbg("bad dma IRQ status = %x", dma_status);
 821
 822         if (card_status & ~R852_CARD_STA_CD)
 823                 dbg("strange card status = %x", card_status);
 824
 825 out:
 826         spin_unlock_irqrestore(&dev->irqlock, flags);
 827         return ret;
 828 }
 829
 830 static int  r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
 831 {
 832         int error;
 833         struct nand_chip *chip;
 834         struct r852_device *dev;
 835
 836         /* pci initialization */
 837         error = pci_enable_device(pci_dev);
 838
 839         if (error)
 840                 goto error1;
 841
 842         pci_set_master(pci_dev);
 843
 844         error = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
 845         if (error)
 846                 goto error2;
 847
 848         error = pci_request_regions(pci_dev, DRV_NAME);
 849
 850         if (error)
 851                 goto error3;
 852
 853         error = -ENOMEM;
 854
 855         /* init nand chip, but register it only on card insert */
 856         chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
 857
 858         if (!chip)
 859                 goto error4;
 860
 861         /* commands */
 862         chip->cmd_ctrl = r852_cmdctl;
 863         chip->waitfunc = r852_wait;
 864         chip->dev_ready = r852_ready;
 865
 866         /* I/O */
 867         chip->read_byte = r852_read_byte;
 868         chip->read_buf = r852_read_buf;
 869         chip->write_buf = r852_write_buf;
 870
 871         /* ecc */
 872         chip->ecc.mode = NAND_ECC_HW_SYNDROME;
 873         chip->ecc.size = R852_DMA_LEN;
 874         chip->ecc.bytes = SM_OOB_SIZE;
 875         chip->ecc.strength = 2;
 876         chip->ecc.hwctl = r852_ecc_hwctl;
 877         chip->ecc.calculate = r852_ecc_calculate;
 878         chip->ecc.correct = r852_ecc_correct;
 879
 880         /* TODO: hack */
 881         chip->ecc.read_oob = r852_read_oob;
 882
 883         /* init our device structure */
 884         dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL);
 885
 886         if (!dev)
 887                 goto error5;
 888
 889         chip->priv = dev;
 890         dev->chip = chip;
 891         dev->pci_dev = pci_dev;
 892         pci_set_drvdata(pci_dev, dev);
 893
 894         dev->bounce_buffer = pci_alloc_consistent(pci_dev, R852_DMA_LEN,
 895                 &dev->phys_bounce_buffer);
 896
 897         if (!dev->bounce_buffer)
 898                 goto error6;
 899
 900
 901         error = -ENODEV;
 902         dev->mmio = pci_ioremap_bar(pci_dev, 0);
 903
 904         if (!dev->mmio)
 905                 goto error7;
 906
 907         error = -ENOMEM;
 908         dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL);
 909
 910         if (!dev->tmp_buffer)
 911                 goto error8;
 912
 913         init_completion(&dev->dma_done);
 914
 915         dev->card_workqueue = create_freezable_workqueue(DRV_NAME);
 916
 917         if (!dev->card_workqueue)
 918                 goto error9;
 919
 920         INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work);
 921
 922         /* shutdown everything - precation */
 923         r852_engine_disable(dev);
 924         r852_disable_irqs(dev);
 925
 926         r852_dma_test(dev);
 927
 928         dev->irq = pci_dev->irq;
 929         spin_lock_init(&dev->irqlock);
 930
 931         dev->card_detected = 0;
 932         r852_card_update_present(dev);
 933
 934         /*register irq handler*/
 935         error = -ENODEV;
 936         if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED,
 937                           DRV_NAME, dev))
 938                 goto error10;
 939
 940         /* kick initial present test */
 941         queue_delayed_work(dev->card_workqueue,
 942                 &dev->card_detect_work, 0);
 943
 944
 945         printk(KERN_NOTICE DRV_NAME ": driver loaded successfully\n");
 946         return 0;
 947
 948 error10:
 949         destroy_workqueue(dev->card_workqueue);
 950 error9:
 951         kfree(dev->tmp_buffer);
 952 error8:
 953         pci_iounmap(pci_dev, dev->mmio);
 954 error7:
 955         pci_free_consistent(pci_dev, R852_DMA_LEN,
 956                 dev->bounce_buffer, dev->phys_bounce_buffer);
 957 error6:
 958         kfree(dev);
 959 error5:
 960         kfree(chip);
 961 error4:
 962         pci_release_regions(pci_dev);
 963 error3:
 964 error2:
 965         pci_disable_device(pci_dev);
 966 error1:
 967         return error;
 968 }
 969
 970 static void r852_remove(struct pci_dev *pci_dev)
 971 {
 972         struct r852_device *dev = pci_get_drvdata(pci_dev);
 973
 974         /* Stop detect workqueue -
 975                 we are going to unregister the device anyway*/
 976         cancel_delayed_work_sync(&dev->card_detect_work);
 977         destroy_workqueue(dev->card_workqueue);
 978
 979         /* Unregister the device, this might make more IO */
 980         r852_unregister_nand_device(dev);
 981
 982         /* Stop interrupts */
 983         r852_disable_irqs(dev);
 984         synchronize_irq(dev->irq);
 985         free_irq(dev->irq, dev);
 986
 987         /* Cleanup */
 988         kfree(dev->tmp_buffer);
 989         pci_iounmap(pci_dev, dev->mmio);
 990         pci_free_consistent(pci_dev, R852_DMA_LEN,
 991                 dev->bounce_buffer, dev->phys_bounce_buffer);
 992
 993         kfree(dev->chip);
 994         kfree(dev);
 995
 996         /* Shutdown the PCI device */
 997         pci_release_regions(pci_dev);
 998         pci_disable_device(pci_dev);
 999 }
1000
1001 static void r852_shutdown(struct pci_dev *pci_dev)
1002 {
1003         struct r852_device *dev = pci_get_drvdata(pci_dev);
1004
1005         cancel_delayed_work_sync(&dev->card_detect_work);
1006         r852_disable_irqs(dev);
1007         synchronize_irq(dev->irq);
1008         pci_disable_device(pci_dev);
1009 }
1010
1011 #ifdef CONFIG_PM_SLEEP
1012 static int r852_suspend(struct device *device)
1013 {
1014         struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1015
1016         if (dev->ctlreg & R852_CTL_CARDENABLE)
1017                 return -EBUSY;
1018
1019         /* First make sure the detect work is gone */
1020         cancel_delayed_work_sync(&dev->card_detect_work);
1021
1022         /* Turn off the interrupts and stop the device */
1023         r852_disable_irqs(dev);
1024         r852_engine_disable(dev);
1025
1026         /* If card was pulled off just during the suspend, which is very
1027                 unlikely, we will remove it on resume, it too late now
1028                 anyway... */
1029         dev->card_unstable = 0;
1030         return 0;
1031 }
1032
1033 static int r852_resume(struct device *device)
1034 {
1035         struct r852_device *dev = pci_get_drvdata(to_pci_dev(device));
1036
1037         r852_disable_irqs(dev);
1038         r852_card_update_present(dev);
1039         r852_engine_disable(dev);
1040
1041
1042         /* If card status changed, just do the work */
1043         if (dev->card_detected != dev->card_registred) {
1044                 dbg("card was %s during low power state",
1045                         dev->card_detected ? "added" : "removed");
1046
1047                 queue_delayed_work(dev->card_workqueue,
1048                 &dev->card_detect_work, msecs_to_jiffies(1000));
1049                 return 0;
1050         }
1051
1052         /* Otherwise, initialize the card */
1053         if (dev->card_registred) {
1054                 r852_engine_enable(dev);
1055                 dev->chip->select_chip(dev->mtd, 0);
1056                 dev->chip->cmdfunc(dev->mtd, NAND_CMD_RESET, -1, -1);
1057                 dev->chip->select_chip(dev->mtd, -1);
1058         }
1059
1060         /* Program card detection IRQ */
1061         r852_update_card_detect(dev);
1062         return 0;
1063 }
1064 #endif
1065
1066 static const struct pci_device_id r852_pci_id_tbl[] = {
1067
1068         { PCI_VDEVICE(RICOH, 0x0852), },
1069         { },
1070 };
1071
1072 MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl);
1073
1074 static SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume);
1075
1076 static struct pci_driver r852_pci_driver = {
1077         .name           = DRV_NAME,
1078         .id_table       = r852_pci_id_tbl,
1079         .probe          = r852_probe,
1080         .remove         = r852_remove,
1081         .shutdown       = r852_shutdown,
1082         .driver.pm      = &r852_pm_ops,
1083 };
1084
1085 module_pci_driver(r852_pci_driver);
1086
1087 MODULE_LICENSE("GPL");
1088 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>");
1089 MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver");