1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * arch/arm/include/asm/domain.h
5 * Copyright (C) 1999 Russell King.
7 #ifndef __ASM_PROC_DOMAIN_H
8 #define __ASM_PROC_DOMAIN_H
11 #include <asm/barrier.h>
12 #include <asm/thread_info.h>
18 * DOMAIN_IO - domain 2 includes all IO only
19 * DOMAIN_USER - domain 1 includes all user memory only
20 * DOMAIN_KERNEL - domain 0 includes all kernel memory only
22 * The domain numbering depends on whether we support 36 physical
23 * address for I/O or not. Addresses above the 32 bit boundary can
24 * only be mapped using supersections and supersections can only
25 * be set for domain 0. We could just default to DOMAIN_IO as zero,
26 * but there may be systems with supersection support and no 36-bit
27 * addressing. In such cases, we want to map system memory with
28 * supersections to reduce TLB misses and footprint.
30 * 36-bit addressing and supersections are only available on
31 * CPUs based on ARMv6+ or the Intel XSC3 core.
34 #define DOMAIN_KERNEL 0
38 #define DOMAIN_KERNEL 2
42 #define DOMAIN_VECTORS 3
47 #define DOMAIN_NOACCESS 0
48 #define DOMAIN_CLIENT 1
49 #ifdef CONFIG_CPU_USE_DOMAINS
50 #define DOMAIN_MANAGER 3
52 #define DOMAIN_MANAGER 1
55 #define domain_mask(dom) ((3) << (2 * (dom)))
56 #define domain_val(dom,type) ((type) << (2 * (dom)))
58 #ifdef CONFIG_CPU_SW_DOMAIN_PAN
60 (domain_val(DOMAIN_USER, DOMAIN_NOACCESS) | \
61 domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
62 domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
63 domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT))
66 (domain_val(DOMAIN_USER, DOMAIN_CLIENT) | \
67 domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \
68 domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
69 domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT))
72 #define __DACR_DEFAULT \
73 domain_val(DOMAIN_KERNEL, DOMAIN_CLIENT) | \
74 domain_val(DOMAIN_IO, DOMAIN_CLIENT) | \
75 domain_val(DOMAIN_VECTORS, DOMAIN_CLIENT)
77 #define DACR_UACCESS_DISABLE \
78 (__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_NOACCESS))
79 #define DACR_UACCESS_ENABLE \
80 (__DACR_DEFAULT | domain_val(DOMAIN_USER, DOMAIN_CLIENT))
84 #ifdef CONFIG_CPU_CP15_MMU
85 static __always_inline
unsigned int get_domain(void)
90 "mrc p15, 0, %0, c3, c0 @ get domain"
92 : "m" (current_thread_info()->cpu_domain
));
97 static __always_inline
void set_domain(unsigned int val
)
100 "mcr p15, 0, %0, c3, c0 @ set domain"
101 : : "r" (val
) : "memory");
105 static __always_inline
unsigned int get_domain(void)
110 static __always_inline
void set_domain(unsigned int val
)
115 #ifdef CONFIG_CPU_USE_DOMAINS
116 #define modify_domain(dom,type) \
118 unsigned int domain = get_domain(); \
119 domain &= ~domain_mask(dom); \
120 domain = domain | domain_val(dom, type); \
121 set_domain(domain); \
125 static inline void modify_domain(unsigned dom
, unsigned type
) { }
129 * Generate the T (user) versions of the LDR/STR and related
130 * instructions (inline assembly)
132 #ifdef CONFIG_CPU_USE_DOMAINS
133 #define TUSER(instr) TUSERCOND(instr, )
134 #define TUSERCOND(instr, cond) #instr "t" #cond
136 #define TUSER(instr) TUSERCOND(instr, )
137 #define TUSERCOND(instr, cond) #instr #cond
140 #else /* __ASSEMBLY__ */
143 * Generate the T (user) versions of the LDR/STR and related
146 #ifdef CONFIG_CPU_USE_DOMAINS
147 #define TUSER(instr) instr ## t
149 #define TUSER(instr) instr
152 #endif /* __ASSEMBLY__ */
154 #endif /* !__ASM_PROC_DOMAIN_H */