Linux 5.7.7
[linux/fpc-iii.git] / arch / arm / mach-imx / ehci-imx31.c
blobd6d794d53a634ed031800d0fb5e11207c8d3e766
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
4 * Copyright (C) 2010 Freescale Semiconductor, Inc.
5 */
7 #include <linux/platform_device.h>
8 #include <linux/io.h>
9 #include <linux/platform_data/usb-ehci-mxc.h>
11 #include "ehci.h"
12 #include "hardware.h"
14 #define USBCTRL_OTGBASE_OFFSET 0x600
16 #define MX31_OTG_SIC_SHIFT 29
17 #define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
18 #define MX31_OTG_PM_BIT (1 << 24)
20 #define MX31_H2_SIC_SHIFT 21
21 #define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
22 #define MX31_H2_PM_BIT (1 << 16)
23 #define MX31_H2_DT_BIT (1 << 5)
25 #define MX31_H1_SIC_SHIFT 13
26 #define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
27 #define MX31_H1_PM_BIT (1 << 8)
28 #define MX31_H1_DT_BIT (1 << 4)
30 int mx31_initialize_usb_hw(int port, unsigned int flags)
32 unsigned int v;
34 v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
36 switch (port) {
37 case 0: /* OTG port */
38 v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
39 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT;
41 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
42 v |= MX31_OTG_PM_BIT;
44 break;
45 case 1: /* H1 port */
46 v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
47 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT;
49 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
50 v |= MX31_H1_PM_BIT;
52 if (!(flags & MXC_EHCI_TTL_ENABLED))
53 v |= MX31_H1_DT_BIT;
55 break;
56 case 2: /* H2 port */
57 v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
58 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT;
60 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
61 v |= MX31_H2_PM_BIT;
63 if (!(flags & MXC_EHCI_TTL_ENABLED))
64 v |= MX31_H2_DT_BIT;
66 break;
67 default:
68 return -EINVAL;
71 writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
73 return 0;