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[linux/fpc-iii.git] / arch / arm / mach-imx / mxc.h
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 */
7 #ifndef __ASM_ARCH_MXC_H__
8 #define __ASM_ARCH_MXC_H__
10 #include <linux/types.h>
12 #ifndef __ASM_ARCH_MXC_HARDWARE_H__
13 #error "Do not include directly."
14 #endif
16 #define MXC_CPU_MX1 1
17 #define MXC_CPU_MX21 21
18 #define MXC_CPU_MX25 25
19 #define MXC_CPU_MX27 27
20 #define MXC_CPU_MX31 31
21 #define MXC_CPU_MX35 35
22 #define MXC_CPU_MX51 51
23 #define MXC_CPU_MX53 53
24 #define MXC_CPU_IMX6SL 0x60
25 #define MXC_CPU_IMX6DL 0x61
26 #define MXC_CPU_IMX6SX 0x62
27 #define MXC_CPU_IMX6Q 0x63
28 #define MXC_CPU_IMX6UL 0x64
29 #define MXC_CPU_IMX6ULL 0x65
30 /* virtual cpu id for i.mx6ulz */
31 #define MXC_CPU_IMX6ULZ 0x6b
32 #define MXC_CPU_IMX6SLL 0x67
33 #define MXC_CPU_IMX7D 0x72
34 #define MXC_CPU_IMX7ULP 0xff
36 #define IMX_DDR_TYPE_LPDDR2 1
38 #ifndef __ASSEMBLY__
39 extern unsigned int __mxc_cpu_type;
41 #ifdef CONFIG_SOC_IMX6SL
42 static inline bool cpu_is_imx6sl(void)
44 return __mxc_cpu_type == MXC_CPU_IMX6SL;
46 #else
47 static inline bool cpu_is_imx6sl(void)
49 return false;
51 #endif
53 static inline bool cpu_is_imx6dl(void)
55 return __mxc_cpu_type == MXC_CPU_IMX6DL;
58 static inline bool cpu_is_imx6sx(void)
60 return __mxc_cpu_type == MXC_CPU_IMX6SX;
63 static inline bool cpu_is_imx6ul(void)
65 return __mxc_cpu_type == MXC_CPU_IMX6UL;
68 static inline bool cpu_is_imx6ull(void)
70 return __mxc_cpu_type == MXC_CPU_IMX6ULL;
73 static inline bool cpu_is_imx6ulz(void)
75 return __mxc_cpu_type == MXC_CPU_IMX6ULZ;
78 static inline bool cpu_is_imx6sll(void)
80 return __mxc_cpu_type == MXC_CPU_IMX6SLL;
83 static inline bool cpu_is_imx6q(void)
85 return __mxc_cpu_type == MXC_CPU_IMX6Q;
88 static inline bool cpu_is_imx7d(void)
90 return __mxc_cpu_type == MXC_CPU_IMX7D;
93 struct cpu_op {
94 u32 cpu_rate;
97 int tzic_enable_wake(void);
99 extern struct cpu_op *(*get_cpu_op)(int *op);
100 #endif
102 #define imx_readl readl_relaxed
103 #define imx_readw readw_relaxed
104 #define imx_writel writel_relaxed
105 #define imx_writew writew_relaxed
107 #endif /* __ASM_ARCH_MXC_H__ */