include/uapi/rdma/hfi/hfi1_ioctl.h

   1 /*
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2015 Intel Corporation.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * BSD LICENSE
  20  *
  21  * Copyright(c) 2015 Intel Corporation.
  22  *
  23  * Redistribution and use in source and binary forms, with or without
  24  * modification, are permitted provided that the following conditions
  25  * are met:
  26  *
  27  *  - Redistributions of source code must retain the above copyright
  28  *    notice, this list of conditions and the following disclaimer.
  29  *  - Redistributions in binary form must reproduce the above copyright
  30  *    notice, this list of conditions and the following disclaimer in
  31  *    the documentation and/or other materials provided with the
  32  *    distribution.
  33  *  - Neither the name of Intel Corporation nor the names of its
  34  *    contributors may be used to endorse or promote products derived
  35  *    from this software without specific prior written permission.
  36  *
  37  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  38  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  39  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  40  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  41  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  42  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  43  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  44  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  45  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  46  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  47  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  48  *
  49  */
  50
  51 #ifndef _LINUX__HFI1_IOCTL_H
  52 #define _LINUX__HFI1_IOCTL_H
  53 #include <linux/types.h>
  54
  55 /*
  56  * This structure is passed to the driver to tell it where
  57  * user code buffers are, sizes, etc.   The offsets and sizes of the
  58  * fields must remain unchanged, for binary compatibility.  It can
  59  * be extended, if userversion is changed so user code can tell, if needed
  60  */
  61 struct hfi1_user_info {
  62         /*
  63          * version of user software, to detect compatibility issues.
  64          * Should be set to HFI1_USER_SWVERSION.
  65          */
  66         __u32 userversion;
  67         __u32 pad;
  68         /*
  69          * If two or more processes wish to share a context, each process
  70          * must set the subcontext_cnt and subcontext_id to the same
  71          * values.  The only restriction on the subcontext_id is that
  72          * it be unique for a given node.
  73          */
  74         __u16 subctxt_cnt;
  75         __u16 subctxt_id;
  76         /* 128bit UUID passed in by PSM. */
  77         __u8 uuid[16];
  78 };
  79
  80 struct hfi1_ctxt_info {
  81         __u64 runtime_flags;    /* chip/drv runtime flags (HFI1_CAP_*) */
  82         __u32 rcvegr_size;      /* size of each eager buffer */
  83         __u16 num_active;       /* number of active units */
  84         __u16 unit;             /* unit (chip) assigned to caller */
  85         __u16 ctxt;             /* ctxt on unit assigned to caller */
  86         __u16 subctxt;          /* subctxt on unit assigned to caller */
  87         __u16 rcvtids;          /* number of Rcv TIDs for this context */
  88         __u16 credits;          /* number of PIO credits for this context */
  89         __u16 numa_node;        /* NUMA node of the assigned device */
  90         __u16 rec_cpu;          /* cpu # for affinity (0xffff if none) */
  91         __u16 send_ctxt;        /* send context in use by this user context */
  92         __u16 egrtids;          /* number of RcvArray entries for Eager Rcvs */
  93         __u16 rcvhdrq_cnt;      /* number of RcvHdrQ entries */
  94         __u16 rcvhdrq_entsize;  /* size (in bytes) for each RcvHdrQ entry */
  95         __u16 sdma_ring_size;   /* number of entries in SDMA request ring */
  96 };
  97
  98 struct hfi1_tid_info {
  99         /* virtual address of first page in transfer */
 100         __u64 vaddr;
 101         /* pointer to tid array. this array is big enough */
 102         __u64 tidlist;
 103         /* number of tids programmed by this request */
 104         __u32 tidcnt;
 105         /* length of transfer buffer programmed by this request */
 106         __u32 length;
 107 };
 108
 109 /*
 110  * This structure is returned by the driver immediately after
 111  * open to get implementation-specific info, and info specific to this
 112  * instance.
 113  *
 114  * This struct must have explicit pad fields where type sizes
 115  * may result in different alignments between 32 and 64 bit
 116  * programs, since the 64 bit * bit kernel requires the user code
 117  * to have matching offsets
 118  */
 119 struct hfi1_base_info {
 120         /* version of hardware, for feature checking. */
 121         __u32 hw_version;
 122         /* version of software, for feature checking. */
 123         __u32 sw_version;
 124         /* Job key */
 125         __u16 jkey;
 126         __u16 padding1;
 127         /*
 128          * The special QP (queue pair) value that identifies PSM
 129          * protocol packet from standard IB packets.
 130          */
 131         __u32 bthqp;
 132         /* PIO credit return address, */
 133         __u64 sc_credits_addr;
 134         /*
 135          * Base address of write-only pio buffers for this process.
 136          * Each buffer has sendpio_credits*64 bytes.
 137          */
 138         __u64 pio_bufbase_sop;
 139         /*
 140          * Base address of write-only pio buffers for this process.
 141          * Each buffer has sendpio_credits*64 bytes.
 142          */
 143         __u64 pio_bufbase;
 144         /* address where receive buffer queue is mapped into */
 145         __u64 rcvhdr_bufbase;
 146         /* base address of Eager receive buffers. */
 147         __u64 rcvegr_bufbase;
 148         /* base address of SDMA completion ring */
 149         __u64 sdma_comp_bufbase;
 150         /*
 151          * User register base for init code, not to be used directly by
 152          * protocol or applications.  Always maps real chip register space.
 153          * the register addresses are:
 154          * ur_rcvhdrhead, ur_rcvhdrtail, ur_rcvegrhead, ur_rcvegrtail,
 155          * ur_rcvtidflow
 156          */
 157         __u64 user_regbase;
 158         /* notification events */
 159         __u64 events_bufbase;
 160         /* status page */
 161         __u64 status_bufbase;
 162         /* rcvhdrtail update */
 163         __u64 rcvhdrtail_base;
 164         /*
 165          * shared memory pages for subctxts if ctxt is shared; these cover
 166          * all the processes in the group sharing a single context.
 167          * all have enough space for the num_subcontexts value on this job.
 168          */
 169         __u64 subctxt_uregbase;
 170         __u64 subctxt_rcvegrbuf;
 171         __u64 subctxt_rcvhdrbuf;
 172 };
 173 #endif /* _LINIUX__HFI1_IOCTL_H */