include/uapi/rdma/hfi/hfi1_user.h

   1 /*
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2015 Intel Corporation.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * BSD LICENSE
  20  *
  21  * Copyright(c) 2015 Intel Corporation.
  22  *
  23  * Redistribution and use in source and binary forms, with or without
  24  * modification, are permitted provided that the following conditions
  25  * are met:
  26  *
  27  *  - Redistributions of source code must retain the above copyright
  28  *    notice, this list of conditions and the following disclaimer.
  29  *  - Redistributions in binary form must reproduce the above copyright
  30  *    notice, this list of conditions and the following disclaimer in
  31  *    the documentation and/or other materials provided with the
  32  *    distribution.
  33  *  - Neither the name of Intel Corporation nor the names of its
  34  *    contributors may be used to endorse or promote products derived
  35  *    from this software without specific prior written permission.
  36  *
  37  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  38  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  39  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  40  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  41  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  42  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  43  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  44  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  45  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  46  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  47  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  48  *
  49  */
  50
  51 /*
  52  * This file contains defines, structures, etc. that are used
  53  * to communicate between kernel and user code.
  54  */
  55
  56 #ifndef _LINUX__HFI1_USER_H
  57 #define _LINUX__HFI1_USER_H
  58
  59 #include <linux/types.h>
  60 #include <rdma/rdma_user_ioctl.h>
  61
  62 /*
  63  * This version number is given to the driver by the user code during
  64  * initialization in the spu_userversion field of hfi1_user_info, so
  65  * the driver can check for compatibility with user code.
  66  *
  67  * The major version changes when data structures change in an incompatible
  68  * way. The driver must be the same for initialization to succeed.
  69  */
  70 #define HFI1_USER_SWMAJOR 6
  71
  72 /*
  73  * Minor version differences are always compatible
  74  * a within a major version, however if user software is larger
  75  * than driver software, some new features and/or structure fields
  76  * may not be implemented; the user code must deal with this if it
  77  * cares, or it must abort after initialization reports the difference.
  78  */
  79 #define HFI1_USER_SWMINOR 3
  80
  81 /*
  82  * We will encode the major/minor inside a single 32bit version number.
  83  */
  84 #define HFI1_SWMAJOR_SHIFT 16
  85
  86 /*
  87  * Set of HW and driver capability/feature bits.
  88  * These bit values are used to configure enabled/disabled HW and
  89  * driver features. The same set of bits are communicated to user
  90  * space.
  91  */
  92 #define HFI1_CAP_DMA_RTAIL        (1UL <<  0) /* Use DMA'ed RTail value */
  93 #define HFI1_CAP_SDMA             (1UL <<  1) /* Enable SDMA support */
  94 #define HFI1_CAP_SDMA_AHG         (1UL <<  2) /* Enable SDMA AHG support */
  95 #define HFI1_CAP_EXTENDED_PSN     (1UL <<  3) /* Enable Extended PSN support */
  96 #define HFI1_CAP_HDRSUPP          (1UL <<  4) /* Enable Header Suppression */
  97 /* 1UL << 5 unused */
  98 #define HFI1_CAP_USE_SDMA_HEAD    (1UL <<  6) /* DMA Hdr Q tail vs. use CSR */
  99 #define HFI1_CAP_MULTI_PKT_EGR    (1UL <<  7) /* Enable multi-packet Egr buffs*/
 100 #define HFI1_CAP_NODROP_RHQ_FULL  (1UL <<  8) /* Don't drop on Hdr Q full */
 101 #define HFI1_CAP_NODROP_EGR_FULL  (1UL <<  9) /* Don't drop on EGR buffs full */
 102 #define HFI1_CAP_TID_UNMAP        (1UL << 10) /* Disable Expected TID caching */
 103 #define HFI1_CAP_PRINT_UNIMPL     (1UL << 11) /* Show for unimplemented feats */
 104 #define HFI1_CAP_ALLOW_PERM_JKEY  (1UL << 12) /* Allow use of permissive JKEY */
 105 #define HFI1_CAP_NO_INTEGRITY     (1UL << 13) /* Enable ctxt integrity checks */
 106 #define HFI1_CAP_PKEY_CHECK       (1UL << 14) /* Enable ctxt PKey checking */
 107 #define HFI1_CAP_STATIC_RATE_CTRL (1UL << 15) /* Allow PBC.StaticRateControl */
 108 /* 1UL << 16 unused */
 109 #define HFI1_CAP_SDMA_HEAD_CHECK  (1UL << 17) /* SDMA head checking */
 110 #define HFI1_CAP_EARLY_CREDIT_RETURN (1UL << 18) /* early credit return */
 111
 112 #define HFI1_RCVHDR_ENTSIZE_2    (1UL << 0)
 113 #define HFI1_RCVHDR_ENTSIZE_16   (1UL << 1)
 114 #define HFI1_RCVDHR_ENTSIZE_32   (1UL << 2)
 115
 116 #define _HFI1_EVENT_FROZEN_BIT         0
 117 #define _HFI1_EVENT_LINKDOWN_BIT       1
 118 #define _HFI1_EVENT_LID_CHANGE_BIT     2
 119 #define _HFI1_EVENT_LMC_CHANGE_BIT     3
 120 #define _HFI1_EVENT_SL2VL_CHANGE_BIT   4
 121 #define _HFI1_EVENT_TID_MMU_NOTIFY_BIT 5
 122 #define _HFI1_MAX_EVENT_BIT _HFI1_EVENT_TID_MMU_NOTIFY_BIT
 123
 124 #define HFI1_EVENT_FROZEN            (1UL << _HFI1_EVENT_FROZEN_BIT)
 125 #define HFI1_EVENT_LINKDOWN          (1UL << _HFI1_EVENT_LINKDOWN_BIT)
 126 #define HFI1_EVENT_LID_CHANGE        (1UL << _HFI1_EVENT_LID_CHANGE_BIT)
 127 #define HFI1_EVENT_LMC_CHANGE        (1UL << _HFI1_EVENT_LMC_CHANGE_BIT)
 128 #define HFI1_EVENT_SL2VL_CHANGE      (1UL << _HFI1_EVENT_SL2VL_CHANGE_BIT)
 129 #define HFI1_EVENT_TID_MMU_NOTIFY    (1UL << _HFI1_EVENT_TID_MMU_NOTIFY_BIT)
 130
 131 /*
 132  * These are the status bits readable (in ASCII form, 64bit value)
 133  * from the "status" sysfs file.  For binary compatibility, values
 134  * must remain as is; removed states can be reused for different
 135  * purposes.
 136  */
 137 #define HFI1_STATUS_INITTED       0x1    /* basic initialization done */
 138 /* Chip has been found and initialized */
 139 #define HFI1_STATUS_CHIP_PRESENT 0x20
 140 /* IB link is at ACTIVE, usable for data traffic */
 141 #define HFI1_STATUS_IB_READY     0x40
 142 /* link is configured, LID, MTU, etc. have been set */
 143 #define HFI1_STATUS_IB_CONF      0x80
 144 /* A Fatal hardware error has occurred. */
 145 #define HFI1_STATUS_HWERROR     0x200
 146
 147 /*
 148  * Number of supported shared contexts.
 149  * This is the maximum number of software contexts that can share
 150  * a hardware send/receive context.
 151  */
 152 #define HFI1_MAX_SHARED_CTXTS 8
 153
 154 /*
 155  * Poll types
 156  */
 157 #define HFI1_POLL_TYPE_ANYRCV     0x0
 158 #define HFI1_POLL_TYPE_URGENT     0x1
 159
 160 enum hfi1_sdma_comp_state {
 161         FREE = 0,
 162         QUEUED,
 163         COMPLETE,
 164         ERROR
 165 };
 166
 167 /*
 168  * SDMA completion ring entry
 169  */
 170 struct hfi1_sdma_comp_entry {
 171         __u32 status;
 172         __u32 errcode;
 173 };
 174
 175 /*
 176  * Device status and notifications from driver to user-space.
 177  */
 178 struct hfi1_status {
 179         __u64 dev;      /* device/hw status bits */
 180         __u64 port;     /* port state and status bits */
 181         char freezemsg[0];
 182 };
 183
 184 enum sdma_req_opcode {
 185         EXPECTED = 0,
 186         EAGER
 187 };
 188
 189 #define HFI1_SDMA_REQ_VERSION_MASK 0xF
 190 #define HFI1_SDMA_REQ_VERSION_SHIFT 0x0
 191 #define HFI1_SDMA_REQ_OPCODE_MASK 0xF
 192 #define HFI1_SDMA_REQ_OPCODE_SHIFT 0x4
 193 #define HFI1_SDMA_REQ_IOVCNT_MASK 0xFF
 194 #define HFI1_SDMA_REQ_IOVCNT_SHIFT 0x8
 195
 196 struct sdma_req_info {
 197         /*
 198          * bits 0-3 - version (currently unused)
 199          * bits 4-7 - opcode (enum sdma_req_opcode)
 200          * bits 8-15 - io vector count
 201          */
 202         __u16 ctrl;
 203         /*
 204          * Number of fragments contained in this request.
 205          * User-space has already computed how many
 206          * fragment-sized packet the user buffer will be
 207          * split into.
 208          */
 209         __u16 npkts;
 210         /*
 211          * Size of each fragment the user buffer will be
 212          * split into.
 213          */
 214         __u16 fragsize;
 215         /*
 216          * Index of the slot in the SDMA completion ring
 217          * this request should be using. User-space is
 218          * in charge of managing its own ring.
 219          */
 220         __u16 comp_idx;
 221 } __packed;
 222
 223 /*
 224  * SW KDETH header.
 225  * swdata is SW defined portion.
 226  */
 227 struct hfi1_kdeth_header {
 228         __le32 ver_tid_offset;
 229         __le16 jkey;
 230         __le16 hcrc;
 231         __le32 swdata[7];
 232 } __packed;
 233
 234 /*
 235  * Structure describing the headers that User space uses. The
 236  * structure above is a subset of this one.
 237  */
 238 struct hfi1_pkt_header {
 239         __le16 pbc[4];
 240         __be16 lrh[4];
 241         __be32 bth[3];
 242         struct hfi1_kdeth_header kdeth;
 243 } __packed;
 244
 245
 246 /*
 247  * The list of usermode accessible registers.
 248  */
 249 enum hfi1_ureg {
 250         /* (RO)  DMA RcvHdr to be used next. */
 251         ur_rcvhdrtail = 0,
 252         /* (RW)  RcvHdr entry to be processed next by host. */
 253         ur_rcvhdrhead = 1,
 254         /* (RO)  Index of next Eager index to use. */
 255         ur_rcvegrindextail = 2,
 256         /* (RW)  Eager TID to be processed next */
 257         ur_rcvegrindexhead = 3,
 258         /* (RO)  Receive Eager Offset Tail */
 259         ur_rcvegroffsettail = 4,
 260         /* For internal use only; max register number. */
 261         ur_maxreg,
 262         /* (RW)  Receive TID flow table */
 263         ur_rcvtidflowtable = 256
 264 };
 265
 266 #endif /* _LINIUX__HFI1_USER_H */