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[linux/fpc-iii.git] / drivers / i2c / muxes / i2c-mux-pca9541.c
blob9e75d6b9140b53a929accf512200d942796ff55a
1 /*
2 * I2C multiplexer driver for PCA9541 bus master selector
4 * Copyright (c) 2010 Ericsson AB.
6 * Author: Guenter Roeck <linux@roeck-us.net>
8 * Derived from:
9 * pca954x.c
11 * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
12 * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
14 * This file is licensed under the terms of the GNU General Public
15 * License version 2. This program is licensed "as is" without any
16 * warranty of any kind, whether express or implied.
19 #include <linux/delay.h>
20 #include <linux/device.h>
21 #include <linux/i2c.h>
22 #include <linux/i2c-mux.h>
23 #include <linux/jiffies.h>
24 #include <linux/module.h>
25 #include <linux/platform_data/pca954x.h>
26 #include <linux/slab.h>
29 * The PCA9541 is a bus master selector. It supports two I2C masters connected
30 * to a single slave bus.
32 * Before each bus transaction, a master has to acquire bus ownership. After the
33 * transaction is complete, bus ownership has to be released. This fits well
34 * into the I2C multiplexer framework, which provides select and release
35 * functions for this purpose. For this reason, this driver is modeled as
36 * single-channel I2C bus multiplexer.
38 * This driver assumes that the two bus masters are controlled by two different
39 * hosts. If a single host controls both masters, platform code has to ensure
40 * that only one of the masters is instantiated at any given time.
43 #define PCA9541_CONTROL 0x01
44 #define PCA9541_ISTAT 0x02
46 #define PCA9541_CTL_MYBUS (1 << 0)
47 #define PCA9541_CTL_NMYBUS (1 << 1)
48 #define PCA9541_CTL_BUSON (1 << 2)
49 #define PCA9541_CTL_NBUSON (1 << 3)
50 #define PCA9541_CTL_BUSINIT (1 << 4)
51 #define PCA9541_CTL_TESTON (1 << 6)
52 #define PCA9541_CTL_NTESTON (1 << 7)
54 #define PCA9541_ISTAT_INTIN (1 << 0)
55 #define PCA9541_ISTAT_BUSINIT (1 << 1)
56 #define PCA9541_ISTAT_BUSOK (1 << 2)
57 #define PCA9541_ISTAT_BUSLOST (1 << 3)
58 #define PCA9541_ISTAT_MYTEST (1 << 6)
59 #define PCA9541_ISTAT_NMYTEST (1 << 7)
61 #define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)
62 #define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)
63 #define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)
64 #define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON)
66 /* arbitration timeouts, in jiffies */
67 #define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */
68 #define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */
70 /* arbitration retry delays, in us */
71 #define SELECT_DELAY_SHORT 50
72 #define SELECT_DELAY_LONG 1000
74 struct pca9541 {
75 struct i2c_client *client;
76 unsigned long select_timeout;
77 unsigned long arb_timeout;
80 static const struct i2c_device_id pca9541_id[] = {
81 {"pca9541", 0},
85 MODULE_DEVICE_TABLE(i2c, pca9541_id);
87 #ifdef CONFIG_OF
88 static const struct of_device_id pca9541_of_match[] = {
89 { .compatible = "nxp,pca9541" },
92 MODULE_DEVICE_TABLE(of, pca9541_of_match);
93 #endif
96 * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
97 * as they will try to lock the adapter a second time.
99 static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
101 struct i2c_adapter *adap = client->adapter;
102 union i2c_smbus_data data = { .byte = val };
104 return __i2c_smbus_xfer(adap, client->addr, client->flags,
105 I2C_SMBUS_WRITE, command,
106 I2C_SMBUS_BYTE_DATA, &data);
110 * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
111 * as they will try to lock adapter a second time.
113 static int pca9541_reg_read(struct i2c_client *client, u8 command)
115 struct i2c_adapter *adap = client->adapter;
116 union i2c_smbus_data data;
117 int ret;
119 ret = __i2c_smbus_xfer(adap, client->addr, client->flags,
120 I2C_SMBUS_READ, command,
121 I2C_SMBUS_BYTE_DATA, &data);
123 return ret ?: data.byte;
127 * Arbitration management functions
130 /* Release bus. Also reset NTESTON and BUSINIT if it was set. */
131 static void pca9541_release_bus(struct i2c_client *client)
133 int reg;
135 reg = pca9541_reg_read(client, PCA9541_CONTROL);
136 if (reg >= 0 && !busoff(reg) && mybus(reg))
137 pca9541_reg_write(client, PCA9541_CONTROL,
138 (reg & PCA9541_CTL_NBUSON) >> 1);
142 * Arbitration is defined as a two-step process. A bus master can only activate
143 * the slave bus if it owns it; otherwise it has to request ownership first.
144 * This multi-step process ensures that access contention is resolved
145 * gracefully.
147 * Bus Ownership Other master Action
148 * state requested access
149 * ----------------------------------------------------
150 * off - yes wait for arbitration timeout or
151 * for other master to drop request
152 * off no no take ownership
153 * off yes no turn on bus
154 * on yes - done
155 * on no - wait for arbitration timeout or
156 * for other master to release bus
158 * The main contention point occurs if the slave bus is off and both masters
159 * request ownership at the same time. In this case, one master will turn on
160 * the slave bus, believing that it owns it. The other master will request
161 * bus ownership. Result is that the bus is turned on, and master which did
162 * _not_ own the slave bus before ends up owning it.
165 /* Control commands per PCA9541 datasheet */
166 static const u8 pca9541_control[16] = {
167 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1
171 * Channel arbitration
173 * Return values:
174 * <0: error
175 * 0 : bus not acquired
176 * 1 : bus acquired
178 static int pca9541_arbitrate(struct i2c_client *client)
180 struct i2c_mux_core *muxc = i2c_get_clientdata(client);
181 struct pca9541 *data = i2c_mux_priv(muxc);
182 int reg;
184 reg = pca9541_reg_read(client, PCA9541_CONTROL);
185 if (reg < 0)
186 return reg;
188 if (busoff(reg)) {
189 int istat;
191 * Bus is off. Request ownership or turn it on unless
192 * other master requested ownership.
194 istat = pca9541_reg_read(client, PCA9541_ISTAT);
195 if (!(istat & PCA9541_ISTAT_NMYTEST)
196 || time_is_before_eq_jiffies(data->arb_timeout)) {
198 * Other master did not request ownership,
199 * or arbitration timeout expired. Take the bus.
201 pca9541_reg_write(client,
202 PCA9541_CONTROL,
203 pca9541_control[reg & 0x0f]
204 | PCA9541_CTL_NTESTON);
205 data->select_timeout = SELECT_DELAY_SHORT;
206 } else {
208 * Other master requested ownership.
209 * Set extra long timeout to give it time to acquire it.
211 data->select_timeout = SELECT_DELAY_LONG * 2;
213 } else if (mybus(reg)) {
215 * Bus is on, and we own it. We are done with acquisition.
216 * Reset NTESTON and BUSINIT, then return success.
218 if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))
219 pca9541_reg_write(client,
220 PCA9541_CONTROL,
221 reg & ~(PCA9541_CTL_NTESTON
222 | PCA9541_CTL_BUSINIT));
223 return 1;
224 } else {
226 * Other master owns the bus.
227 * If arbitration timeout has expired, force ownership.
228 * Otherwise request it.
230 data->select_timeout = SELECT_DELAY_LONG;
231 if (time_is_before_eq_jiffies(data->arb_timeout)) {
232 /* Time is up, take the bus and reset it. */
233 pca9541_reg_write(client,
234 PCA9541_CONTROL,
235 pca9541_control[reg & 0x0f]
236 | PCA9541_CTL_BUSINIT
237 | PCA9541_CTL_NTESTON);
238 } else {
239 /* Request bus ownership if needed */
240 if (!(reg & PCA9541_CTL_NTESTON))
241 pca9541_reg_write(client,
242 PCA9541_CONTROL,
243 reg | PCA9541_CTL_NTESTON);
246 return 0;
249 static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan)
251 struct pca9541 *data = i2c_mux_priv(muxc);
252 struct i2c_client *client = data->client;
253 int ret;
254 unsigned long timeout = jiffies + ARB2_TIMEOUT;
255 /* give up after this time */
257 data->arb_timeout = jiffies + ARB_TIMEOUT;
258 /* force bus ownership after this time */
260 do {
261 ret = pca9541_arbitrate(client);
262 if (ret)
263 return ret < 0 ? ret : 0;
265 if (data->select_timeout == SELECT_DELAY_SHORT)
266 udelay(data->select_timeout);
267 else
268 msleep(data->select_timeout / 1000);
269 } while (time_is_after_eq_jiffies(timeout));
271 return -ETIMEDOUT;
274 static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan)
276 struct pca9541 *data = i2c_mux_priv(muxc);
277 struct i2c_client *client = data->client;
279 pca9541_release_bus(client);
280 return 0;
284 * I2C init/probing/exit functions
286 static int pca9541_probe(struct i2c_client *client,
287 const struct i2c_device_id *id)
289 struct i2c_adapter *adap = client->adapter;
290 struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
291 struct i2c_mux_core *muxc;
292 struct pca9541 *data;
293 int force;
294 int ret;
296 if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))
297 return -ENODEV;
300 * I2C accesses are unprotected here.
301 * We have to lock the I2C segment before releasing the bus.
303 i2c_lock_bus(adap, I2C_LOCK_SEGMENT);
304 pca9541_release_bus(client);
305 i2c_unlock_bus(adap, I2C_LOCK_SEGMENT);
307 /* Create mux adapter */
309 force = 0;
310 if (pdata)
311 force = pdata->modes[0].adap_id;
312 muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data),
313 I2C_MUX_ARBITRATOR,
314 pca9541_select_chan, pca9541_release_chan);
315 if (!muxc)
316 return -ENOMEM;
318 data = i2c_mux_priv(muxc);
319 data->client = client;
321 i2c_set_clientdata(client, muxc);
323 ret = i2c_mux_add_adapter(muxc, force, 0, 0);
324 if (ret)
325 return ret;
327 dev_info(&client->dev, "registered master selector for I2C %s\n",
328 client->name);
330 return 0;
333 static int pca9541_remove(struct i2c_client *client)
335 struct i2c_mux_core *muxc = i2c_get_clientdata(client);
337 i2c_mux_del_adapters(muxc);
338 return 0;
341 static struct i2c_driver pca9541_driver = {
342 .driver = {
343 .name = "pca9541",
344 .of_match_table = of_match_ptr(pca9541_of_match),
346 .probe = pca9541_probe,
347 .remove = pca9541_remove,
348 .id_table = pca9541_id,
351 module_i2c_driver(pca9541_driver);
353 MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
354 MODULE_DESCRIPTION("PCA9541 I2C master selector driver");
355 MODULE_LICENSE("GPL v2");