drivers/crypto/bcm/spu2.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright 2016 Broadcom
   4  */
   5
   6 /*
   7  * This file contains SPU message definitions specific to SPU2.
   8  */
   9
  10 #ifndef _SPU2_H
  11 #define _SPU2_H
  12
  13 enum spu2_cipher_type {
  14         SPU2_CIPHER_TYPE_NONE = 0x0,
  15         SPU2_CIPHER_TYPE_AES128 = 0x1,
  16         SPU2_CIPHER_TYPE_AES192 = 0x2,
  17         SPU2_CIPHER_TYPE_AES256 = 0x3,
  18         SPU2_CIPHER_TYPE_DES = 0x4,
  19         SPU2_CIPHER_TYPE_3DES = 0x5,
  20         SPU2_CIPHER_TYPE_LAST
  21 };
  22
  23 enum spu2_cipher_mode {
  24         SPU2_CIPHER_MODE_ECB = 0x0,
  25         SPU2_CIPHER_MODE_CBC = 0x1,
  26         SPU2_CIPHER_MODE_CTR = 0x2,
  27         SPU2_CIPHER_MODE_CFB = 0x3,
  28         SPU2_CIPHER_MODE_OFB = 0x4,
  29         SPU2_CIPHER_MODE_XTS = 0x5,
  30         SPU2_CIPHER_MODE_CCM = 0x6,
  31         SPU2_CIPHER_MODE_GCM = 0x7,
  32         SPU2_CIPHER_MODE_LAST
  33 };
  34
  35 enum spu2_hash_type {
  36         SPU2_HASH_TYPE_NONE = 0x0,
  37         SPU2_HASH_TYPE_AES128 = 0x1,
  38         SPU2_HASH_TYPE_AES192 = 0x2,
  39         SPU2_HASH_TYPE_AES256 = 0x3,
  40         SPU2_HASH_TYPE_MD5 = 0x6,
  41         SPU2_HASH_TYPE_SHA1 = 0x7,
  42         SPU2_HASH_TYPE_SHA224 = 0x8,
  43         SPU2_HASH_TYPE_SHA256 = 0x9,
  44         SPU2_HASH_TYPE_SHA384 = 0xa,
  45         SPU2_HASH_TYPE_SHA512 = 0xb,
  46         SPU2_HASH_TYPE_SHA512_224 = 0xc,
  47         SPU2_HASH_TYPE_SHA512_256 = 0xd,
  48         SPU2_HASH_TYPE_SHA3_224 = 0xe,
  49         SPU2_HASH_TYPE_SHA3_256 = 0xf,
  50         SPU2_HASH_TYPE_SHA3_384 = 0x10,
  51         SPU2_HASH_TYPE_SHA3_512 = 0x11,
  52         SPU2_HASH_TYPE_LAST
  53 };
  54
  55 enum spu2_hash_mode {
  56         SPU2_HASH_MODE_CMAC = 0x0,
  57         SPU2_HASH_MODE_CBC_MAC = 0x1,
  58         SPU2_HASH_MODE_XCBC_MAC = 0x2,
  59         SPU2_HASH_MODE_HMAC = 0x3,
  60         SPU2_HASH_MODE_RABIN = 0x4,
  61         SPU2_HASH_MODE_CCM = 0x5,
  62         SPU2_HASH_MODE_GCM = 0x6,
  63         SPU2_HASH_MODE_RESERVED = 0x7,
  64         SPU2_HASH_MODE_LAST
  65 };
  66
  67 enum spu2_ret_md_opts {
  68         SPU2_RET_NO_MD = 0,     /* return no metadata */
  69         SPU2_RET_FMD_OMD = 1,   /* return both FMD and OMD */
  70         SPU2_RET_FMD_ONLY = 2,  /* return only FMD */
  71         SPU2_RET_FMD_OMD_IV = 3,        /* return FMD and OMD with just IVs */
  72 };
  73
  74 /* Fixed Metadata format */
  75 struct SPU2_FMD {
  76         u64 ctrl0;
  77         u64 ctrl1;
  78         u64 ctrl2;
  79         u64 ctrl3;
  80 };
  81
  82 #define FMD_SIZE  sizeof(struct SPU2_FMD)
  83
  84 /* Fixed part of request message header length in bytes. Just FMD. */
  85 #define SPU2_REQ_FIXED_LEN FMD_SIZE
  86 #define SPU2_HEADER_ALLOC_LEN (SPU_REQ_FIXED_LEN + \
  87                                 2 * MAX_KEY_SIZE + 2 * MAX_IV_SIZE)
  88
  89 /* FMD ctrl0 field masks */
  90 #define SPU2_CIPH_ENCRYPT_EN            0x1 /* 0: decrypt, 1: encrypt */
  91 #define SPU2_CIPH_TYPE                 0xF0 /* one of spu2_cipher_type */
  92 #define SPU2_CIPH_TYPE_SHIFT              4
  93 #define SPU2_CIPH_MODE                0xF00 /* one of spu2_cipher_mode */
  94 #define SPU2_CIPH_MODE_SHIFT              8
  95 #define SPU2_CFB_MASK                0x7000 /* cipher feedback mask */
  96 #define SPU2_CFB_MASK_SHIFT              12
  97 #define SPU2_PROTO_SEL             0xF00000 /* MACsec, IPsec, TLS... */
  98 #define SPU2_PROTO_SEL_SHIFT             20
  99 #define SPU2_HASH_FIRST           0x1000000 /* 1: hash input is input pkt
 100                                              * data
 101                                              */
 102 #define SPU2_CHK_TAG              0x2000000 /* 1: check digest provided */
 103 #define SPU2_HASH_TYPE          0x1F0000000 /* one of spu2_hash_type */
 104 #define SPU2_HASH_TYPE_SHIFT             28
 105 #define SPU2_HASH_MODE         0xF000000000 /* one of spu2_hash_mode */
 106 #define SPU2_HASH_MODE_SHIFT             36
 107 #define SPU2_CIPH_PAD_EN     0x100000000000 /* 1: Add pad to end of payload for
 108                                              *    enc
 109                                              */
 110 #define SPU2_CIPH_PAD      0xFF000000000000 /* cipher pad value */
 111 #define SPU2_CIPH_PAD_SHIFT              48
 112
 113 /* FMD ctrl1 field masks */
 114 #define SPU2_TAG_LOC                    0x1 /* 1: end of payload, 0: undef */
 115 #define SPU2_HAS_FR_DATA                0x2 /* 1: msg has frame data */
 116 #define SPU2_HAS_AAD1                   0x4 /* 1: msg has AAD1 field */
 117 #define SPU2_HAS_NAAD                   0x8 /* 1: msg has NAAD field */
 118 #define SPU2_HAS_AAD2                  0x10 /* 1: msg has AAD2 field */
 119 #define SPU2_HAS_ESN                   0x20 /* 1: msg has ESN field */
 120 #define SPU2_HASH_KEY_LEN            0xFF00 /* len of hash key in bytes.
 121                                              * HMAC only.
 122                                              */
 123 #define SPU2_HASH_KEY_LEN_SHIFT           8
 124 #define SPU2_CIPH_KEY_LEN         0xFF00000 /* len of cipher key in bytes */
 125 #define SPU2_CIPH_KEY_LEN_SHIFT          20
 126 #define SPU2_GENIV               0x10000000 /* 1: hw generates IV */
 127 #define SPU2_HASH_IV             0x20000000 /* 1: IV incl in hash */
 128 #define SPU2_RET_IV              0x40000000 /* 1: return IV in output msg
 129                                              *    b4 payload
 130                                              */
 131 #define SPU2_RET_IV_LEN         0xF00000000 /* length in bytes of IV returned.
 132                                              * 0 = 16 bytes
 133                                              */
 134 #define SPU2_RET_IV_LEN_SHIFT            32
 135 #define SPU2_IV_OFFSET         0xF000000000 /* gen IV offset */
 136 #define SPU2_IV_OFFSET_SHIFT             36
 137 #define SPU2_IV_LEN          0x1F0000000000 /* length of input IV in bytes */
 138 #define SPU2_IV_LEN_SHIFT                40
 139 #define SPU2_HASH_TAG_LEN  0x7F000000000000 /* hash tag length in bytes */
 140 #define SPU2_HASH_TAG_LEN_SHIFT          48
 141 #define SPU2_RETURN_MD    0x300000000000000 /* return metadata */
 142 #define SPU2_RETURN_MD_SHIFT             56
 143 #define SPU2_RETURN_FD    0x400000000000000
 144 #define SPU2_RETURN_AAD1  0x800000000000000
 145 #define SPU2_RETURN_NAAD 0x1000000000000000
 146 #define SPU2_RETURN_AAD2 0x2000000000000000
 147 #define SPU2_RETURN_PAY  0x4000000000000000 /* return payload */
 148
 149 /* FMD ctrl2 field masks */
 150 #define SPU2_AAD1_OFFSET              0xFFF /* byte offset of AAD1 field */
 151 #define SPU2_AAD1_LEN               0xFF000 /* length of AAD1 in bytes */
 152 #define SPU2_AAD1_LEN_SHIFT              12
 153 #define SPU2_AAD2_OFFSET         0xFFF00000 /* byte offset of AAD2 field */
 154 #define SPU2_AAD2_OFFSET_SHIFT           20
 155 #define SPU2_PL_OFFSET   0xFFFFFFFF00000000 /* payload offset from AAD2 */
 156 #define SPU2_PL_OFFSET_SHIFT             32
 157
 158 /* FMD ctrl3 field masks */
 159 #define SPU2_PL_LEN              0xFFFFFFFF /* payload length in bytes */
 160 #define SPU2_TLS_LEN         0xFFFF00000000 /* TLS encrypt: cipher len
 161                                              * TLS decrypt: compressed len
 162                                              */
 163 #define SPU2_TLS_LEN_SHIFT               32
 164
 165 /*
 166  * Max value that can be represented in the Payload Length field of the
 167  * ctrl3 word of FMD.
 168  */
 169 #define SPU2_MAX_PAYLOAD  SPU2_PL_LEN
 170
 171 /* Error values returned in STATUS field of response messages */
 172 #define SPU2_INVALID_ICV  1
 173
 174 void spu2_dump_msg_hdr(u8 *buf, unsigned int buf_len);
 175 u32 spu2_ctx_max_payload(enum spu_cipher_alg cipher_alg,
 176                          enum spu_cipher_mode cipher_mode,
 177                          unsigned int blocksize);
 178 u32 spu2_payload_length(u8 *spu_hdr);
 179 u16 spu2_response_hdr_len(u16 auth_key_len, u16 enc_key_len, bool is_hash);
 180 u16 spu2_hash_pad_len(enum hash_alg hash_alg, enum hash_mode hash_mode,
 181                       u32 chunksize, u16 hash_block_size);
 182 u32 spu2_gcm_ccm_pad_len(enum spu_cipher_mode cipher_mode,
 183                          unsigned int data_size);
 184 u32 spu2_assoc_resp_len(enum spu_cipher_mode cipher_mode,
 185                         unsigned int assoc_len, unsigned int iv_len,
 186                         bool is_encrypt);
 187 u8 spu2_aead_ivlen(enum spu_cipher_mode cipher_mode,
 188                    u16 iv_len);
 189 enum hash_type spu2_hash_type(u32 src_sent);
 190 u32 spu2_digest_size(u32 alg_digest_size, enum hash_alg alg,
 191                      enum hash_type htype);
 192 u32 spu2_create_request(u8 *spu_hdr,
 193                         struct spu_request_opts *req_opts,
 194                         struct spu_cipher_parms *cipher_parms,
 195                         struct spu_hash_parms *hash_parms,
 196                         struct spu_aead_parms *aead_parms,
 197                         unsigned int data_size);
 198 u16 spu2_cipher_req_init(u8 *spu_hdr, struct spu_cipher_parms *cipher_parms);
 199 void spu2_cipher_req_finish(u8 *spu_hdr,
 200                             u16 spu_req_hdr_len,
 201                             unsigned int is_inbound,
 202                             struct spu_cipher_parms *cipher_parms,
 203                             unsigned int data_size);
 204 void spu2_request_pad(u8 *pad_start, u32 gcm_padding, u32 hash_pad_len,
 205                       enum hash_alg auth_alg, enum hash_mode auth_mode,
 206                       unsigned int total_sent, u32 status_padding);
 207 u8 spu2_xts_tweak_in_payload(void);
 208 u8 spu2_tx_status_len(void);
 209 u8 spu2_rx_status_len(void);
 210 int spu2_status_process(u8 *statp);
 211 void spu2_ccm_update_iv(unsigned int digestsize,
 212                         struct spu_cipher_parms *cipher_parms,
 213                         unsigned int assoclen, unsigned int chunksize,
 214                         bool is_encrypt, bool is_esp);
 215 u32 spu2_wordalign_padlen(u32 data_size);
 216 #endif