drivers/crypto/caam/caamhash_desc.h

   1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
   2 /*
   3  * Shared descriptors for ahash algorithms
   4  *
   5  * Copyright 2017 NXP
   6  */
   7
   8 #ifndef _CAAMHASH_DESC_H_
   9 #define _CAAMHASH_DESC_H_
  10
  11 /* length of descriptors text */
  12 #define DESC_AHASH_BASE                 (3 * CAAM_CMD_SZ)
  13 #define DESC_AHASH_UPDATE_LEN           (6 * CAAM_CMD_SZ)
  14 #define DESC_AHASH_UPDATE_FIRST_LEN     (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ)
  15 #define DESC_AHASH_FINAL_LEN            (DESC_AHASH_BASE + 5 * CAAM_CMD_SZ)
  16 #define DESC_AHASH_DIGEST_LEN           (DESC_AHASH_BASE + 4 * CAAM_CMD_SZ)
  17
  18 static inline bool is_xcbc_aes(u32 algtype)
  19 {
  20         return (algtype & (OP_ALG_ALGSEL_MASK | OP_ALG_AAI_MASK)) ==
  21                (OP_ALG_ALGSEL_AES | OP_ALG_AAI_XCBC_MAC);
  22 }
  23
  24 void cnstr_shdsc_ahash(u32 * const desc, struct alginfo *adata, u32 state,
  25                        int digestsize, int ctx_len, bool import_ctx, int era);
  26
  27 void cnstr_shdsc_sk_hash(u32 * const desc, struct alginfo *adata, u32 state,
  28                          int digestsize, int ctx_len);
  29 #endif /* _CAAMHASH_DESC_H_ */