1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Renesas SuperH DMA Engine support
5 * Copyright (C) 2013 Renesas Electronics, Inc.
13 /* Transmit sizes and respective CHCR register values */
24 /* log2(size / 8) - used to calculate number of transfers */
25 #define SH_DMAE_TS_SHIFT { \
27 [XMIT_SZ_16BIT] = 1, \
28 [XMIT_SZ_32BIT] = 2, \
29 [XMIT_SZ_64BIT] = 3, \
30 [XMIT_SZ_128BIT] = 4, \
31 [XMIT_SZ_256BIT] = 5, \
32 [XMIT_SZ_512BIT] = 6, \
35 #define TS_LOW_BIT 0x3 /* --xx */
36 #define TS_HI_BIT 0xc /* xx-- */
38 #define TS_LOW_SHIFT (3)
39 #define TS_HI_SHIFT (20 - 2) /* 2 bits for shifted low TS */
41 #define TS_INDEX2VAL(i) \
42 ((((i) & TS_LOW_BIT) << TS_LOW_SHIFT) |\
43 (((i) & TS_HI_BIT) << TS_HI_SHIFT))
45 #define CHCR_TX(xmit_sz) (DM_FIX | SM_INC | RS_ERS | TS_INDEX2VAL((xmit_sz)))
46 #define CHCR_RX(xmit_sz) (DM_INC | SM_FIX | RS_ERS | TS_INDEX2VAL((xmit_sz)))