1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas USB DMA Controller Driver
5 * Copyright (C) 2015 Renesas Electronics Corporation
8 * Copyright (C) 2014 Renesas Electronics Inc.
9 * Author: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
12 #include <linux/delay.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/dmaengine.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/module.h>
19 #include <linux/of_dma.h>
20 #include <linux/of_platform.h>
21 #include <linux/platform_device.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/slab.h>
24 #include <linux/spinlock.h>
26 #include "../dmaengine.h"
27 #include "../virt-dma.h"
30 * struct usb_dmac_sg - Descriptor for a hardware transfer
31 * @mem_addr: memory address
32 * @size: transfer size in bytes
40 * struct usb_dmac_desc - USB DMA Transfer Descriptor
41 * @vd: base virtual channel DMA transaction descriptor
42 * @direction: direction of the DMA transfer
43 * @sg_allocated_len: length of allocated sg
44 * @sg_len: length of sg
45 * @sg_index: index of sg
46 * @residue: residue after the DMAC completed a transfer
47 * @node: node for desc_got and desc_freed
48 * @done_cookie: cookie after the DMAC completed a transfer
49 * @sg: information for the transfer
51 struct usb_dmac_desc
{
52 struct virt_dma_desc vd
;
53 enum dma_transfer_direction direction
;
54 unsigned int sg_allocated_len
;
56 unsigned int sg_index
;
58 struct list_head node
;
59 dma_cookie_t done_cookie
;
60 struct usb_dmac_sg sg
[];
63 #define to_usb_dmac_desc(vd) container_of(vd, struct usb_dmac_desc, vd)
66 * struct usb_dmac_chan - USB DMA Controller Channel
67 * @vc: base virtual DMA channel object
68 * @iomem: channel I/O memory base
69 * @index: index of this channel in the controller
70 * @irq: irq number of this channel
71 * @desc: the current descriptor
72 * @descs_allocated: number of descriptors allocated
73 * @desc_got: got descriptors
74 * @desc_freed: freed descriptors after the DMAC completed a transfer
76 struct usb_dmac_chan
{
77 struct virt_dma_chan vc
;
81 struct usb_dmac_desc
*desc
;
83 struct list_head desc_got
;
84 struct list_head desc_freed
;
87 #define to_usb_dmac_chan(c) container_of(c, struct usb_dmac_chan, vc.chan)
90 * struct usb_dmac - USB DMA Controller
91 * @engine: base DMA engine object
92 * @dev: the hardware device
93 * @iomem: remapped I/O memory base
94 * @n_channels: number of available channels
95 * @channels: array of DMAC channels
98 struct dma_device engine
;
102 unsigned int n_channels
;
103 struct usb_dmac_chan
*channels
;
106 #define to_usb_dmac(d) container_of(d, struct usb_dmac, engine)
108 /* -----------------------------------------------------------------------------
112 #define USB_DMAC_CHAN_OFFSET(i) (0x20 + 0x20 * (i))
114 #define USB_DMASWR 0x0008
115 #define USB_DMASWR_SWR (1 << 0)
116 #define USB_DMAOR 0x0060
117 #define USB_DMAOR_AE (1 << 1)
118 #define USB_DMAOR_DME (1 << 0)
120 #define USB_DMASAR 0x0000
121 #define USB_DMADAR 0x0004
122 #define USB_DMATCR 0x0008
123 #define USB_DMATCR_MASK 0x00ffffff
124 #define USB_DMACHCR 0x0014
125 #define USB_DMACHCR_FTE (1 << 24)
126 #define USB_DMACHCR_NULLE (1 << 16)
127 #define USB_DMACHCR_NULL (1 << 12)
128 #define USB_DMACHCR_TS_8B ((0 << 7) | (0 << 6))
129 #define USB_DMACHCR_TS_16B ((0 << 7) | (1 << 6))
130 #define USB_DMACHCR_TS_32B ((1 << 7) | (0 << 6))
131 #define USB_DMACHCR_IE (1 << 5)
132 #define USB_DMACHCR_SP (1 << 2)
133 #define USB_DMACHCR_TE (1 << 1)
134 #define USB_DMACHCR_DE (1 << 0)
135 #define USB_DMATEND 0x0018
137 /* Hardcode the xfer_shift to 5 (32bytes) */
138 #define USB_DMAC_XFER_SHIFT 5
139 #define USB_DMAC_XFER_SIZE (1 << USB_DMAC_XFER_SHIFT)
140 #define USB_DMAC_CHCR_TS USB_DMACHCR_TS_32B
141 #define USB_DMAC_SLAVE_BUSWIDTH DMA_SLAVE_BUSWIDTH_32_BYTES
143 /* for descriptors */
144 #define USB_DMAC_INITIAL_NR_DESC 16
145 #define USB_DMAC_INITIAL_NR_SG 8
147 /* -----------------------------------------------------------------------------
151 static void usb_dmac_write(struct usb_dmac
*dmac
, u32 reg
, u32 data
)
153 writel(data
, dmac
->iomem
+ reg
);
156 static u32
usb_dmac_read(struct usb_dmac
*dmac
, u32 reg
)
158 return readl(dmac
->iomem
+ reg
);
161 static u32
usb_dmac_chan_read(struct usb_dmac_chan
*chan
, u32 reg
)
163 return readl(chan
->iomem
+ reg
);
166 static void usb_dmac_chan_write(struct usb_dmac_chan
*chan
, u32 reg
, u32 data
)
168 writel(data
, chan
->iomem
+ reg
);
171 /* -----------------------------------------------------------------------------
172 * Initialization and configuration
175 static bool usb_dmac_chan_is_busy(struct usb_dmac_chan
*chan
)
177 u32 chcr
= usb_dmac_chan_read(chan
, USB_DMACHCR
);
179 return (chcr
& (USB_DMACHCR_DE
| USB_DMACHCR_TE
)) == USB_DMACHCR_DE
;
182 static u32
usb_dmac_calc_tend(u32 size
)
185 * Please refer to the Figure "Example of Final Transaction Valid
186 * Data Transfer Enable (EDTEN) Setting" in the data sheet.
188 return 0xffffffff << (32 - (size
% USB_DMAC_XFER_SIZE
? :
189 USB_DMAC_XFER_SIZE
));
192 /* This function is already held by vc.lock */
193 static void usb_dmac_chan_start_sg(struct usb_dmac_chan
*chan
,
196 struct usb_dmac_desc
*desc
= chan
->desc
;
197 struct usb_dmac_sg
*sg
= desc
->sg
+ index
;
198 dma_addr_t src_addr
= 0, dst_addr
= 0;
200 WARN_ON_ONCE(usb_dmac_chan_is_busy(chan
));
202 if (desc
->direction
== DMA_DEV_TO_MEM
)
203 dst_addr
= sg
->mem_addr
;
205 src_addr
= sg
->mem_addr
;
207 dev_dbg(chan
->vc
.chan
.device
->dev
,
208 "chan%u: queue sg %p: %u@%pad -> %pad\n",
209 chan
->index
, sg
, sg
->size
, &src_addr
, &dst_addr
);
211 usb_dmac_chan_write(chan
, USB_DMASAR
, src_addr
& 0xffffffff);
212 usb_dmac_chan_write(chan
, USB_DMADAR
, dst_addr
& 0xffffffff);
213 usb_dmac_chan_write(chan
, USB_DMATCR
,
214 DIV_ROUND_UP(sg
->size
, USB_DMAC_XFER_SIZE
));
215 usb_dmac_chan_write(chan
, USB_DMATEND
, usb_dmac_calc_tend(sg
->size
));
217 usb_dmac_chan_write(chan
, USB_DMACHCR
, USB_DMAC_CHCR_TS
|
218 USB_DMACHCR_NULLE
| USB_DMACHCR_IE
| USB_DMACHCR_DE
);
221 /* This function is already held by vc.lock */
222 static void usb_dmac_chan_start_desc(struct usb_dmac_chan
*chan
)
224 struct virt_dma_desc
*vd
;
226 vd
= vchan_next_desc(&chan
->vc
);
233 * Remove this request from vc->desc_issued. Otherwise, this driver
234 * will get the previous value from vchan_next_desc() after a transfer
239 chan
->desc
= to_usb_dmac_desc(vd
);
240 chan
->desc
->sg_index
= 0;
241 usb_dmac_chan_start_sg(chan
, 0);
244 static int usb_dmac_init(struct usb_dmac
*dmac
)
248 /* Clear all channels and enable the DMAC globally. */
249 usb_dmac_write(dmac
, USB_DMAOR
, USB_DMAOR_DME
);
251 dmaor
= usb_dmac_read(dmac
, USB_DMAOR
);
252 if ((dmaor
& (USB_DMAOR_AE
| USB_DMAOR_DME
)) != USB_DMAOR_DME
) {
253 dev_warn(dmac
->dev
, "DMAOR initialization failed.\n");
260 /* -----------------------------------------------------------------------------
261 * Descriptors allocation and free
263 static int usb_dmac_desc_alloc(struct usb_dmac_chan
*chan
, unsigned int sg_len
,
266 struct usb_dmac_desc
*desc
;
269 desc
= kzalloc(struct_size(desc
, sg
, sg_len
), gfp
);
273 desc
->sg_allocated_len
= sg_len
;
274 INIT_LIST_HEAD(&desc
->node
);
276 spin_lock_irqsave(&chan
->vc
.lock
, flags
);
277 list_add_tail(&desc
->node
, &chan
->desc_freed
);
278 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
283 static void usb_dmac_desc_free(struct usb_dmac_chan
*chan
)
285 struct usb_dmac_desc
*desc
, *_desc
;
288 list_splice_init(&chan
->desc_freed
, &list
);
289 list_splice_init(&chan
->desc_got
, &list
);
291 list_for_each_entry_safe(desc
, _desc
, &list
, node
) {
292 list_del(&desc
->node
);
295 chan
->descs_allocated
= 0;
298 static struct usb_dmac_desc
*usb_dmac_desc_get(struct usb_dmac_chan
*chan
,
299 unsigned int sg_len
, gfp_t gfp
)
301 struct usb_dmac_desc
*desc
= NULL
;
304 /* Get a freed descritpor */
305 spin_lock_irqsave(&chan
->vc
.lock
, flags
);
306 list_for_each_entry(desc
, &chan
->desc_freed
, node
) {
307 if (sg_len
<= desc
->sg_allocated_len
) {
308 list_move_tail(&desc
->node
, &chan
->desc_got
);
309 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
313 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
315 /* Allocate a new descriptor */
316 if (!usb_dmac_desc_alloc(chan
, sg_len
, gfp
)) {
317 /* If allocated the desc, it was added to tail of the list */
318 spin_lock_irqsave(&chan
->vc
.lock
, flags
);
319 desc
= list_last_entry(&chan
->desc_freed
, struct usb_dmac_desc
,
321 list_move_tail(&desc
->node
, &chan
->desc_got
);
322 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
329 static void usb_dmac_desc_put(struct usb_dmac_chan
*chan
,
330 struct usb_dmac_desc
*desc
)
334 spin_lock_irqsave(&chan
->vc
.lock
, flags
);
335 list_move_tail(&desc
->node
, &chan
->desc_freed
);
336 spin_unlock_irqrestore(&chan
->vc
.lock
, flags
);
339 /* -----------------------------------------------------------------------------
343 static void usb_dmac_soft_reset(struct usb_dmac_chan
*uchan
)
345 struct dma_chan
*chan
= &uchan
->vc
.chan
;
346 struct usb_dmac
*dmac
= to_usb_dmac(chan
->device
);
349 /* Don't issue soft reset if any one of channels is busy */
350 for (i
= 0; i
< dmac
->n_channels
; ++i
) {
351 if (usb_dmac_chan_is_busy(uchan
))
355 usb_dmac_write(dmac
, USB_DMAOR
, 0);
356 usb_dmac_write(dmac
, USB_DMASWR
, USB_DMASWR_SWR
);
358 usb_dmac_write(dmac
, USB_DMASWR
, 0);
359 usb_dmac_write(dmac
, USB_DMAOR
, 1);
362 static void usb_dmac_chan_halt(struct usb_dmac_chan
*chan
)
364 u32 chcr
= usb_dmac_chan_read(chan
, USB_DMACHCR
);
366 chcr
&= ~(USB_DMACHCR_IE
| USB_DMACHCR_TE
| USB_DMACHCR_DE
);
367 usb_dmac_chan_write(chan
, USB_DMACHCR
, chcr
);
369 usb_dmac_soft_reset(chan
);
372 static void usb_dmac_stop(struct usb_dmac
*dmac
)
374 usb_dmac_write(dmac
, USB_DMAOR
, 0);
377 /* -----------------------------------------------------------------------------
378 * DMA engine operations
381 static int usb_dmac_alloc_chan_resources(struct dma_chan
*chan
)
383 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
386 while (uchan
->descs_allocated
< USB_DMAC_INITIAL_NR_DESC
) {
387 ret
= usb_dmac_desc_alloc(uchan
, USB_DMAC_INITIAL_NR_SG
,
390 usb_dmac_desc_free(uchan
);
393 uchan
->descs_allocated
++;
396 return pm_runtime_get_sync(chan
->device
->dev
);
399 static void usb_dmac_free_chan_resources(struct dma_chan
*chan
)
401 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
404 /* Protect against ISR */
405 spin_lock_irqsave(&uchan
->vc
.lock
, flags
);
406 usb_dmac_chan_halt(uchan
);
407 spin_unlock_irqrestore(&uchan
->vc
.lock
, flags
);
409 usb_dmac_desc_free(uchan
);
410 vchan_free_chan_resources(&uchan
->vc
);
412 pm_runtime_put(chan
->device
->dev
);
415 static struct dma_async_tx_descriptor
*
416 usb_dmac_prep_slave_sg(struct dma_chan
*chan
, struct scatterlist
*sgl
,
417 unsigned int sg_len
, enum dma_transfer_direction dir
,
418 unsigned long dma_flags
, void *context
)
420 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
421 struct usb_dmac_desc
*desc
;
422 struct scatterlist
*sg
;
426 dev_warn(chan
->device
->dev
,
427 "%s: bad parameter: len=%d\n", __func__
, sg_len
);
431 desc
= usb_dmac_desc_get(uchan
, sg_len
, GFP_NOWAIT
);
435 desc
->direction
= dir
;
436 desc
->sg_len
= sg_len
;
437 for_each_sg(sgl
, sg
, sg_len
, i
) {
438 desc
->sg
[i
].mem_addr
= sg_dma_address(sg
);
439 desc
->sg
[i
].size
= sg_dma_len(sg
);
442 return vchan_tx_prep(&uchan
->vc
, &desc
->vd
, dma_flags
);
445 static int usb_dmac_chan_terminate_all(struct dma_chan
*chan
)
447 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
448 struct usb_dmac_desc
*desc
, *_desc
;
453 spin_lock_irqsave(&uchan
->vc
.lock
, flags
);
454 usb_dmac_chan_halt(uchan
);
455 vchan_get_all_descriptors(&uchan
->vc
, &head
);
458 list_splice_init(&uchan
->desc_got
, &list
);
459 list_for_each_entry_safe(desc
, _desc
, &list
, node
)
460 list_move_tail(&desc
->node
, &uchan
->desc_freed
);
461 spin_unlock_irqrestore(&uchan
->vc
.lock
, flags
);
462 vchan_dma_desc_free_list(&uchan
->vc
, &head
);
467 static unsigned int usb_dmac_get_current_residue(struct usb_dmac_chan
*chan
,
468 struct usb_dmac_desc
*desc
,
471 struct usb_dmac_sg
*sg
= desc
->sg
+ sg_index
;
472 u32 mem_addr
= sg
->mem_addr
& 0xffffffff;
473 unsigned int residue
= sg
->size
;
476 * We cannot use USB_DMATCR to calculate residue because USB_DMATCR
477 * has unsuited value to calculate.
479 if (desc
->direction
== DMA_DEV_TO_MEM
)
480 residue
-= usb_dmac_chan_read(chan
, USB_DMADAR
) - mem_addr
;
482 residue
-= usb_dmac_chan_read(chan
, USB_DMASAR
) - mem_addr
;
487 static u32
usb_dmac_chan_get_residue_if_complete(struct usb_dmac_chan
*chan
,
490 struct usb_dmac_desc
*desc
;
493 list_for_each_entry_reverse(desc
, &chan
->desc_freed
, node
) {
494 if (desc
->done_cookie
== cookie
) {
495 residue
= desc
->residue
;
503 static u32
usb_dmac_chan_get_residue(struct usb_dmac_chan
*chan
,
507 struct virt_dma_desc
*vd
;
508 struct usb_dmac_desc
*desc
= chan
->desc
;
512 vd
= vchan_find_desc(&chan
->vc
, cookie
);
515 desc
= to_usb_dmac_desc(vd
);
518 /* Compute the size of all usb_dmac_sg still to be transferred */
519 for (i
= desc
->sg_index
+ 1; i
< desc
->sg_len
; i
++)
520 residue
+= desc
->sg
[i
].size
;
522 /* Add the residue for the current sg */
523 residue
+= usb_dmac_get_current_residue(chan
, desc
, desc
->sg_index
);
528 static enum dma_status
usb_dmac_tx_status(struct dma_chan
*chan
,
530 struct dma_tx_state
*txstate
)
532 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
533 enum dma_status status
;
534 unsigned int residue
= 0;
537 status
= dma_cookie_status(chan
, cookie
, txstate
);
538 /* a client driver will get residue after DMA_COMPLETE */
542 spin_lock_irqsave(&uchan
->vc
.lock
, flags
);
543 if (status
== DMA_COMPLETE
)
544 residue
= usb_dmac_chan_get_residue_if_complete(uchan
, cookie
);
546 residue
= usb_dmac_chan_get_residue(uchan
, cookie
);
547 spin_unlock_irqrestore(&uchan
->vc
.lock
, flags
);
549 dma_set_residue(txstate
, residue
);
554 static void usb_dmac_issue_pending(struct dma_chan
*chan
)
556 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
559 spin_lock_irqsave(&uchan
->vc
.lock
, flags
);
560 if (vchan_issue_pending(&uchan
->vc
) && !uchan
->desc
)
561 usb_dmac_chan_start_desc(uchan
);
562 spin_unlock_irqrestore(&uchan
->vc
.lock
, flags
);
565 static void usb_dmac_virt_desc_free(struct virt_dma_desc
*vd
)
567 struct usb_dmac_desc
*desc
= to_usb_dmac_desc(vd
);
568 struct usb_dmac_chan
*chan
= to_usb_dmac_chan(vd
->tx
.chan
);
570 usb_dmac_desc_put(chan
, desc
);
573 /* -----------------------------------------------------------------------------
577 static void usb_dmac_isr_transfer_end(struct usb_dmac_chan
*chan
)
579 struct usb_dmac_desc
*desc
= chan
->desc
;
583 if (++desc
->sg_index
< desc
->sg_len
) {
584 usb_dmac_chan_start_sg(chan
, desc
->sg_index
);
586 desc
->residue
= usb_dmac_get_current_residue(chan
, desc
,
588 desc
->done_cookie
= desc
->vd
.tx
.cookie
;
589 desc
->vd
.tx_result
.result
= DMA_TRANS_NOERROR
;
590 desc
->vd
.tx_result
.residue
= desc
->residue
;
591 vchan_cookie_complete(&desc
->vd
);
593 /* Restart the next transfer if this driver has a next desc */
594 usb_dmac_chan_start_desc(chan
);
598 static irqreturn_t
usb_dmac_isr_channel(int irq
, void *dev
)
600 struct usb_dmac_chan
*chan
= dev
;
601 irqreturn_t ret
= IRQ_NONE
;
604 bool xfer_end
= false;
606 spin_lock(&chan
->vc
.lock
);
608 chcr
= usb_dmac_chan_read(chan
, USB_DMACHCR
);
609 if (chcr
& (USB_DMACHCR_TE
| USB_DMACHCR_SP
)) {
610 mask
|= USB_DMACHCR_DE
| USB_DMACHCR_TE
| USB_DMACHCR_SP
;
611 if (chcr
& USB_DMACHCR_DE
)
615 if (chcr
& USB_DMACHCR_NULL
) {
616 /* An interruption of TE will happen after we set FTE */
617 mask
|= USB_DMACHCR_NULL
;
618 chcr
|= USB_DMACHCR_FTE
;
622 usb_dmac_chan_write(chan
, USB_DMACHCR
, chcr
& ~mask
);
625 usb_dmac_isr_transfer_end(chan
);
627 spin_unlock(&chan
->vc
.lock
);
632 /* -----------------------------------------------------------------------------
633 * OF xlate and channel filter
636 static bool usb_dmac_chan_filter(struct dma_chan
*chan
, void *arg
)
638 struct usb_dmac_chan
*uchan
= to_usb_dmac_chan(chan
);
639 struct of_phandle_args
*dma_spec
= arg
;
641 /* USB-DMAC should be used with fixed usb controller's FIFO */
642 if (uchan
->index
!= dma_spec
->args
[0])
648 static struct dma_chan
*usb_dmac_of_xlate(struct of_phandle_args
*dma_spec
,
649 struct of_dma
*ofdma
)
651 struct dma_chan
*chan
;
654 if (dma_spec
->args_count
!= 1)
657 /* Only slave DMA channels can be allocated via DT */
659 dma_cap_set(DMA_SLAVE
, mask
);
661 chan
= __dma_request_channel(&mask
, usb_dmac_chan_filter
, dma_spec
,
669 /* -----------------------------------------------------------------------------
674 static int usb_dmac_runtime_suspend(struct device
*dev
)
676 struct usb_dmac
*dmac
= dev_get_drvdata(dev
);
679 for (i
= 0; i
< dmac
->n_channels
; ++i
) {
680 if (!dmac
->channels
[i
].iomem
)
682 usb_dmac_chan_halt(&dmac
->channels
[i
]);
688 static int usb_dmac_runtime_resume(struct device
*dev
)
690 struct usb_dmac
*dmac
= dev_get_drvdata(dev
);
692 return usb_dmac_init(dmac
);
694 #endif /* CONFIG_PM */
696 static const struct dev_pm_ops usb_dmac_pm
= {
697 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend
,
698 pm_runtime_force_resume
)
699 SET_RUNTIME_PM_OPS(usb_dmac_runtime_suspend
, usb_dmac_runtime_resume
,
703 /* -----------------------------------------------------------------------------
707 static int usb_dmac_chan_probe(struct usb_dmac
*dmac
,
708 struct usb_dmac_chan
*uchan
,
711 struct platform_device
*pdev
= to_platform_device(dmac
->dev
);
712 char pdev_irqname
[5];
716 uchan
->index
= index
;
717 uchan
->iomem
= dmac
->iomem
+ USB_DMAC_CHAN_OFFSET(index
);
719 /* Request the channel interrupt. */
720 sprintf(pdev_irqname
, "ch%u", index
);
721 uchan
->irq
= platform_get_irq_byname(pdev
, pdev_irqname
);
725 irqname
= devm_kasprintf(dmac
->dev
, GFP_KERNEL
, "%s:%u",
726 dev_name(dmac
->dev
), index
);
730 ret
= devm_request_irq(dmac
->dev
, uchan
->irq
, usb_dmac_isr_channel
,
731 IRQF_SHARED
, irqname
, uchan
);
733 dev_err(dmac
->dev
, "failed to request IRQ %u (%d)\n",
738 uchan
->vc
.desc_free
= usb_dmac_virt_desc_free
;
739 vchan_init(&uchan
->vc
, &dmac
->engine
);
740 INIT_LIST_HEAD(&uchan
->desc_freed
);
741 INIT_LIST_HEAD(&uchan
->desc_got
);
746 static int usb_dmac_parse_of(struct device
*dev
, struct usb_dmac
*dmac
)
748 struct device_node
*np
= dev
->of_node
;
751 ret
= of_property_read_u32(np
, "dma-channels", &dmac
->n_channels
);
753 dev_err(dev
, "unable to read dma-channels property\n");
757 if (dmac
->n_channels
<= 0 || dmac
->n_channels
>= 100) {
758 dev_err(dev
, "invalid number of channels %u\n",
766 static int usb_dmac_probe(struct platform_device
*pdev
)
768 const enum dma_slave_buswidth widths
= USB_DMAC_SLAVE_BUSWIDTH
;
769 struct dma_device
*engine
;
770 struct usb_dmac
*dmac
;
771 struct resource
*mem
;
775 dmac
= devm_kzalloc(&pdev
->dev
, sizeof(*dmac
), GFP_KERNEL
);
779 dmac
->dev
= &pdev
->dev
;
780 platform_set_drvdata(pdev
, dmac
);
782 ret
= usb_dmac_parse_of(&pdev
->dev
, dmac
);
786 dmac
->channels
= devm_kcalloc(&pdev
->dev
, dmac
->n_channels
,
787 sizeof(*dmac
->channels
), GFP_KERNEL
);
791 /* Request resources. */
792 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
793 dmac
->iomem
= devm_ioremap_resource(&pdev
->dev
, mem
);
794 if (IS_ERR(dmac
->iomem
))
795 return PTR_ERR(dmac
->iomem
);
797 /* Enable runtime PM and initialize the device. */
798 pm_runtime_enable(&pdev
->dev
);
799 ret
= pm_runtime_get_sync(&pdev
->dev
);
801 dev_err(&pdev
->dev
, "runtime PM get sync failed (%d)\n", ret
);
805 ret
= usb_dmac_init(dmac
);
808 dev_err(&pdev
->dev
, "failed to reset device\n");
812 /* Initialize the channels. */
813 INIT_LIST_HEAD(&dmac
->engine
.channels
);
815 for (i
= 0; i
< dmac
->n_channels
; ++i
) {
816 ret
= usb_dmac_chan_probe(dmac
, &dmac
->channels
[i
], i
);
821 /* Register the DMAC as a DMA provider for DT. */
822 ret
= of_dma_controller_register(pdev
->dev
.of_node
, usb_dmac_of_xlate
,
828 * Register the DMA engine device.
830 * Default transfer size of 32 bytes requires 32-byte alignment.
832 engine
= &dmac
->engine
;
833 dma_cap_set(DMA_SLAVE
, engine
->cap_mask
);
835 engine
->dev
= &pdev
->dev
;
837 engine
->src_addr_widths
= widths
;
838 engine
->dst_addr_widths
= widths
;
839 engine
->directions
= BIT(DMA_MEM_TO_DEV
) | BIT(DMA_DEV_TO_MEM
);
840 engine
->residue_granularity
= DMA_RESIDUE_GRANULARITY_BURST
;
842 engine
->device_alloc_chan_resources
= usb_dmac_alloc_chan_resources
;
843 engine
->device_free_chan_resources
= usb_dmac_free_chan_resources
;
844 engine
->device_prep_slave_sg
= usb_dmac_prep_slave_sg
;
845 engine
->device_terminate_all
= usb_dmac_chan_terminate_all
;
846 engine
->device_tx_status
= usb_dmac_tx_status
;
847 engine
->device_issue_pending
= usb_dmac_issue_pending
;
849 ret
= dma_async_device_register(engine
);
853 pm_runtime_put(&pdev
->dev
);
857 of_dma_controller_free(pdev
->dev
.of_node
);
858 pm_runtime_put(&pdev
->dev
);
860 pm_runtime_disable(&pdev
->dev
);
864 static void usb_dmac_chan_remove(struct usb_dmac
*dmac
,
865 struct usb_dmac_chan
*uchan
)
867 usb_dmac_chan_halt(uchan
);
868 devm_free_irq(dmac
->dev
, uchan
->irq
, uchan
);
871 static int usb_dmac_remove(struct platform_device
*pdev
)
873 struct usb_dmac
*dmac
= platform_get_drvdata(pdev
);
876 for (i
= 0; i
< dmac
->n_channels
; ++i
)
877 usb_dmac_chan_remove(dmac
, &dmac
->channels
[i
]);
878 of_dma_controller_free(pdev
->dev
.of_node
);
879 dma_async_device_unregister(&dmac
->engine
);
881 pm_runtime_disable(&pdev
->dev
);
886 static void usb_dmac_shutdown(struct platform_device
*pdev
)
888 struct usb_dmac
*dmac
= platform_get_drvdata(pdev
);
893 static const struct of_device_id usb_dmac_of_ids
[] = {
894 { .compatible
= "renesas,usb-dmac", },
897 MODULE_DEVICE_TABLE(of
, usb_dmac_of_ids
);
899 static struct platform_driver usb_dmac_driver
= {
903 .of_match_table
= usb_dmac_of_ids
,
905 .probe
= usb_dmac_probe
,
906 .remove
= usb_dmac_remove
,
907 .shutdown
= usb_dmac_shutdown
,
910 module_platform_driver(usb_dmac_driver
);
912 MODULE_DESCRIPTION("Renesas USB DMA Controller Driver");
913 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");
914 MODULE_LICENSE("GPL v2");