Merge tag 'regmap-fix-v5.11-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux/fpc-iii.git] / drivers / dma / ti / k3-psil-j7200.c
blob5ea63ea74822347f15d1b66cf6350f23f1b9146e
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
4 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
5 */
7 #include <linux/kernel.h>
9 #include "k3-psil-priv.h"
11 #define PSIL_PDMA_XY_TR(x) \
12 { \
13 .thread_id = x, \
14 .ep_config = { \
15 .ep_type = PSIL_EP_PDMA_XY, \
16 }, \
19 #define PSIL_PDMA_XY_PKT(x) \
20 { \
21 .thread_id = x, \
22 .ep_config = { \
23 .ep_type = PSIL_EP_PDMA_XY, \
24 .pkt_mode = 1, \
25 }, \
28 #define PSIL_PDMA_MCASP(x) \
29 { \
30 .thread_id = x, \
31 .ep_config = { \
32 .ep_type = PSIL_EP_PDMA_XY, \
33 .pdma_acc32 = 1, \
34 .pdma_burst = 1, \
35 }, \
38 #define PSIL_ETHERNET(x) \
39 { \
40 .thread_id = x, \
41 .ep_config = { \
42 .ep_type = PSIL_EP_NATIVE, \
43 .pkt_mode = 1, \
44 .needs_epib = 1, \
45 .psd_size = 16, \
46 }, \
49 #define PSIL_SA2UL(x, tx) \
50 { \
51 .thread_id = x, \
52 .ep_config = { \
53 .ep_type = PSIL_EP_NATIVE, \
54 .pkt_mode = 1, \
55 .needs_epib = 1, \
56 .psd_size = 64, \
57 .notdpkt = tx, \
58 }, \
61 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
62 static struct psil_ep j7200_src_ep_map[] = {
63 /* PDMA_MCASP - McASP0-2 */
64 PSIL_PDMA_MCASP(0x4400),
65 PSIL_PDMA_MCASP(0x4401),
66 PSIL_PDMA_MCASP(0x4402),
67 /* PDMA_SPI_G0 - SPI0-3 */
68 PSIL_PDMA_XY_PKT(0x4600),
69 PSIL_PDMA_XY_PKT(0x4601),
70 PSIL_PDMA_XY_PKT(0x4602),
71 PSIL_PDMA_XY_PKT(0x4603),
72 PSIL_PDMA_XY_PKT(0x4604),
73 PSIL_PDMA_XY_PKT(0x4605),
74 PSIL_PDMA_XY_PKT(0x4606),
75 PSIL_PDMA_XY_PKT(0x4607),
76 PSIL_PDMA_XY_PKT(0x4608),
77 PSIL_PDMA_XY_PKT(0x4609),
78 PSIL_PDMA_XY_PKT(0x460a),
79 PSIL_PDMA_XY_PKT(0x460b),
80 PSIL_PDMA_XY_PKT(0x460c),
81 PSIL_PDMA_XY_PKT(0x460d),
82 PSIL_PDMA_XY_PKT(0x460e),
83 PSIL_PDMA_XY_PKT(0x460f),
84 /* PDMA_SPI_G1 - SPI4-7 */
85 PSIL_PDMA_XY_PKT(0x4610),
86 PSIL_PDMA_XY_PKT(0x4611),
87 PSIL_PDMA_XY_PKT(0x4612),
88 PSIL_PDMA_XY_PKT(0x4613),
89 PSIL_PDMA_XY_PKT(0x4614),
90 PSIL_PDMA_XY_PKT(0x4615),
91 PSIL_PDMA_XY_PKT(0x4616),
92 PSIL_PDMA_XY_PKT(0x4617),
93 PSIL_PDMA_XY_PKT(0x4618),
94 PSIL_PDMA_XY_PKT(0x4619),
95 PSIL_PDMA_XY_PKT(0x461a),
96 PSIL_PDMA_XY_PKT(0x461b),
97 PSIL_PDMA_XY_PKT(0x461c),
98 PSIL_PDMA_XY_PKT(0x461d),
99 PSIL_PDMA_XY_PKT(0x461e),
100 PSIL_PDMA_XY_PKT(0x461f),
101 /* PDMA_USART_G0 - UART0-1 */
102 PSIL_PDMA_XY_PKT(0x4700),
103 PSIL_PDMA_XY_PKT(0x4701),
104 /* PDMA_USART_G1 - UART2-3 */
105 PSIL_PDMA_XY_PKT(0x4702),
106 PSIL_PDMA_XY_PKT(0x4703),
107 /* PDMA_USART_G2 - UART4-9 */
108 PSIL_PDMA_XY_PKT(0x4704),
109 PSIL_PDMA_XY_PKT(0x4705),
110 PSIL_PDMA_XY_PKT(0x4706),
111 PSIL_PDMA_XY_PKT(0x4707),
112 PSIL_PDMA_XY_PKT(0x4708),
113 PSIL_PDMA_XY_PKT(0x4709),
114 /* CPSW5 */
115 PSIL_ETHERNET(0x4a00),
116 /* CPSW0 */
117 PSIL_ETHERNET(0x7000),
118 /* MCU_PDMA_MISC_G0 - SPI0 */
119 PSIL_PDMA_XY_PKT(0x7100),
120 PSIL_PDMA_XY_PKT(0x7101),
121 PSIL_PDMA_XY_PKT(0x7102),
122 PSIL_PDMA_XY_PKT(0x7103),
123 /* MCU_PDMA_MISC_G1 - SPI1-2 */
124 PSIL_PDMA_XY_PKT(0x7200),
125 PSIL_PDMA_XY_PKT(0x7201),
126 PSIL_PDMA_XY_PKT(0x7202),
127 PSIL_PDMA_XY_PKT(0x7203),
128 PSIL_PDMA_XY_PKT(0x7204),
129 PSIL_PDMA_XY_PKT(0x7205),
130 PSIL_PDMA_XY_PKT(0x7206),
131 PSIL_PDMA_XY_PKT(0x7207),
132 /* MCU_PDMA_MISC_G2 - UART0 */
133 PSIL_PDMA_XY_PKT(0x7300),
134 /* MCU_PDMA_ADC - ADC0-1 */
135 PSIL_PDMA_XY_TR(0x7400),
136 PSIL_PDMA_XY_TR(0x7401),
137 /* SA2UL */
138 PSIL_SA2UL(0x7500, 0),
139 PSIL_SA2UL(0x7501, 0),
140 PSIL_SA2UL(0x7502, 0),
141 PSIL_SA2UL(0x7503, 0),
144 /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
145 static struct psil_ep j7200_dst_ep_map[] = {
146 /* CPSW5 */
147 PSIL_ETHERNET(0xca00),
148 PSIL_ETHERNET(0xca01),
149 PSIL_ETHERNET(0xca02),
150 PSIL_ETHERNET(0xca03),
151 PSIL_ETHERNET(0xca04),
152 PSIL_ETHERNET(0xca05),
153 PSIL_ETHERNET(0xca06),
154 PSIL_ETHERNET(0xca07),
155 /* CPSW0 */
156 PSIL_ETHERNET(0xf000),
157 PSIL_ETHERNET(0xf001),
158 PSIL_ETHERNET(0xf002),
159 PSIL_ETHERNET(0xf003),
160 PSIL_ETHERNET(0xf004),
161 PSIL_ETHERNET(0xf005),
162 PSIL_ETHERNET(0xf006),
163 PSIL_ETHERNET(0xf007),
164 /* SA2UL */
165 PSIL_SA2UL(0xf500, 1),
166 PSIL_SA2UL(0xf501, 1),
169 struct psil_ep_map j7200_ep_map = {
170 .name = "j7200",
171 .src = j7200_src_ep_map,
172 .src_count = ARRAY_SIZE(j7200_src_ep_map),
173 .dst = j7200_dst_ep_map,
174 .dst_count = ARRAY_SIZE(j7200_dst_ep_map),