Merge tag 'regmap-fix-v5.11-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux/fpc-iii.git] / drivers / iio / adc / ad7766.c
blobb6b6765be7b49b25e9bea6603f73dbc62866fd9b
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * AD7766/AD7767 SPI ADC driver
5 * Copyright 2016 Analog Devices Inc.
6 */
8 #include <linux/clk.h>
9 #include <linux/delay.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/gpio/consumer.h>
13 #include <linux/module.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/slab.h>
16 #include <linux/spi/spi.h>
18 #include <linux/iio/iio.h>
19 #include <linux/iio/buffer.h>
20 #include <linux/iio/trigger.h>
21 #include <linux/iio/trigger_consumer.h>
22 #include <linux/iio/triggered_buffer.h>
24 struct ad7766_chip_info {
25 unsigned int decimation_factor;
28 enum {
29 AD7766_SUPPLY_AVDD = 0,
30 AD7766_SUPPLY_DVDD = 1,
31 AD7766_SUPPLY_VREF = 2,
32 AD7766_NUM_SUPPLIES = 3
35 struct ad7766 {
36 const struct ad7766_chip_info *chip_info;
37 struct spi_device *spi;
38 struct clk *mclk;
39 struct gpio_desc *pd_gpio;
40 struct regulator_bulk_data reg[AD7766_NUM_SUPPLIES];
42 struct iio_trigger *trig;
44 struct spi_transfer xfer;
45 struct spi_message msg;
48 * DMA (thus cache coherency maintenance) requires the
49 * transfer buffers to live in their own cache lines.
50 * Make the buffer large enough for one 24 bit sample and one 64 bit
51 * aligned 64 bit timestamp.
53 unsigned char data[ALIGN(3, sizeof(s64)) + sizeof(s64)]
54 ____cacheline_aligned;
58 * AD7766 and AD7767 variations are interface compatible, the main difference is
59 * analog performance. Both parts will use the same ID.
61 enum ad7766_device_ids {
62 ID_AD7766,
63 ID_AD7766_1,
64 ID_AD7766_2,
67 static irqreturn_t ad7766_trigger_handler(int irq, void *p)
69 struct iio_poll_func *pf = p;
70 struct iio_dev *indio_dev = pf->indio_dev;
71 struct ad7766 *ad7766 = iio_priv(indio_dev);
72 int ret;
74 ret = spi_sync(ad7766->spi, &ad7766->msg);
75 if (ret < 0)
76 goto done;
78 iio_push_to_buffers_with_timestamp(indio_dev, ad7766->data,
79 pf->timestamp);
80 done:
81 iio_trigger_notify_done(indio_dev->trig);
83 return IRQ_HANDLED;
86 static int ad7766_preenable(struct iio_dev *indio_dev)
88 struct ad7766 *ad7766 = iio_priv(indio_dev);
89 int ret;
91 ret = regulator_bulk_enable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
92 if (ret < 0) {
93 dev_err(&ad7766->spi->dev, "Failed to enable supplies: %d\n",
94 ret);
95 return ret;
98 ret = clk_prepare_enable(ad7766->mclk);
99 if (ret < 0) {
100 dev_err(&ad7766->spi->dev, "Failed to enable MCLK: %d\n", ret);
101 regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
102 return ret;
105 gpiod_set_value(ad7766->pd_gpio, 0);
107 return 0;
110 static int ad7766_postdisable(struct iio_dev *indio_dev)
112 struct ad7766 *ad7766 = iio_priv(indio_dev);
114 gpiod_set_value(ad7766->pd_gpio, 1);
117 * The PD pin is synchronous to the clock, so give it some time to
118 * notice the change before we disable the clock.
120 msleep(20);
122 clk_disable_unprepare(ad7766->mclk);
123 regulator_bulk_disable(ARRAY_SIZE(ad7766->reg), ad7766->reg);
125 return 0;
128 static int ad7766_read_raw(struct iio_dev *indio_dev,
129 const struct iio_chan_spec *chan, int *val, int *val2, long info)
131 struct ad7766 *ad7766 = iio_priv(indio_dev);
132 struct regulator *vref = ad7766->reg[AD7766_SUPPLY_VREF].consumer;
133 int scale_uv;
135 switch (info) {
136 case IIO_CHAN_INFO_SCALE:
137 scale_uv = regulator_get_voltage(vref);
138 if (scale_uv < 0)
139 return scale_uv;
140 *val = scale_uv / 1000;
141 *val2 = chan->scan_type.realbits;
142 return IIO_VAL_FRACTIONAL_LOG2;
143 case IIO_CHAN_INFO_SAMP_FREQ:
144 *val = clk_get_rate(ad7766->mclk) /
145 ad7766->chip_info->decimation_factor;
146 return IIO_VAL_INT;
148 return -EINVAL;
151 static const struct iio_chan_spec ad7766_channels[] = {
153 .type = IIO_VOLTAGE,
154 .indexed = 1,
155 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
156 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
157 .scan_type = {
158 .sign = 's',
159 .realbits = 24,
160 .storagebits = 32,
161 .endianness = IIO_BE,
164 IIO_CHAN_SOFT_TIMESTAMP(1),
167 static const struct ad7766_chip_info ad7766_chip_info[] = {
168 [ID_AD7766] = {
169 .decimation_factor = 8,
171 [ID_AD7766_1] = {
172 .decimation_factor = 16,
174 [ID_AD7766_2] = {
175 .decimation_factor = 32,
179 static const struct iio_buffer_setup_ops ad7766_buffer_setup_ops = {
180 .preenable = &ad7766_preenable,
181 .postdisable = &ad7766_postdisable,
184 static const struct iio_info ad7766_info = {
185 .read_raw = &ad7766_read_raw,
188 static irqreturn_t ad7766_irq(int irq, void *private)
190 iio_trigger_poll(private);
191 return IRQ_HANDLED;
194 static int ad7766_set_trigger_state(struct iio_trigger *trig, bool enable)
196 struct ad7766 *ad7766 = iio_trigger_get_drvdata(trig);
198 if (enable)
199 enable_irq(ad7766->spi->irq);
200 else
201 disable_irq(ad7766->spi->irq);
203 return 0;
206 static const struct iio_trigger_ops ad7766_trigger_ops = {
207 .set_trigger_state = ad7766_set_trigger_state,
208 .validate_device = iio_trigger_validate_own_device,
211 static int ad7766_probe(struct spi_device *spi)
213 const struct spi_device_id *id = spi_get_device_id(spi);
214 struct iio_dev *indio_dev;
215 struct ad7766 *ad7766;
216 int ret;
218 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*ad7766));
219 if (!indio_dev)
220 return -ENOMEM;
222 ad7766 = iio_priv(indio_dev);
223 ad7766->chip_info = &ad7766_chip_info[id->driver_data];
225 ad7766->mclk = devm_clk_get(&spi->dev, "mclk");
226 if (IS_ERR(ad7766->mclk))
227 return PTR_ERR(ad7766->mclk);
229 ad7766->reg[AD7766_SUPPLY_AVDD].supply = "avdd";
230 ad7766->reg[AD7766_SUPPLY_DVDD].supply = "dvdd";
231 ad7766->reg[AD7766_SUPPLY_VREF].supply = "vref";
233 ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(ad7766->reg),
234 ad7766->reg);
235 if (ret)
236 return ret;
238 ad7766->pd_gpio = devm_gpiod_get_optional(&spi->dev, "powerdown",
239 GPIOD_OUT_HIGH);
240 if (IS_ERR(ad7766->pd_gpio))
241 return PTR_ERR(ad7766->pd_gpio);
243 indio_dev->name = spi_get_device_id(spi)->name;
244 indio_dev->modes = INDIO_DIRECT_MODE;
245 indio_dev->channels = ad7766_channels;
246 indio_dev->num_channels = ARRAY_SIZE(ad7766_channels);
247 indio_dev->info = &ad7766_info;
249 if (spi->irq > 0) {
250 ad7766->trig = devm_iio_trigger_alloc(&spi->dev, "%s-dev%d",
251 indio_dev->name, indio_dev->id);
252 if (!ad7766->trig)
253 return -ENOMEM;
255 ad7766->trig->ops = &ad7766_trigger_ops;
256 ad7766->trig->dev.parent = &spi->dev;
257 iio_trigger_set_drvdata(ad7766->trig, ad7766);
259 ret = devm_request_irq(&spi->dev, spi->irq, ad7766_irq,
260 IRQF_TRIGGER_FALLING, dev_name(&spi->dev),
261 ad7766->trig);
262 if (ret < 0)
263 return ret;
266 * The device generates interrupts as long as it is powered up.
267 * Some platforms might not allow the option to power it down so
268 * disable the interrupt to avoid extra load on the system
270 disable_irq(spi->irq);
272 ret = devm_iio_trigger_register(&spi->dev, ad7766->trig);
273 if (ret)
274 return ret;
277 spi_set_drvdata(spi, indio_dev);
279 ad7766->spi = spi;
281 /* First byte always 0 */
282 ad7766->xfer.rx_buf = &ad7766->data[1];
283 ad7766->xfer.len = 3;
285 spi_message_init(&ad7766->msg);
286 spi_message_add_tail(&ad7766->xfer, &ad7766->msg);
288 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev,
289 &iio_pollfunc_store_time, &ad7766_trigger_handler,
290 &ad7766_buffer_setup_ops);
291 if (ret)
292 return ret;
294 ret = devm_iio_device_register(&spi->dev, indio_dev);
295 if (ret)
296 return ret;
297 return 0;
300 static const struct spi_device_id ad7766_id[] = {
301 {"ad7766", ID_AD7766},
302 {"ad7766-1", ID_AD7766_1},
303 {"ad7766-2", ID_AD7766_2},
304 {"ad7767", ID_AD7766},
305 {"ad7767-1", ID_AD7766_1},
306 {"ad7767-2", ID_AD7766_2},
309 MODULE_DEVICE_TABLE(spi, ad7766_id);
311 static struct spi_driver ad7766_driver = {
312 .driver = {
313 .name = "ad7766",
315 .probe = ad7766_probe,
316 .id_table = ad7766_id,
318 module_spi_driver(ad7766_driver);
320 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
321 MODULE_DESCRIPTION("Analog Devices AD7766 and AD7767 ADCs driver support");
322 MODULE_LICENSE("GPL v2");