1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
9 #include <linux/iio/events.h>
10 #include <linux/iio/iio.h>
11 #include <linux/kernel.h>
13 #include "xilinx-xadc.h"
15 static const struct iio_chan_spec
*xadc_event_to_channel(
16 struct iio_dev
*indio_dev
, unsigned int event
)
19 case XADC_THRESHOLD_OT_MAX
:
20 case XADC_THRESHOLD_TEMP_MAX
:
21 return &indio_dev
->channels
[0];
22 case XADC_THRESHOLD_VCCINT_MAX
:
23 case XADC_THRESHOLD_VCCAUX_MAX
:
24 return &indio_dev
->channels
[event
];
26 return &indio_dev
->channels
[event
-1];
30 static void xadc_handle_event(struct iio_dev
*indio_dev
, unsigned int event
)
32 const struct iio_chan_spec
*chan
;
34 /* Temperature threshold error, we don't handle this yet */
38 chan
= xadc_event_to_channel(indio_dev
, event
);
40 if (chan
->type
== IIO_TEMP
) {
42 * The temperature channel only supports over-temperature
45 iio_push_event(indio_dev
,
46 IIO_UNMOD_EVENT_CODE(chan
->type
, chan
->channel
,
47 IIO_EV_TYPE_THRESH
, IIO_EV_DIR_RISING
),
48 iio_get_time_ns(indio_dev
));
51 * For other channels we don't know whether it is a upper or
52 * lower threshold event. Userspace will have to check the
53 * channel value if it wants to know.
55 iio_push_event(indio_dev
,
56 IIO_UNMOD_EVENT_CODE(chan
->type
, chan
->channel
,
57 IIO_EV_TYPE_THRESH
, IIO_EV_DIR_EITHER
),
58 iio_get_time_ns(indio_dev
));
62 void xadc_handle_events(struct iio_dev
*indio_dev
, unsigned long events
)
66 for_each_set_bit(i
, &events
, 8)
67 xadc_handle_event(indio_dev
, i
);
70 static unsigned int xadc_get_threshold_offset(const struct iio_chan_spec
*chan
,
71 enum iio_event_direction dir
)
75 if (chan
->type
== IIO_TEMP
) {
76 offset
= XADC_THRESHOLD_OT_MAX
;
78 if (chan
->channel
< 2)
79 offset
= chan
->channel
+ 1;
81 offset
= chan
->channel
+ 6;
84 if (dir
== IIO_EV_DIR_FALLING
)
90 static unsigned int xadc_get_alarm_mask(const struct iio_chan_spec
*chan
)
92 if (chan
->type
== IIO_TEMP
)
93 return XADC_ALARM_OT_MASK
;
94 switch (chan
->channel
) {
96 return XADC_ALARM_VCCINT_MASK
;
98 return XADC_ALARM_VCCAUX_MASK
;
100 return XADC_ALARM_VCCBRAM_MASK
;
102 return XADC_ALARM_VCCPINT_MASK
;
104 return XADC_ALARM_VCCPAUX_MASK
;
106 return XADC_ALARM_VCCODDR_MASK
;
108 /* We will never get here */
113 int xadc_read_event_config(struct iio_dev
*indio_dev
,
114 const struct iio_chan_spec
*chan
, enum iio_event_type type
,
115 enum iio_event_direction dir
)
117 struct xadc
*xadc
= iio_priv(indio_dev
);
119 return (bool)(xadc
->alarm_mask
& xadc_get_alarm_mask(chan
));
122 int xadc_write_event_config(struct iio_dev
*indio_dev
,
123 const struct iio_chan_spec
*chan
, enum iio_event_type type
,
124 enum iio_event_direction dir
, int state
)
126 unsigned int alarm
= xadc_get_alarm_mask(chan
);
127 struct xadc
*xadc
= iio_priv(indio_dev
);
128 uint16_t cfg
, old_cfg
;
131 mutex_lock(&xadc
->mutex
);
134 xadc
->alarm_mask
|= alarm
;
136 xadc
->alarm_mask
&= ~alarm
;
138 xadc
->ops
->update_alarm(xadc
, xadc
->alarm_mask
);
140 ret
= _xadc_read_adc_reg(xadc
, XADC_REG_CONF1
, &cfg
);
145 cfg
|= XADC_CONF1_ALARM_MASK
;
146 cfg
&= ~((xadc
->alarm_mask
& 0xf0) << 4); /* bram, pint, paux, ddr */
147 cfg
&= ~((xadc
->alarm_mask
& 0x08) >> 3); /* ot */
148 cfg
&= ~((xadc
->alarm_mask
& 0x07) << 1); /* temp, vccint, vccaux */
150 ret
= _xadc_write_adc_reg(xadc
, XADC_REG_CONF1
, cfg
);
153 mutex_unlock(&xadc
->mutex
);
158 /* Register value is msb aligned, the lower 4 bits are ignored */
159 #define XADC_THRESHOLD_VALUE_SHIFT 4
161 int xadc_read_event_value(struct iio_dev
*indio_dev
,
162 const struct iio_chan_spec
*chan
, enum iio_event_type type
,
163 enum iio_event_direction dir
, enum iio_event_info info
,
166 unsigned int offset
= xadc_get_threshold_offset(chan
, dir
);
167 struct xadc
*xadc
= iio_priv(indio_dev
);
170 case IIO_EV_INFO_VALUE
:
171 *val
= xadc
->threshold
[offset
];
173 case IIO_EV_INFO_HYSTERESIS
:
174 *val
= xadc
->temp_hysteresis
;
180 *val
>>= XADC_THRESHOLD_VALUE_SHIFT
;
185 int xadc_write_event_value(struct iio_dev
*indio_dev
,
186 const struct iio_chan_spec
*chan
, enum iio_event_type type
,
187 enum iio_event_direction dir
, enum iio_event_info info
,
190 unsigned int offset
= xadc_get_threshold_offset(chan
, dir
);
191 struct xadc
*xadc
= iio_priv(indio_dev
);
194 val
<<= XADC_THRESHOLD_VALUE_SHIFT
;
196 if (val
< 0 || val
> 0xffff)
199 mutex_lock(&xadc
->mutex
);
202 case IIO_EV_INFO_VALUE
:
203 xadc
->threshold
[offset
] = val
;
205 case IIO_EV_INFO_HYSTERESIS
:
206 xadc
->temp_hysteresis
= val
;
209 mutex_unlock(&xadc
->mutex
);
213 if (chan
->type
== IIO_TEMP
) {
215 * According to the datasheet we need to set the lower 4 bits to
216 * 0x3, otherwise 125 degree celsius will be used as the
222 * Since we store the hysteresis as relative (to the threshold)
223 * value, but the hardware expects an absolute value we need to
224 * recalcualte this value whenever the hysteresis or the
227 if (xadc
->threshold
[offset
] < xadc
->temp_hysteresis
)
228 xadc
->threshold
[offset
+ 4] = 0;
230 xadc
->threshold
[offset
+ 4] = xadc
->threshold
[offset
] -
231 xadc
->temp_hysteresis
;
232 ret
= _xadc_write_adc_reg(xadc
, XADC_REG_THRESHOLD(offset
+ 4),
233 xadc
->threshold
[offset
+ 4]);
238 if (info
== IIO_EV_INFO_VALUE
)
239 ret
= _xadc_write_adc_reg(xadc
, XADC_REG_THRESHOLD(offset
), val
);
242 mutex_unlock(&xadc
->mutex
);