drivers/iio/dac/ad5421.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * AD5421 Digital to analog converters  driver
   4  *
   5  * Copyright 2011 Analog Devices Inc.
   6  */
   7
   8 #include <linux/device.h>
   9 #include <linux/delay.h>
  10 #include <linux/err.h>
  11 #include <linux/module.h>
  12 #include <linux/interrupt.h>
  13 #include <linux/kernel.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/slab.h>
  16 #include <linux/sysfs.h>
  17
  18 #include <linux/iio/iio.h>
  19 #include <linux/iio/sysfs.h>
  20 #include <linux/iio/events.h>
  21 #include <linux/iio/dac/ad5421.h>
  22
  23
  24 #define AD5421_REG_DAC_DATA             0x1
  25 #define AD5421_REG_CTRL                 0x2
  26 #define AD5421_REG_OFFSET               0x3
  27 #define AD5421_REG_GAIN                 0x4
  28 /* load dac and fault shared the same register number. Writing to it will cause
  29  * a dac load command, reading from it will return the fault status register */
  30 #define AD5421_REG_LOAD_DAC             0x5
  31 #define AD5421_REG_FAULT                0x5
  32 #define AD5421_REG_FORCE_ALARM_CURRENT  0x6
  33 #define AD5421_REG_RESET                0x7
  34 #define AD5421_REG_START_CONVERSION     0x8
  35 #define AD5421_REG_NOOP                 0x9
  36
  37 #define AD5421_CTRL_WATCHDOG_DISABLE    BIT(12)
  38 #define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
  39 #define AD5421_CTRL_MIN_CURRENT         BIT(9)
  40 #define AD5421_CTRL_ADC_SOURCE_TEMP     BIT(8)
  41 #define AD5421_CTRL_ADC_ENABLE          BIT(7)
  42 #define AD5421_CTRL_PWR_DOWN_INT_VREF   BIT(6)
  43
  44 #define AD5421_FAULT_SPI                        BIT(15)
  45 #define AD5421_FAULT_PEC                        BIT(14)
  46 #define AD5421_FAULT_OVER_CURRENT               BIT(13)
  47 #define AD5421_FAULT_UNDER_CURRENT              BIT(12)
  48 #define AD5421_FAULT_TEMP_OVER_140              BIT(11)
  49 #define AD5421_FAULT_TEMP_OVER_100              BIT(10)
  50 #define AD5421_FAULT_UNDER_VOLTAGE_6V           BIT(9)
  51 #define AD5421_FAULT_UNDER_VOLTAGE_12V          BIT(8)
  52
  53 /* These bits will cause the fault pin to go high */
  54 #define AD5421_FAULT_TRIGGER_IRQ \
  55         (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
  56         AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
  57
  58 /**
  59  * struct ad5421_state - driver instance specific data
  60  * @spi:                spi_device
  61  * @ctrl:               control register cache
  62  * @current_range:      current range which the device is configured for
  63  * @data:               spi transfer buffers
  64  * @fault_mask:         software masking of events
  65  * @lock:               lock to protect the data buffer during SPI ops
  66  */
  67 struct ad5421_state {
  68         struct spi_device               *spi;
  69         unsigned int                    ctrl;
  70         enum ad5421_current_range       current_range;
  71         unsigned int                    fault_mask;
  72         struct mutex                    lock;
  73
  74         /*
  75          * DMA (thus cache coherency maintenance) requires the
  76          * transfer buffers to live in their own cache lines.
  77          */
  78         union {
  79                 __be32 d32;
  80                 u8 d8[4];
  81         } data[2] ____cacheline_aligned;
  82 };
  83
  84 static const struct iio_event_spec ad5421_current_event[] = {
  85         {
  86                 .type = IIO_EV_TYPE_THRESH,
  87                 .dir = IIO_EV_DIR_RISING,
  88                 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  89                         BIT(IIO_EV_INFO_ENABLE),
  90         }, {
  91                 .type = IIO_EV_TYPE_THRESH,
  92                 .dir = IIO_EV_DIR_FALLING,
  93                 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  94                         BIT(IIO_EV_INFO_ENABLE),
  95         },
  96 };
  97
  98 static const struct iio_event_spec ad5421_temp_event[] = {
  99         {
 100                 .type = IIO_EV_TYPE_THRESH,
 101                 .dir = IIO_EV_DIR_RISING,
 102                 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
 103                         BIT(IIO_EV_INFO_ENABLE),
 104         },
 105 };
 106
 107 static const struct iio_chan_spec ad5421_channels[] = {
 108         {
 109                 .type = IIO_CURRENT,
 110                 .indexed = 1,
 111                 .output = 1,
 112                 .channel = 0,
 113                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 114                         BIT(IIO_CHAN_INFO_CALIBSCALE) |
 115                         BIT(IIO_CHAN_INFO_CALIBBIAS),
 116                 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
 117                         BIT(IIO_CHAN_INFO_OFFSET),
 118                 .scan_type = {
 119                         .sign = 'u',
 120                         .realbits = 16,
 121                         .storagebits = 16,
 122                 },
 123                 .event_spec = ad5421_current_event,
 124                 .num_event_specs = ARRAY_SIZE(ad5421_current_event),
 125         },
 126         {
 127                 .type = IIO_TEMP,
 128                 .channel = -1,
 129                 .event_spec = ad5421_temp_event,
 130                 .num_event_specs = ARRAY_SIZE(ad5421_temp_event),
 131         },
 132 };
 133
 134 static int ad5421_write_unlocked(struct iio_dev *indio_dev,
 135         unsigned int reg, unsigned int val)
 136 {
 137         struct ad5421_state *st = iio_priv(indio_dev);
 138
 139         st->data[0].d32 = cpu_to_be32((reg << 16) | val);
 140
 141         return spi_write(st->spi, &st->data[0].d8[1], 3);
 142 }
 143
 144 static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
 145         unsigned int val)
 146 {
 147         struct ad5421_state *st = iio_priv(indio_dev);
 148         int ret;
 149
 150         mutex_lock(&st->lock);
 151         ret = ad5421_write_unlocked(indio_dev, reg, val);
 152         mutex_unlock(&st->lock);
 153
 154         return ret;
 155 }
 156
 157 static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
 158 {
 159         struct ad5421_state *st = iio_priv(indio_dev);
 160         int ret;
 161         struct spi_transfer t[] = {
 162                 {
 163                         .tx_buf = &st->data[0].d8[1],
 164                         .len = 3,
 165                         .cs_change = 1,
 166                 }, {
 167                         .rx_buf = &st->data[1].d8[1],
 168                         .len = 3,
 169                 },
 170         };
 171
 172         mutex_lock(&st->lock);
 173
 174         st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
 175
 176         ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
 177         if (ret >= 0)
 178                 ret = be32_to_cpu(st->data[1].d32) & 0xffff;
 179
 180         mutex_unlock(&st->lock);
 181
 182         return ret;
 183 }
 184
 185 static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
 186         unsigned int clr)
 187 {
 188         struct ad5421_state *st = iio_priv(indio_dev);
 189         unsigned int ret;
 190
 191         mutex_lock(&st->lock);
 192
 193         st->ctrl &= ~clr;
 194         st->ctrl |= set;
 195
 196         ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
 197
 198         mutex_unlock(&st->lock);
 199
 200         return ret;
 201 }
 202
 203 static irqreturn_t ad5421_fault_handler(int irq, void *data)
 204 {
 205         struct iio_dev *indio_dev = data;
 206         struct ad5421_state *st = iio_priv(indio_dev);
 207         unsigned int fault;
 208         unsigned int old_fault = 0;
 209         unsigned int events;
 210
 211         fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
 212         if (!fault)
 213                 return IRQ_NONE;
 214
 215         /* If we had a fault, this might mean that the DAC has lost its state
 216          * and has been reset. Make sure that the control register actually
 217          * contains what we expect it to contain. Otherwise the watchdog might
 218          * be enabled and we get watchdog timeout faults, which will render the
 219          * DAC unusable. */
 220         ad5421_update_ctrl(indio_dev, 0, 0);
 221
 222
 223         /* The fault pin stays high as long as a fault condition is present and
 224          * it is not possible to mask fault conditions. For certain fault
 225          * conditions for example like over-temperature it takes some time
 226          * until the fault condition disappears. If we would exit the interrupt
 227          * handler immediately after handling the event it would be entered
 228          * again instantly. Thus we fall back to polling in case we detect that
 229          * a interrupt condition is still present.
 230          */
 231         do {
 232                 /* 0xffff is a invalid value for the register and will only be
 233                  * read if there has been a communication error */
 234                 if (fault == 0xffff)
 235                         fault = 0;
 236
 237                 /* we are only interested in new events */
 238                 events = (old_fault ^ fault) & fault;
 239                 events &= st->fault_mask;
 240
 241                 if (events & AD5421_FAULT_OVER_CURRENT) {
 242                         iio_push_event(indio_dev,
 243                                 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
 244                                         0,
 245                                         IIO_EV_TYPE_THRESH,
 246                                         IIO_EV_DIR_RISING),
 247                         iio_get_time_ns(indio_dev));
 248                 }
 249
 250                 if (events & AD5421_FAULT_UNDER_CURRENT) {
 251                         iio_push_event(indio_dev,
 252                                 IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
 253                                         0,
 254                                         IIO_EV_TYPE_THRESH,
 255                                         IIO_EV_DIR_FALLING),
 256                                 iio_get_time_ns(indio_dev));
 257                 }
 258
 259                 if (events & AD5421_FAULT_TEMP_OVER_140) {
 260                         iio_push_event(indio_dev,
 261                                 IIO_UNMOD_EVENT_CODE(IIO_TEMP,
 262                                         0,
 263                                         IIO_EV_TYPE_MAG,
 264                                         IIO_EV_DIR_RISING),
 265                                 iio_get_time_ns(indio_dev));
 266                 }
 267
 268                 old_fault = fault;
 269                 fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
 270
 271                 /* still active? go to sleep for some time */
 272                 if (fault & AD5421_FAULT_TRIGGER_IRQ)
 273                         msleep(1000);
 274
 275         } while (fault & AD5421_FAULT_TRIGGER_IRQ);
 276
 277
 278         return IRQ_HANDLED;
 279 }
 280
 281 static void ad5421_get_current_min_max(struct ad5421_state *st,
 282         unsigned int *min, unsigned int *max)
 283 {
 284         /* The current range is configured using external pins, which are
 285          * usually hard-wired and not run-time switchable. */
 286         switch (st->current_range) {
 287         case AD5421_CURRENT_RANGE_4mA_20mA:
 288                 *min = 4000;
 289                 *max = 20000;
 290                 break;
 291         case AD5421_CURRENT_RANGE_3mA8_21mA:
 292                 *min = 3800;
 293                 *max = 21000;
 294                 break;
 295         case AD5421_CURRENT_RANGE_3mA2_24mA:
 296                 *min = 3200;
 297                 *max = 24000;
 298                 break;
 299         default:
 300                 *min = 0;
 301                 *max = 1;
 302                 break;
 303         }
 304 }
 305
 306 static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
 307 {
 308         unsigned int min, max;
 309
 310         ad5421_get_current_min_max(st, &min, &max);
 311         return (min * (1 << 16)) / (max - min);
 312 }
 313
 314 static int ad5421_read_raw(struct iio_dev *indio_dev,
 315         struct iio_chan_spec const *chan, int *val, int *val2, long m)
 316 {
 317         struct ad5421_state *st = iio_priv(indio_dev);
 318         unsigned int min, max;
 319         int ret;
 320
 321         if (chan->type != IIO_CURRENT)
 322                 return -EINVAL;
 323
 324         switch (m) {
 325         case IIO_CHAN_INFO_RAW:
 326                 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
 327                 if (ret < 0)
 328                         return ret;
 329                 *val = ret;
 330                 return IIO_VAL_INT;
 331         case IIO_CHAN_INFO_SCALE:
 332                 ad5421_get_current_min_max(st, &min, &max);
 333                 *val = max - min;
 334                 *val2 = (1 << 16) * 1000;
 335                 return IIO_VAL_FRACTIONAL;
 336         case IIO_CHAN_INFO_OFFSET:
 337                 *val = ad5421_get_offset(st);
 338                 return IIO_VAL_INT;
 339         case IIO_CHAN_INFO_CALIBBIAS:
 340                 ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
 341                 if (ret < 0)
 342                         return ret;
 343                 *val = ret - 32768;
 344                 return IIO_VAL_INT;
 345         case IIO_CHAN_INFO_CALIBSCALE:
 346                 ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
 347                 if (ret < 0)
 348                         return ret;
 349                 *val = ret;
 350                 return IIO_VAL_INT;
 351         }
 352
 353         return -EINVAL;
 354 }
 355
 356 static int ad5421_write_raw(struct iio_dev *indio_dev,
 357         struct iio_chan_spec const *chan, int val, int val2, long mask)
 358 {
 359         const unsigned int max_val = 1 << 16;
 360
 361         switch (mask) {
 362         case IIO_CHAN_INFO_RAW:
 363                 if (val >= max_val || val < 0)
 364                         return -EINVAL;
 365
 366                 return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
 367         case IIO_CHAN_INFO_CALIBBIAS:
 368                 val += 32768;
 369                 if (val >= max_val || val < 0)
 370                         return -EINVAL;
 371
 372                 return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
 373         case IIO_CHAN_INFO_CALIBSCALE:
 374                 if (val >= max_val || val < 0)
 375                         return -EINVAL;
 376
 377                 return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
 378         default:
 379                 break;
 380         }
 381
 382         return -EINVAL;
 383 }
 384
 385 static int ad5421_write_event_config(struct iio_dev *indio_dev,
 386         const struct iio_chan_spec *chan, enum iio_event_type type,
 387         enum iio_event_direction dir, int state)
 388 {
 389         struct ad5421_state *st = iio_priv(indio_dev);
 390         unsigned int mask;
 391
 392         switch (chan->type) {
 393         case IIO_CURRENT:
 394                 if (dir == IIO_EV_DIR_RISING)
 395                         mask = AD5421_FAULT_OVER_CURRENT;
 396                 else
 397                         mask = AD5421_FAULT_UNDER_CURRENT;
 398                 break;
 399         case IIO_TEMP:
 400                 mask = AD5421_FAULT_TEMP_OVER_140;
 401                 break;
 402         default:
 403                 return -EINVAL;
 404         }
 405
 406         mutex_lock(&st->lock);
 407         if (state)
 408                 st->fault_mask |= mask;
 409         else
 410                 st->fault_mask &= ~mask;
 411         mutex_unlock(&st->lock);
 412
 413         return 0;
 414 }
 415
 416 static int ad5421_read_event_config(struct iio_dev *indio_dev,
 417         const struct iio_chan_spec *chan, enum iio_event_type type,
 418         enum iio_event_direction dir)
 419 {
 420         struct ad5421_state *st = iio_priv(indio_dev);
 421         unsigned int mask;
 422
 423         switch (chan->type) {
 424         case IIO_CURRENT:
 425                 if (dir == IIO_EV_DIR_RISING)
 426                         mask = AD5421_FAULT_OVER_CURRENT;
 427                 else
 428                         mask = AD5421_FAULT_UNDER_CURRENT;
 429                 break;
 430         case IIO_TEMP:
 431                 mask = AD5421_FAULT_TEMP_OVER_140;
 432                 break;
 433         default:
 434                 return -EINVAL;
 435         }
 436
 437         return (bool)(st->fault_mask & mask);
 438 }
 439
 440 static int ad5421_read_event_value(struct iio_dev *indio_dev,
 441         const struct iio_chan_spec *chan, enum iio_event_type type,
 442         enum iio_event_direction dir, enum iio_event_info info, int *val,
 443         int *val2)
 444 {
 445         int ret;
 446
 447         switch (chan->type) {
 448         case IIO_CURRENT:
 449                 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
 450                 if (ret < 0)
 451                         return ret;
 452                 *val = ret;
 453                 break;
 454         case IIO_TEMP:
 455                 *val = 140000;
 456                 break;
 457         default:
 458                 return -EINVAL;
 459         }
 460
 461         return IIO_VAL_INT;
 462 }
 463
 464 static const struct iio_info ad5421_info = {
 465         .read_raw =             ad5421_read_raw,
 466         .write_raw =            ad5421_write_raw,
 467         .read_event_config =    ad5421_read_event_config,
 468         .write_event_config =   ad5421_write_event_config,
 469         .read_event_value =     ad5421_read_event_value,
 470 };
 471
 472 static int ad5421_probe(struct spi_device *spi)
 473 {
 474         struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
 475         struct iio_dev *indio_dev;
 476         struct ad5421_state *st;
 477         int ret;
 478
 479         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 480         if (indio_dev == NULL) {
 481                 dev_err(&spi->dev, "Failed to allocate iio device\n");
 482                 return  -ENOMEM;
 483         }
 484
 485         st = iio_priv(indio_dev);
 486         spi_set_drvdata(spi, indio_dev);
 487
 488         st->spi = spi;
 489
 490         indio_dev->name = "ad5421";
 491         indio_dev->info = &ad5421_info;
 492         indio_dev->modes = INDIO_DIRECT_MODE;
 493         indio_dev->channels = ad5421_channels;
 494         indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
 495
 496         mutex_init(&st->lock);
 497
 498         st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
 499                         AD5421_CTRL_AUTO_FAULT_READBACK;
 500
 501         if (pdata) {
 502                 st->current_range = pdata->current_range;
 503                 if (pdata->external_vref)
 504                         st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
 505         } else {
 506                 st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
 507         }
 508
 509         /* write initial ctrl register value */
 510         ad5421_update_ctrl(indio_dev, 0, 0);
 511
 512         if (spi->irq) {
 513                 ret = devm_request_threaded_irq(&spi->dev, spi->irq,
 514                                            NULL,
 515                                            ad5421_fault_handler,
 516                                            IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
 517                                            "ad5421 fault",
 518                                            indio_dev);
 519                 if (ret)
 520                         return ret;
 521         }
 522
 523         return devm_iio_device_register(&spi->dev, indio_dev);
 524 }
 525
 526 static struct spi_driver ad5421_driver = {
 527         .driver = {
 528                    .name = "ad5421",
 529         },
 530         .probe = ad5421_probe,
 531 };
 532 module_spi_driver(ad5421_driver);
 533
 534 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 535 MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
 536 MODULE_LICENSE("GPL v2");
 537 MODULE_ALIAS("spi:ad5421");