drivers/media/platform/exynos4-is/fimc-is-regs.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
   4  *
   5  * Copyright (C) 2012 - 2013 Samsung Electronics Co., Ltd.
   6  *
   7  * Authors: Younghwan Joo <yhwan.joo@samsung.com>
   8  *          Sylwester Nawrocki <s.nawrocki@samsung.com>
   9  */
  10 #include <linux/delay.h>
  11
  12 #include "fimc-is.h"
  13 #include "fimc-is-command.h"
  14 #include "fimc-is-regs.h"
  15 #include "fimc-is-sensor.h"
  16
  17 void fimc_is_fw_clear_irq1(struct fimc_is *is, unsigned int nr)
  18 {
  19         mcuctl_write(1UL << nr, is, MCUCTL_REG_INTCR1);
  20 }
  21
  22 void fimc_is_fw_clear_irq2(struct fimc_is *is)
  23 {
  24         u32 cfg = mcuctl_read(is, MCUCTL_REG_INTSR2);
  25         mcuctl_write(cfg, is, MCUCTL_REG_INTCR2);
  26 }
  27
  28 void fimc_is_hw_set_intgr0_gd0(struct fimc_is *is)
  29 {
  30         mcuctl_write(INTGR0_INTGD(0), is, MCUCTL_REG_INTGR0);
  31 }
  32
  33 int fimc_is_hw_wait_intmsr0_intmsd0(struct fimc_is *is)
  34 {
  35         unsigned int timeout = 2000;
  36         u32 cfg, status;
  37
  38         do {
  39                 cfg = mcuctl_read(is, MCUCTL_REG_INTMSR0);
  40                 status = INTMSR0_GET_INTMSD(0, cfg);
  41
  42                 if (--timeout == 0) {
  43                         dev_warn(&is->pdev->dev, "%s timeout\n",
  44                                  __func__);
  45                         return -ETIMEDOUT;
  46                 }
  47                 udelay(1);
  48         } while (status != 0);
  49
  50         return 0;
  51 }
  52
  53 int fimc_is_hw_set_param(struct fimc_is *is)
  54 {
  55         struct chain_config *config = &is->config[is->config_index];
  56         unsigned int param_count = __get_pending_param_count(is);
  57
  58         fimc_is_hw_wait_intmsr0_intmsd0(is);
  59
  60         mcuctl_write(HIC_SET_PARAMETER, is, MCUCTL_REG_ISSR(0));
  61         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
  62         mcuctl_write(is->config_index, is, MCUCTL_REG_ISSR(2));
  63
  64         mcuctl_write(param_count, is, MCUCTL_REG_ISSR(3));
  65         mcuctl_write(config->p_region_index[0], is, MCUCTL_REG_ISSR(4));
  66         mcuctl_write(config->p_region_index[1], is, MCUCTL_REG_ISSR(5));
  67
  68         fimc_is_hw_set_intgr0_gd0(is);
  69         return 0;
  70 }
  71
  72 static int __maybe_unused fimc_is_hw_set_tune(struct fimc_is *is)
  73 {
  74         fimc_is_hw_wait_intmsr0_intmsd0(is);
  75
  76         mcuctl_write(HIC_SET_TUNE, is, MCUCTL_REG_ISSR(0));
  77         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
  78         mcuctl_write(is->h2i_cmd.entry_id, is, MCUCTL_REG_ISSR(2));
  79
  80         fimc_is_hw_set_intgr0_gd0(is);
  81         return 0;
  82 }
  83
  84 #define FIMC_IS_MAX_PARAMS      4
  85
  86 int fimc_is_hw_get_params(struct fimc_is *is, unsigned int num_args)
  87 {
  88         int i;
  89
  90         if (num_args > FIMC_IS_MAX_PARAMS)
  91                 return -EINVAL;
  92
  93         is->i2h_cmd.num_args = num_args;
  94
  95         for (i = 0; i < FIMC_IS_MAX_PARAMS; i++) {
  96                 if (i < num_args)
  97                         is->i2h_cmd.args[i] = mcuctl_read(is,
  98                                         MCUCTL_REG_ISSR(12 + i));
  99                 else
 100                         is->i2h_cmd.args[i] = 0;
 101         }
 102         return 0;
 103 }
 104
 105 void fimc_is_hw_set_isp_buf_mask(struct fimc_is *is, unsigned int mask)
 106 {
 107         if (hweight32(mask) == 1) {
 108                 dev_err(&is->pdev->dev, "%s(): not enough buffers (mask %#x)\n",
 109                                                         __func__, mask);
 110                 return;
 111         }
 112
 113         if (mcuctl_read(is, MCUCTL_REG_ISSR(23)) != 0)
 114                 dev_dbg(&is->pdev->dev, "non-zero DMA buffer mask\n");
 115
 116         mcuctl_write(mask, is, MCUCTL_REG_ISSR(23));
 117 }
 118
 119 void fimc_is_hw_set_sensor_num(struct fimc_is *is)
 120 {
 121         pr_debug("setting sensor index to: %d\n", is->sensor_index);
 122
 123         mcuctl_write(IH_REPLY_DONE, is, MCUCTL_REG_ISSR(0));
 124         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
 125         mcuctl_write(IHC_GET_SENSOR_NUM, is, MCUCTL_REG_ISSR(2));
 126         mcuctl_write(FIMC_IS_SENSORS_NUM, is, MCUCTL_REG_ISSR(3));
 127 }
 128
 129 void fimc_is_hw_close_sensor(struct fimc_is *is, unsigned int index)
 130 {
 131         if (is->sensor_index != index)
 132                 return;
 133
 134         fimc_is_hw_wait_intmsr0_intmsd0(is);
 135         mcuctl_write(HIC_CLOSE_SENSOR, is, MCUCTL_REG_ISSR(0));
 136         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
 137         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(2));
 138         fimc_is_hw_set_intgr0_gd0(is);
 139 }
 140
 141 void fimc_is_hw_get_setfile_addr(struct fimc_is *is)
 142 {
 143         fimc_is_hw_wait_intmsr0_intmsd0(is);
 144         mcuctl_write(HIC_GET_SET_FILE_ADDR, is, MCUCTL_REG_ISSR(0));
 145         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
 146         fimc_is_hw_set_intgr0_gd0(is);
 147 }
 148
 149 void fimc_is_hw_load_setfile(struct fimc_is *is)
 150 {
 151         fimc_is_hw_wait_intmsr0_intmsd0(is);
 152         mcuctl_write(HIC_LOAD_SET_FILE, is, MCUCTL_REG_ISSR(0));
 153         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
 154         fimc_is_hw_set_intgr0_gd0(is);
 155 }
 156
 157 int fimc_is_hw_change_mode(struct fimc_is *is)
 158 {
 159         static const u8 cmd[] = {
 160                 HIC_PREVIEW_STILL, HIC_PREVIEW_VIDEO,
 161                 HIC_CAPTURE_STILL, HIC_CAPTURE_VIDEO,
 162         };
 163
 164         if (WARN_ON(is->config_index >= ARRAY_SIZE(cmd)))
 165                 return -EINVAL;
 166
 167         mcuctl_write(cmd[is->config_index], is, MCUCTL_REG_ISSR(0));
 168         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
 169         mcuctl_write(is->setfile.sub_index, is, MCUCTL_REG_ISSR(2));
 170         fimc_is_hw_set_intgr0_gd0(is);
 171         return 0;
 172 }
 173
 174 void fimc_is_hw_stream_on(struct fimc_is *is)
 175 {
 176         fimc_is_hw_wait_intmsr0_intmsd0(is);
 177         mcuctl_write(HIC_STREAM_ON, is, MCUCTL_REG_ISSR(0));
 178         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
 179         mcuctl_write(0, is, MCUCTL_REG_ISSR(2));
 180         fimc_is_hw_set_intgr0_gd0(is);
 181 }
 182
 183 void fimc_is_hw_stream_off(struct fimc_is *is)
 184 {
 185         fimc_is_hw_wait_intmsr0_intmsd0(is);
 186         mcuctl_write(HIC_STREAM_OFF, is, MCUCTL_REG_ISSR(0));
 187         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
 188         fimc_is_hw_set_intgr0_gd0(is);
 189 }
 190
 191 void fimc_is_hw_subip_power_off(struct fimc_is *is)
 192 {
 193         fimc_is_hw_wait_intmsr0_intmsd0(is);
 194         mcuctl_write(HIC_POWER_DOWN, is, MCUCTL_REG_ISSR(0));
 195         mcuctl_write(is->sensor_index, is, MCUCTL_REG_ISSR(1));
 196         fimc_is_hw_set_intgr0_gd0(is);
 197 }
 198
 199 int fimc_is_itf_s_param(struct fimc_is *is, bool update)
 200 {
 201         int ret;
 202
 203         if (update)
 204                 __is_hw_update_params(is);
 205
 206         fimc_is_mem_barrier();
 207
 208         clear_bit(IS_ST_BLOCK_CMD_CLEARED, &is->state);
 209         fimc_is_hw_set_param(is);
 210         ret = fimc_is_wait_event(is, IS_ST_BLOCK_CMD_CLEARED, 1,
 211                                 FIMC_IS_CONFIG_TIMEOUT);
 212         if (ret < 0)
 213                 dev_err(&is->pdev->dev, "%s() timeout\n", __func__);
 214
 215         return ret;
 216 }
 217
 218 int fimc_is_itf_mode_change(struct fimc_is *is)
 219 {
 220         int ret;
 221
 222         clear_bit(IS_ST_CHANGE_MODE, &is->state);
 223         fimc_is_hw_change_mode(is);
 224         ret = fimc_is_wait_event(is, IS_ST_CHANGE_MODE, 1,
 225                                 FIMC_IS_CONFIG_TIMEOUT);
 226         if (ret < 0)
 227                 dev_err(&is->pdev->dev, "%s(): mode change (%d) timeout\n",
 228                         __func__, is->config_index);
 229         return ret;
 230 }