drivers/gpio/stmpe-gpio.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * License Terms: GNU General Public License, version 2
   5  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
   6  */
   7
   8 #include <linux/module.h>
   9 #include <linux/init.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/slab.h>
  12 #include <linux/gpio.h>
  13 #include <linux/irq.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/mfd/stmpe.h>
  16
  17 /*
  18  * These registers are modified under the irq bus lock and cached to avoid
  19  * unnecessary writes in bus_sync_unlock.
  20  */
  21 enum { REG_RE, REG_FE, REG_IE };
  22
  23 #define CACHE_NR_REGS   3
  24 #define CACHE_NR_BANKS  (STMPE_NR_GPIOS / 8)
  25
  26 struct stmpe_gpio {
  27         struct gpio_chip chip;
  28         struct stmpe *stmpe;
  29         struct device *dev;
  30         struct mutex irq_lock;
  31
  32         int irq_base;
  33
  34         /* Caches of interrupt control registers for bus_lock */
  35         u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS];
  36         u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS];
  37 };
  38
  39 static inline struct stmpe_gpio *to_stmpe_gpio(struct gpio_chip *chip)
  40 {
  41         return container_of(chip, struct stmpe_gpio, chip);
  42 }
  43
  44 static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset)
  45 {
  46         struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
  47         struct stmpe *stmpe = stmpe_gpio->stmpe;
  48         u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8);
  49         u8 mask = 1 << (offset % 8);
  50         int ret;
  51
  52         ret = stmpe_reg_read(stmpe, reg);
  53         if (ret < 0)
  54                 return ret;
  55
  56         return ret & mask;
  57 }
  58
  59 static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
  60 {
  61         struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
  62         struct stmpe *stmpe = stmpe_gpio->stmpe;
  63         int which = val ? STMPE_IDX_GPSR_LSB : STMPE_IDX_GPCR_LSB;
  64         u8 reg = stmpe->regs[which] - (offset / 8);
  65         u8 mask = 1 << (offset % 8);
  66
  67         stmpe_reg_write(stmpe, reg, mask);
  68 }
  69
  70 static int stmpe_gpio_direction_output(struct gpio_chip *chip,
  71                                          unsigned offset, int val)
  72 {
  73         struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
  74         struct stmpe *stmpe = stmpe_gpio->stmpe;
  75         u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8);
  76         u8 mask = 1 << (offset % 8);
  77
  78         stmpe_gpio_set(chip, offset, val);
  79
  80         return stmpe_set_bits(stmpe, reg, mask, mask);
  81 }
  82
  83 static int stmpe_gpio_direction_input(struct gpio_chip *chip,
  84                                         unsigned offset)
  85 {
  86         struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
  87         struct stmpe *stmpe = stmpe_gpio->stmpe;
  88         u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8);
  89         u8 mask = 1 << (offset % 8);
  90
  91         return stmpe_set_bits(stmpe, reg, mask, 0);
  92 }
  93
  94 static int stmpe_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
  95 {
  96         struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
  97
  98         return stmpe_gpio->irq_base + offset;
  99 }
 100
 101 static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset)
 102 {
 103         struct stmpe_gpio *stmpe_gpio = to_stmpe_gpio(chip);
 104         struct stmpe *stmpe = stmpe_gpio->stmpe;
 105
 106         return stmpe_set_altfunc(stmpe, 1 << offset, STMPE_BLOCK_GPIO);
 107 }
 108
 109 static struct gpio_chip template_chip = {
 110         .label                  = "stmpe",
 111         .owner                  = THIS_MODULE,
 112         .direction_input        = stmpe_gpio_direction_input,
 113         .get                    = stmpe_gpio_get,
 114         .direction_output       = stmpe_gpio_direction_output,
 115         .set                    = stmpe_gpio_set,
 116         .to_irq                 = stmpe_gpio_to_irq,
 117         .request                = stmpe_gpio_request,
 118         .can_sleep              = 1,
 119 };
 120
 121 static int stmpe_gpio_irq_set_type(unsigned int irq, unsigned int type)
 122 {
 123         struct stmpe_gpio *stmpe_gpio = get_irq_chip_data(irq);
 124         int offset = irq - stmpe_gpio->irq_base;
 125         int regoffset = offset / 8;
 126         int mask = 1 << (offset % 8);
 127
 128         if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH)
 129                 return -EINVAL;
 130
 131         if (type == IRQ_TYPE_EDGE_RISING)
 132                 stmpe_gpio->regs[REG_RE][regoffset] |= mask;
 133         else
 134                 stmpe_gpio->regs[REG_RE][regoffset] &= ~mask;
 135
 136         if (type == IRQ_TYPE_EDGE_FALLING)
 137                 stmpe_gpio->regs[REG_FE][regoffset] |= mask;
 138         else
 139                 stmpe_gpio->regs[REG_FE][regoffset] &= ~mask;
 140
 141         return 0;
 142 }
 143
 144 static void stmpe_gpio_irq_lock(unsigned int irq)
 145 {
 146         struct stmpe_gpio *stmpe_gpio = get_irq_chip_data(irq);
 147
 148         mutex_lock(&stmpe_gpio->irq_lock);
 149 }
 150
 151 static void stmpe_gpio_irq_sync_unlock(unsigned int irq)
 152 {
 153         struct stmpe_gpio *stmpe_gpio = get_irq_chip_data(irq);
 154         struct stmpe *stmpe = stmpe_gpio->stmpe;
 155         int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8);
 156         static const u8 regmap[] = {
 157                 [REG_RE]        = STMPE_IDX_GPRER_LSB,
 158                 [REG_FE]        = STMPE_IDX_GPFER_LSB,
 159                 [REG_IE]        = STMPE_IDX_IEGPIOR_LSB,
 160         };
 161         int i, j;
 162
 163         for (i = 0; i < CACHE_NR_REGS; i++) {
 164                 for (j = 0; j < num_banks; j++) {
 165                         u8 old = stmpe_gpio->oldregs[i][j];
 166                         u8 new = stmpe_gpio->regs[i][j];
 167
 168                         if (new == old)
 169                                 continue;
 170
 171                         stmpe_gpio->oldregs[i][j] = new;
 172                         stmpe_reg_write(stmpe, stmpe->regs[regmap[i]] - j, new);
 173                 }
 174         }
 175
 176         mutex_unlock(&stmpe_gpio->irq_lock);
 177 }
 178
 179 static void stmpe_gpio_irq_mask(unsigned int irq)
 180 {
 181         struct stmpe_gpio *stmpe_gpio = get_irq_chip_data(irq);
 182         int offset = irq - stmpe_gpio->irq_base;
 183         int regoffset = offset / 8;
 184         int mask = 1 << (offset % 8);
 185
 186         stmpe_gpio->regs[REG_IE][regoffset] &= ~mask;
 187 }
 188
 189 static void stmpe_gpio_irq_unmask(unsigned int irq)
 190 {
 191         struct stmpe_gpio *stmpe_gpio = get_irq_chip_data(irq);
 192         int offset = irq - stmpe_gpio->irq_base;
 193         int regoffset = offset / 8;
 194         int mask = 1 << (offset % 8);
 195
 196         stmpe_gpio->regs[REG_IE][regoffset] |= mask;
 197 }
 198
 199 static struct irq_chip stmpe_gpio_irq_chip = {
 200         .name                   = "stmpe-gpio",
 201         .bus_lock               = stmpe_gpio_irq_lock,
 202         .bus_sync_unlock        = stmpe_gpio_irq_sync_unlock,
 203         .mask                   = stmpe_gpio_irq_mask,
 204         .unmask                 = stmpe_gpio_irq_unmask,
 205         .set_type               = stmpe_gpio_irq_set_type,
 206 };
 207
 208 static irqreturn_t stmpe_gpio_irq(int irq, void *dev)
 209 {
 210         struct stmpe_gpio *stmpe_gpio = dev;
 211         struct stmpe *stmpe = stmpe_gpio->stmpe;
 212         u8 statmsbreg = stmpe->regs[STMPE_IDX_ISGPIOR_MSB];
 213         int num_banks = DIV_ROUND_UP(stmpe->num_gpios, 8);
 214         u8 status[num_banks];
 215         int ret;
 216         int i;
 217
 218         ret = stmpe_block_read(stmpe, statmsbreg, num_banks, status);
 219         if (ret < 0)
 220                 return IRQ_NONE;
 221
 222         for (i = 0; i < num_banks; i++) {
 223                 int bank = num_banks - i - 1;
 224                 unsigned int enabled = stmpe_gpio->regs[REG_IE][bank];
 225                 unsigned int stat = status[i];
 226
 227                 stat &= enabled;
 228                 if (!stat)
 229                         continue;
 230
 231                 while (stat) {
 232                         int bit = __ffs(stat);
 233                         int line = bank * 8 + bit;
 234
 235                         handle_nested_irq(stmpe_gpio->irq_base + line);
 236                         stat &= ~(1 << bit);
 237                 }
 238
 239                 stmpe_reg_write(stmpe, statmsbreg + i, status[i]);
 240                 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_GPEDR_MSB] + i,
 241                                 status[i]);
 242         }
 243
 244         return IRQ_HANDLED;
 245 }
 246
 247 static int __devinit stmpe_gpio_irq_init(struct stmpe_gpio *stmpe_gpio)
 248 {
 249         int base = stmpe_gpio->irq_base;
 250         int irq;
 251
 252         for (irq = base; irq < base + stmpe_gpio->chip.ngpio; irq++) {
 253                 set_irq_chip_data(irq, stmpe_gpio);
 254                 set_irq_chip_and_handler(irq, &stmpe_gpio_irq_chip,
 255                                          handle_simple_irq);
 256                 set_irq_nested_thread(irq, 1);
 257 #ifdef CONFIG_ARM
 258                 set_irq_flags(irq, IRQF_VALID);
 259 #else
 260                 set_irq_noprobe(irq);
 261 #endif
 262         }
 263
 264         return 0;
 265 }
 266
 267 static void stmpe_gpio_irq_remove(struct stmpe_gpio *stmpe_gpio)
 268 {
 269         int base = stmpe_gpio->irq_base;
 270         int irq;
 271
 272         for (irq = base; irq < base + stmpe_gpio->chip.ngpio; irq++) {
 273 #ifdef CONFIG_ARM
 274                 set_irq_flags(irq, 0);
 275 #endif
 276                 set_irq_chip_and_handler(irq, NULL, NULL);
 277                 set_irq_chip_data(irq, NULL);
 278         }
 279 }
 280
 281 static int __devinit stmpe_gpio_probe(struct platform_device *pdev)
 282 {
 283         struct stmpe *stmpe = dev_get_drvdata(pdev->dev.parent);
 284         struct stmpe_gpio_platform_data *pdata;
 285         struct stmpe_gpio *stmpe_gpio;
 286         int ret;
 287         int irq;
 288
 289         pdata = stmpe->pdata->gpio;
 290         if (!pdata)
 291                 return -ENODEV;
 292
 293         irq = platform_get_irq(pdev, 0);
 294         if (irq < 0)
 295                 return irq;
 296
 297         stmpe_gpio = kzalloc(sizeof(struct stmpe_gpio), GFP_KERNEL);
 298         if (!stmpe_gpio)
 299                 return -ENOMEM;
 300
 301         mutex_init(&stmpe_gpio->irq_lock);
 302
 303         stmpe_gpio->dev = &pdev->dev;
 304         stmpe_gpio->stmpe = stmpe;
 305
 306         stmpe_gpio->chip = template_chip;
 307         stmpe_gpio->chip.ngpio = stmpe->num_gpios;
 308         stmpe_gpio->chip.dev = &pdev->dev;
 309         stmpe_gpio->chip.base = pdata ? pdata->gpio_base : -1;
 310
 311         stmpe_gpio->irq_base = stmpe->irq_base + STMPE_INT_GPIO(0);
 312
 313         ret = stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
 314         if (ret)
 315                 return ret;
 316
 317         ret = stmpe_gpio_irq_init(stmpe_gpio);
 318         if (ret)
 319                 goto out_free;
 320
 321         ret = request_threaded_irq(irq, NULL, stmpe_gpio_irq, IRQF_ONESHOT,
 322                                    "stmpe-gpio", stmpe_gpio);
 323         if (ret) {
 324                 dev_err(&pdev->dev, "unable to get irq: %d\n", ret);
 325                 goto out_removeirq;
 326         }
 327
 328         ret = gpiochip_add(&stmpe_gpio->chip);
 329         if (ret) {
 330                 dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret);
 331                 goto out_freeirq;
 332         }
 333
 334         if (pdata && pdata->setup)
 335                 pdata->setup(stmpe, stmpe_gpio->chip.base);
 336
 337         platform_set_drvdata(pdev, stmpe_gpio);
 338
 339         return 0;
 340
 341 out_freeirq:
 342         free_irq(irq, stmpe_gpio);
 343 out_removeirq:
 344         stmpe_gpio_irq_remove(stmpe_gpio);
 345 out_free:
 346         kfree(stmpe_gpio);
 347         return ret;
 348 }
 349
 350 static int __devexit stmpe_gpio_remove(struct platform_device *pdev)
 351 {
 352         struct stmpe_gpio *stmpe_gpio = platform_get_drvdata(pdev);
 353         struct stmpe *stmpe = stmpe_gpio->stmpe;
 354         struct stmpe_gpio_platform_data *pdata = stmpe->pdata->gpio;
 355         int irq = platform_get_irq(pdev, 0);
 356         int ret;
 357
 358         if (pdata && pdata->remove)
 359                 pdata->remove(stmpe, stmpe_gpio->chip.base);
 360
 361         ret = gpiochip_remove(&stmpe_gpio->chip);
 362         if (ret < 0) {
 363                 dev_err(stmpe_gpio->dev,
 364                         "unable to remove gpiochip: %d\n", ret);
 365                 return ret;
 366         }
 367
 368         stmpe_disable(stmpe, STMPE_BLOCK_GPIO);
 369
 370         free_irq(irq, stmpe_gpio);
 371         stmpe_gpio_irq_remove(stmpe_gpio);
 372         platform_set_drvdata(pdev, NULL);
 373         kfree(stmpe_gpio);
 374
 375         return 0;
 376 }
 377
 378 static struct platform_driver stmpe_gpio_driver = {
 379         .driver.name    = "stmpe-gpio",
 380         .driver.owner   = THIS_MODULE,
 381         .probe          = stmpe_gpio_probe,
 382         .remove         = __devexit_p(stmpe_gpio_remove),
 383 };
 384
 385 static int __init stmpe_gpio_init(void)
 386 {
 387         return platform_driver_register(&stmpe_gpio_driver);
 388 }
 389 subsys_initcall(stmpe_gpio_init);
 390
 391 static void __exit stmpe_gpio_exit(void)
 392 {
 393         platform_driver_unregister(&stmpe_gpio_driver);
 394 }
 395 module_exit(stmpe_gpio_exit);
 396
 397 MODULE_LICENSE("GPL v2");
 398 MODULE_DESCRIPTION("STMPExxxx GPIO driver");
 399 MODULE_AUTHOR("Rabin Vincent <rabin.vincent@stericsson.com>");