1 #include <linux/dma-mapping.h>
2 #include <linux/dma-debug.h>
3 #include <linux/dmar.h>
4 #include <linux/bootmem.h>
7 #include <linux/kmemleak.h>
11 #include <asm/iommu.h>
13 #include <asm/calgary.h>
14 #include <asm/amd_iommu.h>
15 #include <asm/x86_init.h>
17 static int forbid_dac __read_mostly
;
19 struct dma_map_ops
*dma_ops
= &nommu_dma_ops
;
20 EXPORT_SYMBOL(dma_ops
);
22 static int iommu_sac_force __read_mostly
;
24 #ifdef CONFIG_IOMMU_DEBUG
25 int panic_on_overflow __read_mostly
= 1;
26 int force_iommu __read_mostly
= 1;
28 int panic_on_overflow __read_mostly
= 0;
29 int force_iommu __read_mostly
= 0;
32 int iommu_merge __read_mostly
= 0;
34 int no_iommu __read_mostly
;
35 /* Set this to 1 if there is a HW IOMMU in the system */
36 int iommu_detected __read_mostly
= 0;
39 * This variable becomes 1 if iommu=pt is passed on the kernel command line.
40 * If this variable is 1, IOMMU implementations do no DMA translation for
41 * devices and allow every device to access to whole physical memory. This is
42 * useful if a user wants to use an IOMMU only for KVM device assignment to
43 * guests and not for driver dma translation.
45 int iommu_pass_through __read_mostly
;
47 /* Dummy device used for NULL arguments (normally ISA). */
48 struct device x86_dma_fallback_dev
= {
49 .init_name
= "fallback device",
50 .coherent_dma_mask
= ISA_DMA_BIT_MASK
,
51 .dma_mask
= &x86_dma_fallback_dev
.coherent_dma_mask
,
53 EXPORT_SYMBOL(x86_dma_fallback_dev
);
55 /* Number of entries preallocated for DMA-API debugging */
56 #define PREALLOC_DMA_DEBUG_ENTRIES 32768
58 int dma_set_mask(struct device
*dev
, u64 mask
)
60 if (!dev
->dma_mask
|| !dma_supported(dev
, mask
))
63 *dev
->dma_mask
= mask
;
67 EXPORT_SYMBOL(dma_set_mask
);
69 #if defined(CONFIG_X86_64) && !defined(CONFIG_NUMA)
70 static __initdata
void *dma32_bootmem_ptr
;
71 static unsigned long dma32_bootmem_size __initdata
= (128ULL<<20);
73 static int __init
parse_dma32_size_opt(char *p
)
77 dma32_bootmem_size
= memparse(p
, &p
);
80 early_param("dma32_size", parse_dma32_size_opt
);
82 void __init
dma32_reserve_bootmem(void)
84 unsigned long size
, align
;
85 if (max_pfn
<= MAX_DMA32_PFN
)
89 * check aperture_64.c allocate_aperture() for reason about
93 size
= roundup(dma32_bootmem_size
, align
);
94 dma32_bootmem_ptr
= __alloc_bootmem_nopanic(size
, align
,
97 * Kmemleak should not scan this block as it may not be mapped via the
98 * kernel direct mapping.
100 kmemleak_ignore(dma32_bootmem_ptr
);
101 if (dma32_bootmem_ptr
)
102 dma32_bootmem_size
= size
;
104 dma32_bootmem_size
= 0;
106 static void __init
dma32_free_bootmem(void)
109 if (max_pfn
<= MAX_DMA32_PFN
)
112 if (!dma32_bootmem_ptr
)
115 free_bootmem(__pa(dma32_bootmem_ptr
), dma32_bootmem_size
);
117 dma32_bootmem_ptr
= NULL
;
118 dma32_bootmem_size
= 0;
121 void __init
dma32_reserve_bootmem(void)
124 static void __init
dma32_free_bootmem(void)
130 void __init
pci_iommu_alloc(void)
132 /* free the range so iommu could get some range less than 4G */
133 dma32_free_bootmem();
135 if (pci_swiotlb_detect())
138 gart_iommu_hole_init();
142 detect_intel_iommu();
144 /* needs to be called after gart_iommu_hole_init */
150 void *dma_generic_alloc_coherent(struct device
*dev
, size_t size
,
151 dma_addr_t
*dma_addr
, gfp_t flag
)
153 unsigned long dma_mask
;
157 dma_mask
= dma_alloc_coherent_mask(dev
, flag
);
161 page
= alloc_pages_node(dev_to_node(dev
), flag
, get_order(size
));
165 addr
= page_to_phys(page
);
166 if (addr
+ size
> dma_mask
) {
167 __free_pages(page
, get_order(size
));
169 if (dma_mask
< DMA_BIT_MASK(32) && !(flag
& GFP_DMA
)) {
170 flag
= (flag
& ~GFP_DMA32
) | GFP_DMA
;
178 return page_address(page
);
182 * See <Documentation/x86_64/boot-options.txt> for the iommu kernel parameter
185 static __init
int iommu_setup(char *p
)
193 if (!strncmp(p
, "off", 3))
195 /* gart_parse_options has more force support */
196 if (!strncmp(p
, "force", 5))
198 if (!strncmp(p
, "noforce", 7)) {
203 if (!strncmp(p
, "biomerge", 8)) {
207 if (!strncmp(p
, "panic", 5))
208 panic_on_overflow
= 1;
209 if (!strncmp(p
, "nopanic", 7))
210 panic_on_overflow
= 0;
211 if (!strncmp(p
, "merge", 5)) {
215 if (!strncmp(p
, "nomerge", 7))
217 if (!strncmp(p
, "forcesac", 8))
219 if (!strncmp(p
, "allowdac", 8))
221 if (!strncmp(p
, "nodac", 5))
223 if (!strncmp(p
, "usedac", 6)) {
227 #ifdef CONFIG_SWIOTLB
228 if (!strncmp(p
, "soft", 4))
231 if (!strncmp(p
, "pt", 2))
232 iommu_pass_through
= 1;
234 gart_parse_options(p
);
236 #ifdef CONFIG_CALGARY_IOMMU
237 if (!strncmp(p
, "calgary", 7))
239 #endif /* CONFIG_CALGARY_IOMMU */
241 p
+= strcspn(p
, ",");
247 early_param("iommu", iommu_setup
);
249 int dma_supported(struct device
*dev
, u64 mask
)
251 struct dma_map_ops
*ops
= get_dma_ops(dev
);
254 if (mask
> 0xffffffff && forbid_dac
> 0) {
255 dev_info(dev
, "PCI: Disallowing DAC for device\n");
260 if (ops
->dma_supported
)
261 return ops
->dma_supported(dev
, mask
);
263 /* Copied from i386. Doesn't make much sense, because it will
264 only work for pci_alloc_coherent.
265 The caller just has to use GFP_DMA in this case. */
266 if (mask
< DMA_BIT_MASK(24))
269 /* Tell the device to use SAC when IOMMU force is on. This
270 allows the driver to use cheaper accesses in some cases.
272 Problem with this is that if we overflow the IOMMU area and
273 return DAC as fallback address the device may not handle it
276 As a special case some controllers have a 39bit address
277 mode that is as efficient as 32bit (aic79xx). Don't force
278 SAC for these. Assume all masks <= 40 bits are of this
279 type. Normally this doesn't make any difference, but gives
280 more gentle handling of IOMMU overflow. */
281 if (iommu_sac_force
&& (mask
>= DMA_BIT_MASK(40))) {
282 dev_info(dev
, "Force SAC with mask %Lx\n", mask
);
288 EXPORT_SYMBOL(dma_supported
);
290 static int __init
pci_iommu_init(void)
292 dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES
);
295 dma_debug_add_bus(&pci_bus_type
);
297 x86_init
.iommu
.iommu_init();
300 printk(KERN_INFO
"PCI-DMA: "
301 "Using software bounce buffering for IO (SWIOTLB)\n");
302 swiotlb_print_info();
308 /* Must execute after PCI subsystem */
309 rootfs_initcall(pci_iommu_init
);
312 /* Many VIA bridges seem to corrupt data for DAC. Disable it here */
314 static __devinit
void via_no_dac(struct pci_dev
*dev
)
316 if ((dev
->class >> 8) == PCI_CLASS_BRIDGE_PCI
&& forbid_dac
== 0) {
317 dev_info(&dev
->dev
, "disabling DAC on VIA PCI bridge\n");
321 DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA
, PCI_ANY_ID
, via_no_dac
);