1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright 2017 Thomas Gleixner <tglx@linutronix.de>
4 #include <linux/irqdomain.h>
6 #include <linux/uaccess.h>
10 static struct dentry
*irq_dir
;
12 struct irq_bit_descr
{
16 #define BIT_MASK_DESCR(m) { .mask = m, .name = #m }
18 static void irq_debug_show_bits(struct seq_file
*m
, int ind
, unsigned int state
,
19 const struct irq_bit_descr
*sd
, int size
)
23 for (i
= 0; i
< size
; i
++, sd
++) {
25 seq_printf(m
, "%*s%s\n", ind
+ 12, "", sd
->name
);
30 static void irq_debug_show_masks(struct seq_file
*m
, struct irq_desc
*desc
)
32 struct irq_data
*data
= irq_desc_get_irq_data(desc
);
35 msk
= irq_data_get_affinity_mask(data
);
36 seq_printf(m
, "affinity: %*pbl\n", cpumask_pr_args(msk
));
37 #ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
38 msk
= irq_data_get_effective_affinity_mask(data
);
39 seq_printf(m
, "effectiv: %*pbl\n", cpumask_pr_args(msk
));
41 #ifdef CONFIG_GENERIC_PENDING_IRQ
42 msk
= desc
->pending_mask
;
43 seq_printf(m
, "pending: %*pbl\n", cpumask_pr_args(msk
));
47 static void irq_debug_show_masks(struct seq_file
*m
, struct irq_desc
*desc
) { }
50 static const struct irq_bit_descr irqchip_flags
[] = {
51 BIT_MASK_DESCR(IRQCHIP_SET_TYPE_MASKED
),
52 BIT_MASK_DESCR(IRQCHIP_EOI_IF_HANDLED
),
53 BIT_MASK_DESCR(IRQCHIP_MASK_ON_SUSPEND
),
54 BIT_MASK_DESCR(IRQCHIP_ONOFFLINE_ENABLED
),
55 BIT_MASK_DESCR(IRQCHIP_SKIP_SET_WAKE
),
56 BIT_MASK_DESCR(IRQCHIP_ONESHOT_SAFE
),
57 BIT_MASK_DESCR(IRQCHIP_EOI_THREADED
),
58 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_LEVEL_MSI
),
59 BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI
),
63 irq_debug_show_chip(struct seq_file
*m
, struct irq_data
*data
, int ind
)
65 struct irq_chip
*chip
= data
->chip
;
68 seq_printf(m
, "chip: None\n");
71 seq_printf(m
, "%*schip: %s\n", ind
, "", chip
->name
);
72 seq_printf(m
, "%*sflags: 0x%lx\n", ind
+ 1, "", chip
->flags
);
73 irq_debug_show_bits(m
, ind
, chip
->flags
, irqchip_flags
,
74 ARRAY_SIZE(irqchip_flags
));
78 irq_debug_show_data(struct seq_file
*m
, struct irq_data
*data
, int ind
)
80 seq_printf(m
, "%*sdomain: %s\n", ind
, "",
81 data
->domain
? data
->domain
->name
: "");
82 seq_printf(m
, "%*shwirq: 0x%lx\n", ind
+ 1, "", data
->hwirq
);
83 irq_debug_show_chip(m
, data
, ind
+ 1);
84 if (data
->domain
&& data
->domain
->ops
&& data
->domain
->ops
->debug_show
)
85 data
->domain
->ops
->debug_show(m
, NULL
, data
, ind
+ 1);
86 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
87 if (!data
->parent_data
)
89 seq_printf(m
, "%*sparent:\n", ind
+ 1, "");
90 irq_debug_show_data(m
, data
->parent_data
, ind
+ 4);
94 static const struct irq_bit_descr irqdata_states
[] = {
95 BIT_MASK_DESCR(IRQ_TYPE_EDGE_RISING
),
96 BIT_MASK_DESCR(IRQ_TYPE_EDGE_FALLING
),
97 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_HIGH
),
98 BIT_MASK_DESCR(IRQ_TYPE_LEVEL_LOW
),
99 BIT_MASK_DESCR(IRQD_LEVEL
),
101 BIT_MASK_DESCR(IRQD_ACTIVATED
),
102 BIT_MASK_DESCR(IRQD_IRQ_STARTED
),
103 BIT_MASK_DESCR(IRQD_IRQ_DISABLED
),
104 BIT_MASK_DESCR(IRQD_IRQ_MASKED
),
105 BIT_MASK_DESCR(IRQD_IRQ_INPROGRESS
),
107 BIT_MASK_DESCR(IRQD_PER_CPU
),
108 BIT_MASK_DESCR(IRQD_NO_BALANCING
),
110 BIT_MASK_DESCR(IRQD_SINGLE_TARGET
),
111 BIT_MASK_DESCR(IRQD_MOVE_PCNTXT
),
112 BIT_MASK_DESCR(IRQD_AFFINITY_SET
),
113 BIT_MASK_DESCR(IRQD_SETAFFINITY_PENDING
),
114 BIT_MASK_DESCR(IRQD_AFFINITY_MANAGED
),
115 BIT_MASK_DESCR(IRQD_MANAGED_SHUTDOWN
),
116 BIT_MASK_DESCR(IRQD_CAN_RESERVE
),
117 BIT_MASK_DESCR(IRQD_MSI_NOMASK_QUIRK
),
119 BIT_MASK_DESCR(IRQD_FORWARDED_TO_VCPU
),
121 BIT_MASK_DESCR(IRQD_WAKEUP_STATE
),
122 BIT_MASK_DESCR(IRQD_WAKEUP_ARMED
),
125 static const struct irq_bit_descr irqdesc_states
[] = {
126 BIT_MASK_DESCR(_IRQ_NOPROBE
),
127 BIT_MASK_DESCR(_IRQ_NOREQUEST
),
128 BIT_MASK_DESCR(_IRQ_NOTHREAD
),
129 BIT_MASK_DESCR(_IRQ_NOAUTOEN
),
130 BIT_MASK_DESCR(_IRQ_NESTED_THREAD
),
131 BIT_MASK_DESCR(_IRQ_PER_CPU_DEVID
),
132 BIT_MASK_DESCR(_IRQ_IS_POLLED
),
133 BIT_MASK_DESCR(_IRQ_DISABLE_UNLAZY
),
136 static const struct irq_bit_descr irqdesc_istates
[] = {
137 BIT_MASK_DESCR(IRQS_AUTODETECT
),
138 BIT_MASK_DESCR(IRQS_SPURIOUS_DISABLED
),
139 BIT_MASK_DESCR(IRQS_POLL_INPROGRESS
),
140 BIT_MASK_DESCR(IRQS_ONESHOT
),
141 BIT_MASK_DESCR(IRQS_REPLAY
),
142 BIT_MASK_DESCR(IRQS_WAITING
),
143 BIT_MASK_DESCR(IRQS_PENDING
),
144 BIT_MASK_DESCR(IRQS_SUSPENDED
),
145 BIT_MASK_DESCR(IRQS_NMI
),
149 static int irq_debug_show(struct seq_file
*m
, void *p
)
151 struct irq_desc
*desc
= m
->private;
152 struct irq_data
*data
;
154 raw_spin_lock_irq(&desc
->lock
);
155 data
= irq_desc_get_irq_data(desc
);
156 seq_printf(m
, "handler: %ps\n", desc
->handle_irq
);
157 seq_printf(m
, "device: %s\n", desc
->dev_name
);
158 seq_printf(m
, "status: 0x%08x\n", desc
->status_use_accessors
);
159 irq_debug_show_bits(m
, 0, desc
->status_use_accessors
, irqdesc_states
,
160 ARRAY_SIZE(irqdesc_states
));
161 seq_printf(m
, "istate: 0x%08x\n", desc
->istate
);
162 irq_debug_show_bits(m
, 0, desc
->istate
, irqdesc_istates
,
163 ARRAY_SIZE(irqdesc_istates
));
164 seq_printf(m
, "ddepth: %u\n", desc
->depth
);
165 seq_printf(m
, "wdepth: %u\n", desc
->wake_depth
);
166 seq_printf(m
, "dstate: 0x%08x\n", irqd_get(data
));
167 irq_debug_show_bits(m
, 0, irqd_get(data
), irqdata_states
,
168 ARRAY_SIZE(irqdata_states
));
169 seq_printf(m
, "node: %d\n", irq_data_get_node(data
));
170 irq_debug_show_masks(m
, desc
);
171 irq_debug_show_data(m
, data
, 0);
172 raw_spin_unlock_irq(&desc
->lock
);
176 static int irq_debug_open(struct inode
*inode
, struct file
*file
)
178 return single_open(file
, irq_debug_show
, inode
->i_private
);
181 static ssize_t
irq_debug_write(struct file
*file
, const char __user
*user_buf
,
182 size_t count
, loff_t
*ppos
)
184 struct irq_desc
*desc
= file_inode(file
)->i_private
;
185 char buf
[8] = { 0, };
188 size
= min(sizeof(buf
) - 1, count
);
189 if (copy_from_user(buf
, user_buf
, size
))
192 if (!strncmp(buf
, "trigger", size
)) {
196 /* Try the HW interface first */
197 err
= irq_set_irqchip_state(irq_desc_get_irq(desc
),
198 IRQCHIP_STATE_PENDING
, true);
203 * Otherwise, try to inject via the resend interface,
204 * which may or may not succeed.
207 raw_spin_lock_irqsave(&desc
->lock
, flags
);
209 if (irq_settings_is_level(desc
) || desc
->istate
& IRQS_NMI
) {
210 /* Can't do level nor NMIs, sorry */
213 desc
->istate
|= IRQS_PENDING
;
214 check_irq_resend(desc
);
218 raw_spin_unlock_irqrestore(&desc
->lock
, flags
);
219 chip_bus_sync_unlock(desc
);
221 return err
? err
: count
;
227 static const struct file_operations dfs_irq_ops
= {
228 .open
= irq_debug_open
,
229 .write
= irq_debug_write
,
232 .release
= single_release
,
235 void irq_debugfs_copy_devname(int irq
, struct device
*dev
)
237 struct irq_desc
*desc
= irq_to_desc(irq
);
238 const char *name
= dev_name(dev
);
241 desc
->dev_name
= kstrdup(name
, GFP_KERNEL
);
244 void irq_add_debugfs_entry(unsigned int irq
, struct irq_desc
*desc
)
248 if (!irq_dir
|| !desc
|| desc
->debugfs_file
)
251 sprintf(name
, "%d", irq
);
252 desc
->debugfs_file
= debugfs_create_file(name
, 0644, irq_dir
, desc
,
256 static int __init
irq_debugfs_init(void)
258 struct dentry
*root_dir
;
261 root_dir
= debugfs_create_dir("irq", NULL
);
263 irq_domain_debugfs_init(root_dir
);
265 irq_dir
= debugfs_create_dir("irqs", root_dir
);
268 for_each_active_irq(irq
)
269 irq_add_debugfs_entry(irq
, irq_to_desc(irq
));
274 __initcall(irq_debugfs_init
);