1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __KVM_X86_PMU_H
3 #define __KVM_X86_PMU_H
5 #include <linux/nospec.h>
7 #define vcpu_to_pmu(vcpu) (&(vcpu)->arch.pmu)
8 #define pmu_to_vcpu(pmu) (container_of((pmu), struct kvm_vcpu, arch.pmu))
9 #define pmc_to_pmu(pmc) (&(pmc)->vcpu->arch.pmu)
11 /* retrieve the 4 bits for EN and PMI out of IA32_FIXED_CTR_CTRL */
12 #define fixed_ctrl_field(ctrl_reg, idx) (((ctrl_reg) >> ((idx)*4)) & 0xf)
14 #define VMWARE_BACKDOOR_PMC_HOST_TSC 0x10000
15 #define VMWARE_BACKDOOR_PMC_REAL_TIME 0x10001
16 #define VMWARE_BACKDOOR_PMC_APPARENT_TIME 0x10002
18 struct kvm_event_hw_type_mapping
{
25 unsigned (*find_arch_event
)(struct kvm_pmu
*pmu
, u8 event_select
,
27 unsigned (*find_fixed_event
)(int idx
);
28 bool (*pmc_is_enabled
)(struct kvm_pmc
*pmc
);
29 struct kvm_pmc
*(*pmc_idx_to_pmc
)(struct kvm_pmu
*pmu
, int pmc_idx
);
30 struct kvm_pmc
*(*rdpmc_ecx_to_pmc
)(struct kvm_vcpu
*vcpu
,
31 unsigned int idx
, u64
*mask
);
32 struct kvm_pmc
*(*msr_idx_to_pmc
)(struct kvm_vcpu
*vcpu
, u32 msr
);
33 int (*is_valid_rdpmc_ecx
)(struct kvm_vcpu
*vcpu
, unsigned int idx
);
34 bool (*is_valid_msr
)(struct kvm_vcpu
*vcpu
, u32 msr
);
35 int (*get_msr
)(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*data
);
36 int (*set_msr
)(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
);
37 void (*refresh
)(struct kvm_vcpu
*vcpu
);
38 void (*init
)(struct kvm_vcpu
*vcpu
);
39 void (*reset
)(struct kvm_vcpu
*vcpu
);
42 static inline u64
pmc_bitmask(struct kvm_pmc
*pmc
)
44 struct kvm_pmu
*pmu
= pmc_to_pmu(pmc
);
46 return pmu
->counter_bitmask
[pmc
->type
];
49 static inline u64
pmc_read_counter(struct kvm_pmc
*pmc
)
51 u64 counter
, enabled
, running
;
53 counter
= pmc
->counter
;
55 counter
+= perf_event_read_value(pmc
->perf_event
,
57 /* FIXME: Scaling needed? */
58 return counter
& pmc_bitmask(pmc
);
61 static inline void pmc_release_perf_event(struct kvm_pmc
*pmc
)
63 if (pmc
->perf_event
) {
64 perf_event_release_kernel(pmc
->perf_event
);
65 pmc
->perf_event
= NULL
;
66 pmc
->current_config
= 0;
67 pmc_to_pmu(pmc
)->event_count
--;
71 static inline void pmc_stop_counter(struct kvm_pmc
*pmc
)
73 if (pmc
->perf_event
) {
74 pmc
->counter
= pmc_read_counter(pmc
);
75 pmc_release_perf_event(pmc
);
79 static inline bool pmc_is_gp(struct kvm_pmc
*pmc
)
81 return pmc
->type
== KVM_PMC_GP
;
84 static inline bool pmc_is_fixed(struct kvm_pmc
*pmc
)
86 return pmc
->type
== KVM_PMC_FIXED
;
89 static inline bool pmc_is_enabled(struct kvm_pmc
*pmc
)
91 return kvm_x86_ops
.pmu_ops
->pmc_is_enabled(pmc
);
94 static inline bool kvm_valid_perf_global_ctrl(struct kvm_pmu
*pmu
,
97 return !(pmu
->global_ctrl_mask
& data
);
100 /* returns general purpose PMC with the specified MSR. Note that it can be
101 * used for both PERFCTRn and EVNTSELn; that is why it accepts base as a
102 * paramenter to tell them apart.
104 static inline struct kvm_pmc
*get_gp_pmc(struct kvm_pmu
*pmu
, u32 msr
,
107 if (msr
>= base
&& msr
< base
+ pmu
->nr_arch_gp_counters
) {
108 u32 index
= array_index_nospec(msr
- base
,
109 pmu
->nr_arch_gp_counters
);
111 return &pmu
->gp_counters
[index
];
117 /* returns fixed PMC with the specified MSR */
118 static inline struct kvm_pmc
*get_fixed_pmc(struct kvm_pmu
*pmu
, u32 msr
)
120 int base
= MSR_CORE_PERF_FIXED_CTR0
;
122 if (msr
>= base
&& msr
< base
+ pmu
->nr_arch_fixed_counters
) {
123 u32 index
= array_index_nospec(msr
- base
,
124 pmu
->nr_arch_fixed_counters
);
126 return &pmu
->fixed_counters
[index
];
132 static inline u64
get_sample_period(struct kvm_pmc
*pmc
, u64 counter_value
)
134 u64 sample_period
= (-counter_value
) & pmc_bitmask(pmc
);
137 sample_period
= pmc_bitmask(pmc
) + 1;
138 return sample_period
;
141 void reprogram_gp_counter(struct kvm_pmc
*pmc
, u64 eventsel
);
142 void reprogram_fixed_counter(struct kvm_pmc
*pmc
, u8 ctrl
, int fixed_idx
);
143 void reprogram_counter(struct kvm_pmu
*pmu
, int pmc_idx
);
145 void kvm_pmu_deliver_pmi(struct kvm_vcpu
*vcpu
);
146 void kvm_pmu_handle_event(struct kvm_vcpu
*vcpu
);
147 int kvm_pmu_rdpmc(struct kvm_vcpu
*vcpu
, unsigned pmc
, u64
*data
);
148 int kvm_pmu_is_valid_rdpmc_ecx(struct kvm_vcpu
*vcpu
, unsigned int idx
);
149 bool kvm_pmu_is_valid_msr(struct kvm_vcpu
*vcpu
, u32 msr
);
150 int kvm_pmu_get_msr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*data
);
151 int kvm_pmu_set_msr(struct kvm_vcpu
*vcpu
, struct msr_data
*msr_info
);
152 void kvm_pmu_refresh(struct kvm_vcpu
*vcpu
);
153 void kvm_pmu_reset(struct kvm_vcpu
*vcpu
);
154 void kvm_pmu_init(struct kvm_vcpu
*vcpu
);
155 void kvm_pmu_cleanup(struct kvm_vcpu
*vcpu
);
156 void kvm_pmu_destroy(struct kvm_vcpu
*vcpu
);
157 int kvm_vm_ioctl_set_pmu_event_filter(struct kvm
*kvm
, void __user
*argp
);
159 bool is_vmware_backdoor_pmc(u32 pmc_idx
);
161 extern struct kvm_pmu_ops intel_pmu_ops
;
162 extern struct kvm_pmu_ops amd_pmu_ops
;
163 #endif /* __KVM_X86_PMU_H */