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Revert "tty: hvc: Fix data abort due to race in hvc_open"
[linux/fpc-iii.git] / drivers / scsi / qla2xxx / qla_init.c
blobcaa6b840e459463a6cfa2e61745986f224bf7e6c
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include "qla_target.h"
21
22 /*
23 * QLogic ISP2x00 Hardware Support Function Prototypes.
24 */
25 static int qla2x00_isp_firmware(scsi_qla_host_t *);
26 static int qla2x00_setup_chip(scsi_qla_host_t *);
27 static int qla2x00_fw_ready(scsi_qla_host_t *);
28 static int qla2x00_configure_hba(scsi_qla_host_t *);
29 static int qla2x00_configure_loop(scsi_qla_host_t *);
30 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_fabric(scsi_qla_host_t *);
32 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
33 static int qla2x00_restart_isp(scsi_qla_host_t *);
34
35 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
36 static int qla84xx_init_chip(scsi_qla_host_t *);
37 static int qla25xx_init_queues(struct qla_hw_data *);
38 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
39 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha,
40 struct event_arg *ea);
41 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
42 struct event_arg *);
43 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
44
45 /* SRB Extensions ---------------------------------------------------------- */
46
47 void
48 qla2x00_sp_timeout(struct timer_list *t)
49 {
50 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
51 struct srb_iocb *iocb;
52
53 WARN_ON(irqs_disabled());
54 iocb = &sp->u.iocb_cmd;
55 iocb->timeout(sp);
56 }
57
58 void qla2x00_sp_free(srb_t *sp)
59 {
60 struct srb_iocb *iocb = &sp->u.iocb_cmd;
61
62 del_timer(&iocb->timer);
63 qla2x00_rel_sp(sp);
64 }
65
66 /* Asynchronous Login/Logout Routines -------------------------------------- */
67
68 unsigned long
69 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
70 {
71 unsigned long tmo;
72 struct qla_hw_data *ha = vha->hw;
73
74 /* Firmware should use switch negotiated r_a_tov for timeout. */
75 tmo = ha->r_a_tov / 10 * 2;
76 if (IS_QLAFX00(ha)) {
77 tmo = FX00_DEF_RATOV * 2;
78 } else if (!IS_FWI2_CAPABLE(ha)) {
79 /*
80 * Except for earlier ISPs where the timeout is seeded from the
81 * initialization control block.
82 */
83 tmo = ha->login_timeout;
84 }
85 return tmo;
86 }
87
88 static void qla24xx_abort_iocb_timeout(void *data)
89 {
90 srb_t *sp = data;
91 struct srb_iocb *abt = &sp->u.iocb_cmd;
92 struct qla_qpair *qpair = sp->qpair;
93 u32 handle;
94 unsigned long flags;
95
96 if (sp->cmd_sp)
97 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
98 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n",
99 sp->cmd_sp->handle, sp->cmd_sp->type,
100 sp->handle, sp->type);
101 else
102 ql_dbg(ql_dbg_async, sp->vha, 0x507c,
103 "Abort timeout 2 - hdl=%x, type=%x\n",
104 sp->handle, sp->type);
105
106 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
107 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) {
108 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] ==
109 sp->cmd_sp))
110 qpair->req->outstanding_cmds[handle] = NULL;
111
112 /* removing the abort */
113 if (qpair->req->outstanding_cmds[handle] == sp) {
114 qpair->req->outstanding_cmds[handle] = NULL;
115 break;
116 }
117 }
118 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
119
120 if (sp->cmd_sp)
121 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED);
122
123 abt->u.abt.comp_status = CS_TIMEOUT;
124 sp->done(sp, QLA_OS_TIMER_EXPIRED);
125 }
126
127 static void qla24xx_abort_sp_done(srb_t *sp, int res)
128 {
129 struct srb_iocb *abt = &sp->u.iocb_cmd;
130
131 del_timer(&sp->u.iocb_cmd.timer);
132 if (sp->flags & SRB_WAKEUP_ON_COMP)
133 complete(&abt->u.abt.comp);
134 else
135 sp->free(sp);
136 }
137
138 int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
139 {
140 scsi_qla_host_t *vha = cmd_sp->vha;
141 struct srb_iocb *abt_iocb;
142 srb_t *sp;
143 int rval = QLA_FUNCTION_FAILED;
144
145 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
146 GFP_ATOMIC);
147 if (!sp)
148 return rval;
149
150 abt_iocb = &sp->u.iocb_cmd;
151 sp->type = SRB_ABT_CMD;
152 sp->name = "abort";
153 sp->qpair = cmd_sp->qpair;
154 sp->cmd_sp = cmd_sp;
155 if (wait)
156 sp->flags = SRB_WAKEUP_ON_COMP;
157
158 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
159 init_completion(&abt_iocb->u.abt.comp);
160 /* FW can send 2 x ABTS's timeout/20s */
161 qla2x00_init_timer(sp, 42);
162
163 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
164 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
165
166 sp->done = qla24xx_abort_sp_done;
167
168 ql_dbg(ql_dbg_async, vha, 0x507c,
169 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle,
170 cmd_sp->type);
171
172 rval = qla2x00_start_sp(sp);
173 if (rval != QLA_SUCCESS) {
174 sp->free(sp);
175 return rval;
176 }
177
178 if (wait) {
179 wait_for_completion(&abt_iocb->u.abt.comp);
180 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
181 QLA_SUCCESS : QLA_FUNCTION_FAILED;
182 sp->free(sp);
183 }
184
185 return rval;
186 }
187
188 void
189 qla2x00_async_iocb_timeout(void *data)
190 {
191 srb_t *sp = data;
192 fc_port_t *fcport = sp->fcport;
193 struct srb_iocb *lio = &sp->u.iocb_cmd;
194 int rc, h;
195 unsigned long flags;
196
197 if (fcport) {
198 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
199 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
200 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
201
202 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
203 } else {
204 pr_info("Async-%s timeout - hdl=%x.\n",
205 sp->name, sp->handle);
206 }
207
208 switch (sp->type) {
209 case SRB_LOGIN_CMD:
210 rc = qla24xx_async_abort_cmd(sp, false);
211 if (rc) {
212 /* Retry as needed. */
213 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
214 lio->u.logio.data[1] =
215 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
216 QLA_LOGIO_LOGIN_RETRIED : 0;
217 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
218 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
219 h++) {
220 if (sp->qpair->req->outstanding_cmds[h] ==
221 sp) {
222 sp->qpair->req->outstanding_cmds[h] =
223 NULL;
224 break;
225 }
226 }
227 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
228 sp->done(sp, QLA_FUNCTION_TIMEOUT);
229 }
230 break;
231 case SRB_LOGOUT_CMD:
232 case SRB_CT_PTHRU_CMD:
233 case SRB_MB_IOCB:
234 case SRB_NACK_PLOGI:
235 case SRB_NACK_PRLI:
236 case SRB_NACK_LOGO:
237 case SRB_CTRL_VP:
238 default:
239 rc = qla24xx_async_abort_cmd(sp, false);
240 if (rc) {
241 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
242 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
243 h++) {
244 if (sp->qpair->req->outstanding_cmds[h] ==
245 sp) {
246 sp->qpair->req->outstanding_cmds[h] =
247 NULL;
248 break;
249 }
250 }
251 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
252 sp->done(sp, QLA_FUNCTION_TIMEOUT);
253 }
254 break;
255 }
256 }
257
258 static void qla2x00_async_login_sp_done(srb_t *sp, int res)
259 {
260 struct scsi_qla_host *vha = sp->vha;
261 struct srb_iocb *lio = &sp->u.iocb_cmd;
262 struct event_arg ea;
263
264 ql_dbg(ql_dbg_disc, vha, 0x20dd,
265 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
266
267 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
268
269 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
270 memset(&ea, 0, sizeof(ea));
271 ea.fcport = sp->fcport;
272 ea.data[0] = lio->u.logio.data[0];
273 ea.data[1] = lio->u.logio.data[1];
274 ea.iop[0] = lio->u.logio.iop[0];
275 ea.iop[1] = lio->u.logio.iop[1];
276 ea.sp = sp;
277 qla24xx_handle_plogi_done_event(vha, &ea);
278 }
279
280 sp->free(sp);
281 }
282
283 static inline bool
284 fcport_is_smaller(fc_port_t *fcport)
285 {
286 if (wwn_to_u64(fcport->port_name) <
287 wwn_to_u64(fcport->vha->port_name))
288 return true;
289 else
290 return false;
291 }
292
293 static inline bool
294 fcport_is_bigger(fc_port_t *fcport)
295 {
296 return !fcport_is_smaller(fcport);
297 }
298
299 int
300 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
301 uint16_t *data)
302 {
303 srb_t *sp;
304 struct srb_iocb *lio;
305 int rval = QLA_FUNCTION_FAILED;
306
307 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
308 fcport->loop_id == FC_NO_LOOP_ID) {
309 ql_log(ql_log_warn, vha, 0xffff,
310 "%s: %8phC - not sending command.\n",
311 __func__, fcport->port_name);
312 return rval;
313 }
314
315 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
316 if (!sp)
317 goto done;
318
319 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
320 fcport->flags |= FCF_ASYNC_SENT;
321 fcport->logout_completed = 0;
322
323 sp->type = SRB_LOGIN_CMD;
324 sp->name = "login";
325 sp->gen1 = fcport->rscn_gen;
326 sp->gen2 = fcport->login_gen;
327
328 lio = &sp->u.iocb_cmd;
329 lio->timeout = qla2x00_async_iocb_timeout;
330 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
331
332 sp->done = qla2x00_async_login_sp_done;
333 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
334 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
335 else
336 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
337
338 if (NVME_TARGET(vha->hw, fcport))
339 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
340
341 ql_dbg(ql_dbg_disc, vha, 0x2072,
342 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
343 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
344 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
345 fcport->login_retry);
346
347 rval = qla2x00_start_sp(sp);
348 if (rval != QLA_SUCCESS) {
349 fcport->flags |= FCF_LOGIN_NEEDED;
350 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
351 goto done_free_sp;
352 }
353
354 return rval;
355
356 done_free_sp:
357 sp->free(sp);
358 fcport->flags &= ~FCF_ASYNC_SENT;
359 done:
360 fcport->flags &= ~FCF_ASYNC_ACTIVE;
361 return rval;
362 }
363
364 static void qla2x00_async_logout_sp_done(srb_t *sp, int res)
365 {
366 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
367 sp->fcport->login_gen++;
368 qlt_logo_completion_handler(sp->fcport, res);
369 sp->free(sp);
370 }
371
372 int
373 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
374 {
375 srb_t *sp;
376 struct srb_iocb *lio;
377 int rval = QLA_FUNCTION_FAILED;
378
379 fcport->flags |= FCF_ASYNC_SENT;
380 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
381 if (!sp)
382 goto done;
383
384 sp->type = SRB_LOGOUT_CMD;
385 sp->name = "logout";
386
387 lio = &sp->u.iocb_cmd;
388 lio->timeout = qla2x00_async_iocb_timeout;
389 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
390
391 sp->done = qla2x00_async_logout_sp_done;
392
393 ql_dbg(ql_dbg_disc, vha, 0x2070,
394 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
395 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
396 fcport->d_id.b.area, fcport->d_id.b.al_pa,
397 fcport->port_name);
398
399 rval = qla2x00_start_sp(sp);
400 if (rval != QLA_SUCCESS)
401 goto done_free_sp;
402 return rval;
403
404 done_free_sp:
405 sp->free(sp);
406 done:
407 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
408 return rval;
409 }
410
411 void
412 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
413 uint16_t *data)
414 {
415 fcport->flags &= ~FCF_ASYNC_ACTIVE;
416 /* Don't re-login in target mode */
417 if (!fcport->tgt_session)
418 qla2x00_mark_device_lost(vha, fcport, 1);
419 qlt_logo_completion_handler(fcport, data[0]);
420 }
421
422 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res)
423 {
424 struct srb_iocb *lio = &sp->u.iocb_cmd;
425 struct scsi_qla_host *vha = sp->vha;
426
427 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
428 if (!test_bit(UNLOADING, &vha->dpc_flags))
429 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
430 lio->u.logio.data);
431 sp->free(sp);
432 }
433
434 int
435 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
436 {
437 srb_t *sp;
438 struct srb_iocb *lio;
439 int rval;
440
441 rval = QLA_FUNCTION_FAILED;
442 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
443 if (!sp)
444 goto done;
445
446 sp->type = SRB_PRLO_CMD;
447 sp->name = "prlo";
448
449 lio = &sp->u.iocb_cmd;
450 lio->timeout = qla2x00_async_iocb_timeout;
451 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
452
453 sp->done = qla2x00_async_prlo_sp_done;
454
455 ql_dbg(ql_dbg_disc, vha, 0x2070,
456 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
457 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
458 fcport->d_id.b.area, fcport->d_id.b.al_pa);
459
460 rval = qla2x00_start_sp(sp);
461 if (rval != QLA_SUCCESS)
462 goto done_free_sp;
463
464 return rval;
465
466 done_free_sp:
467 sp->free(sp);
468 done:
469 fcport->flags &= ~FCF_ASYNC_ACTIVE;
470 return rval;
471 }
472
473 static
474 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
475 {
476 struct fc_port *fcport = ea->fcport;
477
478 ql_dbg(ql_dbg_disc, vha, 0x20d2,
479 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
480 __func__, fcport->port_name, fcport->disc_state,
481 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
482 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
483
484 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
485 ea->data[0]);
486
487 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
488 ql_dbg(ql_dbg_disc, vha, 0x2066,
489 "%s %8phC: adisc fail: post delete\n",
490 __func__, ea->fcport->port_name);
491 /* deleted = 0 & logout_on_delete = force fw cleanup */
492 fcport->deleted = 0;
493 fcport->logout_on_delete = 1;
494 qlt_schedule_sess_for_deletion(ea->fcport);
495 return;
496 }
497
498 if (ea->fcport->disc_state == DSC_DELETE_PEND)
499 return;
500
501 if (ea->sp->gen2 != ea->fcport->login_gen) {
502 /* target side must have changed it. */
503 ql_dbg(ql_dbg_disc, vha, 0x20d3,
504 "%s %8phC generation changed\n",
505 __func__, ea->fcport->port_name);
506 return;
507 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
508 qla_rscn_replay(fcport);
509 qlt_schedule_sess_for_deletion(fcport);
510 return;
511 }
512
513 __qla24xx_handle_gpdb_event(vha, ea);
514 }
515
516 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
517 {
518 struct qla_work_evt *e;
519
520 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
521 if (!e)
522 return QLA_FUNCTION_FAILED;
523
524 e->u.fcport.fcport = fcport;
525 fcport->flags |= FCF_ASYNC_ACTIVE;
526 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_PEND);
527 return qla2x00_post_work(vha, e);
528 }
529
530 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res)
531 {
532 struct scsi_qla_host *vha = sp->vha;
533 struct event_arg ea;
534 struct srb_iocb *lio = &sp->u.iocb_cmd;
535
536 ql_dbg(ql_dbg_disc, vha, 0x2066,
537 "Async done-%s res %x %8phC\n",
538 sp->name, res, sp->fcport->port_name);
539
540 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
541
542 memset(&ea, 0, sizeof(ea));
543 ea.rc = res;
544 ea.data[0] = lio->u.logio.data[0];
545 ea.data[1] = lio->u.logio.data[1];
546 ea.iop[0] = lio->u.logio.iop[0];
547 ea.iop[1] = lio->u.logio.iop[1];
548 ea.fcport = sp->fcport;
549 ea.sp = sp;
550
551 qla24xx_handle_adisc_event(vha, &ea);
552
553 sp->free(sp);
554 }
555
556 int
557 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
558 uint16_t *data)
559 {
560 srb_t *sp;
561 struct srb_iocb *lio;
562 int rval = QLA_FUNCTION_FAILED;
563
564 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
565 return rval;
566
567 fcport->flags |= FCF_ASYNC_SENT;
568 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
569 if (!sp)
570 goto done;
571
572 sp->type = SRB_ADISC_CMD;
573 sp->name = "adisc";
574
575 lio = &sp->u.iocb_cmd;
576 lio->timeout = qla2x00_async_iocb_timeout;
577 sp->gen1 = fcport->rscn_gen;
578 sp->gen2 = fcport->login_gen;
579 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
580
581 sp->done = qla2x00_async_adisc_sp_done;
582 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
583 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
584
585 ql_dbg(ql_dbg_disc, vha, 0x206f,
586 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
587 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
588
589 rval = qla2x00_start_sp(sp);
590 if (rval != QLA_SUCCESS)
591 goto done_free_sp;
592
593 return rval;
594
595 done_free_sp:
596 sp->free(sp);
597 done:
598 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
599 qla2x00_post_async_adisc_work(vha, fcport, data);
600 return rval;
601 }
602
603 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id)
604 {
605 struct qla_hw_data *ha = vha->hw;
606
607 if (IS_FWI2_CAPABLE(ha))
608 return loop_id > NPH_LAST_HANDLE;
609
610 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) ||
611 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST;
612 }
613
614 /**
615 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID
616 * @vha: adapter state pointer.
617 * @dev: port structure pointer.
618 *
619 * Returns:
620 * qla2x00 local function return status code.
621 *
622 * Context:
623 * Kernel context.
624 */
625 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
626 {
627 int rval;
628 struct qla_hw_data *ha = vha->hw;
629 unsigned long flags = 0;
630
631 rval = QLA_SUCCESS;
632
633 spin_lock_irqsave(&ha->vport_slock, flags);
634
635 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE);
636 if (dev->loop_id >= LOOPID_MAP_SIZE ||
637 qla2x00_is_reserved_id(vha, dev->loop_id)) {
638 dev->loop_id = FC_NO_LOOP_ID;
639 rval = QLA_FUNCTION_FAILED;
640 } else {
641 set_bit(dev->loop_id, ha->loop_id_map);
642 }
643 spin_unlock_irqrestore(&ha->vport_slock, flags);
644
645 if (rval == QLA_SUCCESS)
646 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
647 "Assigning new loopid=%x, portid=%x.\n",
648 dev->loop_id, dev->d_id.b24);
649 else
650 ql_log(ql_log_warn, dev->vha, 0x2087,
651 "No loop_id's available, portid=%x.\n",
652 dev->d_id.b24);
653
654 return rval;
655 }
656
657 void qla2x00_clear_loop_id(fc_port_t *fcport)
658 {
659 struct qla_hw_data *ha = fcport->vha->hw;
660
661 if (fcport->loop_id == FC_NO_LOOP_ID ||
662 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id))
663 return;
664
665 clear_bit(fcport->loop_id, ha->loop_id_map);
666 fcport->loop_id = FC_NO_LOOP_ID;
667 }
668
669 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
670 struct event_arg *ea)
671 {
672 fc_port_t *fcport, *conflict_fcport;
673 struct get_name_list_extended *e;
674 u16 i, n, found = 0, loop_id;
675 port_id_t id;
676 u64 wwn;
677 u16 data[2];
678 u8 current_login_state, nvme_cls;
679
680 fcport = ea->fcport;
681 ql_dbg(ql_dbg_disc, vha, 0xffff,
682 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
683 __func__, fcport->port_name, fcport->disc_state,
684 fcport->fw_login_state, ea->rc,
685 fcport->login_gen, fcport->last_login_gen,
686 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
687
688 if (fcport->disc_state == DSC_DELETE_PEND)
689 return;
690
691 if (ea->rc) { /* rval */
692 if (fcport->login_retry == 0) {
693 ql_dbg(ql_dbg_disc, vha, 0x20de,
694 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
695 fcport->port_name, fcport->login_retry);
696 }
697 return;
698 }
699
700 if (fcport->last_rscn_gen != fcport->rscn_gen) {
701 qla_rscn_replay(fcport);
702 qlt_schedule_sess_for_deletion(fcport);
703 return;
704 } else if (fcport->last_login_gen != fcport->login_gen) {
705 ql_dbg(ql_dbg_disc, vha, 0x20e0,
706 "%s %8phC login gen changed\n",
707 __func__, fcport->port_name);
708 return;
709 }
710
711 n = ea->data[0] / sizeof(struct get_name_list_extended);
712
713 ql_dbg(ql_dbg_disc, vha, 0x20e1,
714 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
715 __func__, __LINE__, fcport->port_name, n,
716 fcport->d_id.b.domain, fcport->d_id.b.area,
717 fcport->d_id.b.al_pa, fcport->loop_id);
718
719 for (i = 0; i < n; i++) {
720 e = &vha->gnl.l[i];
721 wwn = wwn_to_u64(e->port_name);
722 id.b.domain = e->port_id[2];
723 id.b.area = e->port_id[1];
724 id.b.al_pa = e->port_id[0];
725 id.b.rsvd_1 = 0;
726
727 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
728 continue;
729
730 if (IS_SW_RESV_ADDR(id))
731 continue;
732
733 found = 1;
734
735 loop_id = le16_to_cpu(e->nport_handle);
736 loop_id = (loop_id & 0x7fff);
737 nvme_cls = e->current_login_state >> 4;
738 current_login_state = e->current_login_state & 0xf;
739
740 if (PRLI_PHASE(nvme_cls)) {
741 current_login_state = nvme_cls;
742 fcport->fc4_type &= ~FS_FC4TYPE_FCP;
743 fcport->fc4_type |= FS_FC4TYPE_NVME;
744 } else if (PRLI_PHASE(current_login_state)) {
745 fcport->fc4_type |= FS_FC4TYPE_FCP;
746 fcport->fc4_type &= ~FS_FC4TYPE_NVME;
747 }
748
749 ql_dbg(ql_dbg_disc, vha, 0x20e2,
750 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n",
751 __func__, fcport->port_name,
752 e->current_login_state, fcport->fw_login_state,
753 fcport->fc4_type, id.b24, fcport->d_id.b24,
754 loop_id, fcport->loop_id);
755
756 switch (fcport->disc_state) {
757 case DSC_DELETE_PEND:
758 case DSC_DELETED:
759 break;
760 default:
761 if ((id.b24 != fcport->d_id.b24 &&
762 fcport->d_id.b24 &&
763 fcport->loop_id != FC_NO_LOOP_ID) ||
764 (fcport->loop_id != FC_NO_LOOP_ID &&
765 fcport->loop_id != loop_id)) {
766 ql_dbg(ql_dbg_disc, vha, 0x20e3,
767 "%s %d %8phC post del sess\n",
768 __func__, __LINE__, fcport->port_name);
769 if (fcport->n2n_flag)
770 fcport->d_id.b24 = 0;
771 qlt_schedule_sess_for_deletion(fcport);
772 return;
773 }
774 break;
775 }
776
777 fcport->loop_id = loop_id;
778 if (fcport->n2n_flag)
779 fcport->d_id.b24 = id.b24;
780
781 wwn = wwn_to_u64(fcport->port_name);
782 qlt_find_sess_invalidate_other(vha, wwn,
783 id, loop_id, &conflict_fcport);
784
785 if (conflict_fcport) {
786 /*
787 * Another share fcport share the same loop_id &
788 * nport id. Conflict fcport needs to finish
789 * cleanup before this fcport can proceed to login.
790 */
791 conflict_fcport->conflict = fcport;
792 fcport->login_pause = 1;
793 }
794
795 switch (vha->hw->current_topology) {
796 default:
797 switch (current_login_state) {
798 case DSC_LS_PRLI_COMP:
799 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
800 vha, 0x20e4, "%s %d %8phC post gpdb\n",
801 __func__, __LINE__, fcport->port_name);
802
803 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
804 fcport->port_type = FCT_INITIATOR;
805 else
806 fcport->port_type = FCT_TARGET;
807 data[0] = data[1] = 0;
808 qla2x00_post_async_adisc_work(vha, fcport,
809 data);
810 break;
811 case DSC_LS_PORT_UNAVAIL:
812 default:
813 if (fcport->loop_id == FC_NO_LOOP_ID) {
814 qla2x00_find_new_loop_id(vha, fcport);
815 fcport->fw_login_state =
816 DSC_LS_PORT_UNAVAIL;
817 }
818 ql_dbg(ql_dbg_disc, vha, 0x20e5,
819 "%s %d %8phC\n", __func__, __LINE__,
820 fcport->port_name);
821 qla24xx_fcport_handle_login(vha, fcport);
822 break;
823 }
824 break;
825 case ISP_CFG_N:
826 fcport->fw_login_state = current_login_state;
827 fcport->d_id = id;
828 switch (current_login_state) {
829 case DSC_LS_PRLI_PEND:
830 /*
831 * In the middle of PRLI. Let it finish.
832 * Allow relogin code to recheck state again
833 * with GNL. Push disc_state back to DELETED
834 * so GNL can go out again
835 */
836 qla2x00_set_fcport_disc_state(fcport,
837 DSC_DELETED);
838 break;
839 case DSC_LS_PRLI_COMP:
840 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
841 fcport->port_type = FCT_INITIATOR;
842 else
843 fcport->port_type = FCT_TARGET;
844
845 data[0] = data[1] = 0;
846 qla2x00_post_async_adisc_work(vha, fcport,
847 data);
848 break;
849 case DSC_LS_PLOGI_COMP:
850 if (fcport_is_bigger(fcport)) {
851 /* local adapter is smaller */
852 if (fcport->loop_id != FC_NO_LOOP_ID)
853 qla2x00_clear_loop_id(fcport);
854
855 fcport->loop_id = loop_id;
856 qla24xx_fcport_handle_login(vha,
857 fcport);
858 break;
859 }
860 /* fall through */
861 default:
862 if (fcport_is_smaller(fcport)) {
863 /* local adapter is bigger */
864 if (fcport->loop_id != FC_NO_LOOP_ID)
865 qla2x00_clear_loop_id(fcport);
866
867 fcport->loop_id = loop_id;
868 qla24xx_fcport_handle_login(vha,
869 fcport);
870 }
871 break;
872 }
873 break;
874 } /* switch (ha->current_topology) */
875 }
876
877 if (!found) {
878 switch (vha->hw->current_topology) {
879 case ISP_CFG_F:
880 case ISP_CFG_FL:
881 for (i = 0; i < n; i++) {
882 e = &vha->gnl.l[i];
883 id.b.domain = e->port_id[0];
884 id.b.area = e->port_id[1];
885 id.b.al_pa = e->port_id[2];
886 id.b.rsvd_1 = 0;
887 loop_id = le16_to_cpu(e->nport_handle);
888
889 if (fcport->d_id.b24 == id.b24) {
890 conflict_fcport =
891 qla2x00_find_fcport_by_wwpn(vha,
892 e->port_name, 0);
893 if (conflict_fcport) {
894 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
895 vha, 0x20e5,
896 "%s %d %8phC post del sess\n",
897 __func__, __LINE__,
898 conflict_fcport->port_name);
899 qlt_schedule_sess_for_deletion
900 (conflict_fcport);
901 }
902 }
903 /*
904 * FW already picked this loop id for
905 * another fcport
906 */
907 if (fcport->loop_id == loop_id)
908 fcport->loop_id = FC_NO_LOOP_ID;
909 }
910 qla24xx_fcport_handle_login(vha, fcport);
911 break;
912 case ISP_CFG_N:
913 qla2x00_set_fcport_disc_state(fcport, DSC_DELETED);
914 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
915 if (fcport->n2n_link_reset_cnt < 2) {
916 fcport->n2n_link_reset_cnt++;
917 /*
918 * remote port is not sending PLOGI.
919 * Reset link to kick start his state
920 * machine
921 */
922 set_bit(N2N_LINK_RESET,
923 &vha->dpc_flags);
924 } else {
925 if (fcport->n2n_chip_reset < 1) {
926 ql_log(ql_log_info, vha, 0x705d,
927 "Chip reset to bring laser down");
928 set_bit(ISP_ABORT_NEEDED,
929 &vha->dpc_flags);
930 fcport->n2n_chip_reset++;
931 } else {
932 ql_log(ql_log_info, vha, 0x705d,
933 "Remote port %8ph is not coming back\n",
934 fcport->port_name);
935 fcport->scan_state = 0;
936 }
937 }
938 qla2xxx_wake_dpc(vha);
939 } else {
940 /*
941 * report port suppose to do PLOGI. Give him
942 * more time. FW will catch it.
943 */
944 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
945 }
946 break;
947 default:
948 break;
949 }
950 }
951 } /* gnl_event */
952
953 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res)
954 {
955 struct scsi_qla_host *vha = sp->vha;
956 unsigned long flags;
957 struct fc_port *fcport = NULL, *tf;
958 u16 i, n = 0, loop_id;
959 struct event_arg ea;
960 struct get_name_list_extended *e;
961 u64 wwn;
962 struct list_head h;
963 bool found = false;
964
965 ql_dbg(ql_dbg_disc, vha, 0x20e7,
966 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
967 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
968 sp->u.iocb_cmd.u.mbx.in_mb[2]);
969
970 if (res == QLA_FUNCTION_TIMEOUT)
971 return;
972
973 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
974 memset(&ea, 0, sizeof(ea));
975 ea.sp = sp;
976 ea.rc = res;
977
978 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
979 sizeof(struct get_name_list_extended)) {
980 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
981 sizeof(struct get_name_list_extended);
982 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
983 }
984
985 for (i = 0; i < n; i++) {
986 e = &vha->gnl.l[i];
987 loop_id = le16_to_cpu(e->nport_handle);
988 /* mask out reserve bit */
989 loop_id = (loop_id & 0x7fff);
990 set_bit(loop_id, vha->hw->loop_id_map);
991 wwn = wwn_to_u64(e->port_name);
992
993 ql_dbg(ql_dbg_disc, vha, 0x20e8,
994 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n",
995 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
996 e->port_id[0], e->current_login_state, e->last_login_state,
997 (loop_id & 0x7fff));
998 }
999
1000 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1001
1002 INIT_LIST_HEAD(&h);
1003 fcport = tf = NULL;
1004 if (!list_empty(&vha->gnl.fcports))
1005 list_splice_init(&vha->gnl.fcports, &h);
1006 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1007
1008 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
1009 list_del_init(&fcport->gnl_entry);
1010 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1011 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1012 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1013 ea.fcport = fcport;
1014
1015 qla24xx_handle_gnl_done_event(vha, &ea);
1016 }
1017
1018 /* create new fcport if fw has knowledge of new sessions */
1019 for (i = 0; i < n; i++) {
1020 port_id_t id;
1021 u64 wwnn;
1022
1023 e = &vha->gnl.l[i];
1024 wwn = wwn_to_u64(e->port_name);
1025
1026 found = false;
1027 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
1028 if (!memcmp((u8 *)&wwn, fcport->port_name,
1029 WWN_SIZE)) {
1030 found = true;
1031 break;
1032 }
1033 }
1034
1035 id.b.domain = e->port_id[2];
1036 id.b.area = e->port_id[1];
1037 id.b.al_pa = e->port_id[0];
1038 id.b.rsvd_1 = 0;
1039
1040 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
1041 ql_dbg(ql_dbg_disc, vha, 0x2065,
1042 "%s %d %8phC %06x post new sess\n",
1043 __func__, __LINE__, (u8 *)&wwn, id.b24);
1044 wwnn = wwn_to_u64(e->node_name);
1045 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
1046 (u8 *)&wwnn, NULL, 0);
1047 }
1048 }
1049
1050 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1051 vha->gnl.sent = 0;
1052 if (!list_empty(&vha->gnl.fcports)) {
1053 /* retrigger gnl */
1054 list_for_each_entry_safe(fcport, tf, &vha->gnl.fcports,
1055 gnl_entry) {
1056 list_del_init(&fcport->gnl_entry);
1057 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1058 if (qla24xx_post_gnl_work(vha, fcport) == QLA_SUCCESS)
1059 break;
1060 }
1061 }
1062 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1063
1064 sp->free(sp);
1065 }
1066
1067 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
1068 {
1069 srb_t *sp;
1070 struct srb_iocb *mbx;
1071 int rval = QLA_FUNCTION_FAILED;
1072 unsigned long flags;
1073 u16 *mb;
1074
1075 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1076 return rval;
1077
1078 ql_dbg(ql_dbg_disc, vha, 0x20d9,
1079 "Async-gnlist WWPN %8phC \n", fcport->port_name);
1080
1081 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1082 fcport->flags |= FCF_ASYNC_SENT;
1083 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1084 fcport->last_rscn_gen = fcport->rscn_gen;
1085 fcport->last_login_gen = fcport->login_gen;
1086
1087 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1088 if (vha->gnl.sent) {
1089 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1090 return QLA_SUCCESS;
1091 }
1092 vha->gnl.sent = 1;
1093 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1094
1095 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1096 if (!sp)
1097 goto done;
1098
1099 sp->type = SRB_MB_IOCB;
1100 sp->name = "gnlist";
1101 sp->gen1 = fcport->rscn_gen;
1102 sp->gen2 = fcport->login_gen;
1103
1104 mbx = &sp->u.iocb_cmd;
1105 mbx->timeout = qla2x00_async_iocb_timeout;
1106 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
1107
1108 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1109 mb[0] = MBC_PORT_NODE_NAME_LIST;
1110 mb[1] = BIT_2 | BIT_3;
1111 mb[2] = MSW(vha->gnl.ldma);
1112 mb[3] = LSW(vha->gnl.ldma);
1113 mb[6] = MSW(MSD(vha->gnl.ldma));
1114 mb[7] = LSW(MSD(vha->gnl.ldma));
1115 mb[8] = vha->gnl.size;
1116 mb[9] = vha->vp_idx;
1117
1118 sp->done = qla24xx_async_gnl_sp_done;
1119
1120 ql_dbg(ql_dbg_disc, vha, 0x20da,
1121 "Async-%s - OUT WWPN %8phC hndl %x\n",
1122 sp->name, fcport->port_name, sp->handle);
1123
1124 rval = qla2x00_start_sp(sp);
1125 if (rval != QLA_SUCCESS)
1126 goto done_free_sp;
1127
1128 return rval;
1129
1130 done_free_sp:
1131 sp->free(sp);
1132 done:
1133 fcport->flags &= ~(FCF_ASYNC_ACTIVE | FCF_ASYNC_SENT);
1134 return rval;
1135 }
1136
1137 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1138 {
1139 struct qla_work_evt *e;
1140
1141 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
1142 if (!e)
1143 return QLA_FUNCTION_FAILED;
1144
1145 e->u.fcport.fcport = fcport;
1146 fcport->flags |= FCF_ASYNC_ACTIVE;
1147 return qla2x00_post_work(vha, e);
1148 }
1149
1150 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res)
1151 {
1152 struct scsi_qla_host *vha = sp->vha;
1153 struct qla_hw_data *ha = vha->hw;
1154 fc_port_t *fcport = sp->fcport;
1155 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
1156 struct event_arg ea;
1157
1158 ql_dbg(ql_dbg_disc, vha, 0x20db,
1159 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
1160 sp->name, res, fcport->port_name, mb[1], mb[2]);
1161
1162 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1163
1164 if (res == QLA_FUNCTION_TIMEOUT)
1165 goto done;
1166
1167 memset(&ea, 0, sizeof(ea));
1168 ea.fcport = fcport;
1169 ea.sp = sp;
1170
1171 qla24xx_handle_gpdb_event(vha, &ea);
1172
1173 done:
1174 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1175 sp->u.iocb_cmd.u.mbx.in_dma);
1176
1177 sp->free(sp);
1178 }
1179
1180 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1181 {
1182 struct qla_work_evt *e;
1183
1184 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1185 if (!e)
1186 return QLA_FUNCTION_FAILED;
1187
1188 e->u.fcport.fcport = fcport;
1189
1190 return qla2x00_post_work(vha, e);
1191 }
1192
1193 static void qla2x00_async_prli_sp_done(srb_t *sp, int res)
1194 {
1195 struct scsi_qla_host *vha = sp->vha;
1196 struct srb_iocb *lio = &sp->u.iocb_cmd;
1197 struct event_arg ea;
1198
1199 ql_dbg(ql_dbg_disc, vha, 0x2129,
1200 "%s %8phC res %d \n", __func__,
1201 sp->fcport->port_name, res);
1202
1203 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1204
1205 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1206 memset(&ea, 0, sizeof(ea));
1207 ea.fcport = sp->fcport;
1208 ea.data[0] = lio->u.logio.data[0];
1209 ea.data[1] = lio->u.logio.data[1];
1210 ea.iop[0] = lio->u.logio.iop[0];
1211 ea.iop[1] = lio->u.logio.iop[1];
1212 ea.sp = sp;
1213
1214 qla24xx_handle_prli_done_event(vha, &ea);
1215 }
1216
1217 sp->free(sp);
1218 }
1219
1220 int
1221 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1222 {
1223 srb_t *sp;
1224 struct srb_iocb *lio;
1225 int rval = QLA_FUNCTION_FAILED;
1226
1227 if (!vha->flags.online) {
1228 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1229 __func__, __LINE__, fcport->port_name);
1230 return rval;
1231 }
1232
1233 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1234 fcport->fw_login_state == DSC_LS_PRLI_PEND) &&
1235 qla_dual_mode_enabled(vha)) {
1236 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s %d %8phC exit\n",
1237 __func__, __LINE__, fcport->port_name);
1238 return rval;
1239 }
1240
1241 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1242 if (!sp)
1243 return rval;
1244
1245 fcport->flags |= FCF_ASYNC_SENT;
1246 fcport->logout_completed = 0;
1247
1248 sp->type = SRB_PRLI_CMD;
1249 sp->name = "prli";
1250
1251 lio = &sp->u.iocb_cmd;
1252 lio->timeout = qla2x00_async_iocb_timeout;
1253 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1254
1255 sp->done = qla2x00_async_prli_sp_done;
1256 lio->u.logio.flags = 0;
1257
1258 if (NVME_TARGET(vha->hw, fcport))
1259 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1260
1261 ql_dbg(ql_dbg_disc, vha, 0x211b,
1262 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1263 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1264 fcport->login_retry, NVME_TARGET(vha->hw, fcport) ? "nvme" : "fc");
1265
1266 rval = qla2x00_start_sp(sp);
1267 if (rval != QLA_SUCCESS) {
1268 fcport->flags |= FCF_LOGIN_NEEDED;
1269 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1270 goto done_free_sp;
1271 }
1272
1273 return rval;
1274
1275 done_free_sp:
1276 sp->free(sp);
1277 fcport->flags &= ~FCF_ASYNC_SENT;
1278 return rval;
1279 }
1280
1281 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1282 {
1283 struct qla_work_evt *e;
1284
1285 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1286 if (!e)
1287 return QLA_FUNCTION_FAILED;
1288
1289 e->u.fcport.fcport = fcport;
1290 e->u.fcport.opt = opt;
1291 fcport->flags |= FCF_ASYNC_ACTIVE;
1292 return qla2x00_post_work(vha, e);
1293 }
1294
1295 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1296 {
1297 srb_t *sp;
1298 struct srb_iocb *mbx;
1299 int rval = QLA_FUNCTION_FAILED;
1300 u16 *mb;
1301 dma_addr_t pd_dma;
1302 struct port_database_24xx *pd;
1303 struct qla_hw_data *ha = vha->hw;
1304
1305 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
1306 fcport->loop_id == FC_NO_LOOP_ID) {
1307 ql_log(ql_log_warn, vha, 0xffff,
1308 "%s: %8phC - not sending command.\n",
1309 __func__, fcport->port_name);
1310 return rval;
1311 }
1312
1313 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1314 if (!sp)
1315 goto done;
1316
1317 qla2x00_set_fcport_disc_state(fcport, DSC_GPDB);
1318
1319 fcport->flags |= FCF_ASYNC_SENT;
1320 sp->type = SRB_MB_IOCB;
1321 sp->name = "gpdb";
1322 sp->gen1 = fcport->rscn_gen;
1323 sp->gen2 = fcport->login_gen;
1324
1325 mbx = &sp->u.iocb_cmd;
1326 mbx->timeout = qla2x00_async_iocb_timeout;
1327 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1328
1329 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1330 if (pd == NULL) {
1331 ql_log(ql_log_warn, vha, 0xd043,
1332 "Failed to allocate port database structure.\n");
1333 goto done_free_sp;
1334 }
1335
1336 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1337 mb[0] = MBC_GET_PORT_DATABASE;
1338 mb[1] = fcport->loop_id;
1339 mb[2] = MSW(pd_dma);
1340 mb[3] = LSW(pd_dma);
1341 mb[6] = MSW(MSD(pd_dma));
1342 mb[7] = LSW(MSD(pd_dma));
1343 mb[9] = vha->vp_idx;
1344 mb[10] = opt;
1345
1346 mbx->u.mbx.in = (void *)pd;
1347 mbx->u.mbx.in_dma = pd_dma;
1348
1349 sp->done = qla24xx_async_gpdb_sp_done;
1350
1351 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1352 "Async-%s %8phC hndl %x opt %x\n",
1353 sp->name, fcport->port_name, sp->handle, opt);
1354
1355 rval = qla2x00_start_sp(sp);
1356 if (rval != QLA_SUCCESS)
1357 goto done_free_sp;
1358 return rval;
1359
1360 done_free_sp:
1361 if (pd)
1362 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1363
1364 sp->free(sp);
1365 fcport->flags &= ~FCF_ASYNC_SENT;
1366 done:
1367 fcport->flags &= ~FCF_ASYNC_ACTIVE;
1368 qla24xx_post_gpdb_work(vha, fcport, opt);
1369 return rval;
1370 }
1371
1372 static
1373 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1374 {
1375 unsigned long flags;
1376
1377 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1378 ea->fcport->login_gen++;
1379 ea->fcport->deleted = 0;
1380 ea->fcport->logout_on_delete = 1;
1381
1382 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1383 vha->fcport_count++;
1384 ea->fcport->login_succ = 1;
1385
1386 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1387 qla24xx_sched_upd_fcport(ea->fcport);
1388 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1389 } else if (ea->fcport->login_succ) {
1390 /*
1391 * We have an existing session. A late RSCN delivery
1392 * must have triggered the session to be re-validate.
1393 * Session is still valid.
1394 */
1395 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1396 "%s %d %8phC session revalidate success\n",
1397 __func__, __LINE__, ea->fcport->port_name);
1398 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_COMPLETE);
1399 }
1400 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1401 }
1402
1403 static
1404 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1405 {
1406 fc_port_t *fcport = ea->fcport;
1407 struct port_database_24xx *pd;
1408 struct srb *sp = ea->sp;
1409 uint8_t ls;
1410
1411 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1412
1413 fcport->flags &= ~FCF_ASYNC_SENT;
1414
1415 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1416 "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__,
1417 fcport->port_name, fcport->disc_state, pd->current_login_state,
1418 fcport->fc4_type, ea->rc);
1419
1420 if (fcport->disc_state == DSC_DELETE_PEND)
1421 return;
1422
1423 if (NVME_TARGET(vha->hw, fcport))
1424 ls = pd->current_login_state >> 4;
1425 else
1426 ls = pd->current_login_state & 0xf;
1427
1428 if (ea->sp->gen2 != fcport->login_gen) {
1429 /* target side must have changed it. */
1430
1431 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1432 "%s %8phC generation changed\n",
1433 __func__, fcport->port_name);
1434 return;
1435 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1436 qla_rscn_replay(fcport);
1437 qlt_schedule_sess_for_deletion(fcport);
1438 return;
1439 }
1440
1441 switch (ls) {
1442 case PDS_PRLI_COMPLETE:
1443 __qla24xx_parse_gpdb(vha, fcport, pd);
1444 break;
1445 case PDS_PLOGI_PENDING:
1446 case PDS_PLOGI_COMPLETE:
1447 case PDS_PRLI_PENDING:
1448 case PDS_PRLI2_PENDING:
1449 /* Set discovery state back to GNL to Relogin attempt */
1450 if (qla_dual_mode_enabled(vha) ||
1451 qla_ini_mode_enabled(vha)) {
1452 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
1453 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1454 }
1455 return;
1456 case PDS_LOGO_PENDING:
1457 case PDS_PORT_UNAVAILABLE:
1458 default:
1459 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1460 __func__, __LINE__, fcport->port_name);
1461 qlt_schedule_sess_for_deletion(fcport);
1462 return;
1463 }
1464 __qla24xx_handle_gpdb_event(vha, ea);
1465 } /* gpdb event */
1466
1467 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1468 {
1469 u8 login = 0;
1470 int rc;
1471
1472 if (qla_tgt_mode_enabled(vha))
1473 return;
1474
1475 if (qla_dual_mode_enabled(vha)) {
1476 if (N2N_TOPO(vha->hw)) {
1477 u64 mywwn, wwn;
1478
1479 mywwn = wwn_to_u64(vha->port_name);
1480 wwn = wwn_to_u64(fcport->port_name);
1481 if (mywwn > wwn)
1482 login = 1;
1483 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1484 && time_after_eq(jiffies,
1485 fcport->plogi_nack_done_deadline))
1486 login = 1;
1487 } else {
1488 login = 1;
1489 }
1490 } else {
1491 /* initiator mode */
1492 login = 1;
1493 }
1494
1495 if (login && fcport->login_retry) {
1496 fcport->login_retry--;
1497 if (fcport->loop_id == FC_NO_LOOP_ID) {
1498 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1499 rc = qla2x00_find_new_loop_id(vha, fcport);
1500 if (rc) {
1501 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1502 "%s %d %8phC post del sess - out of loopid\n",
1503 __func__, __LINE__, fcport->port_name);
1504 fcport->scan_state = 0;
1505 qlt_schedule_sess_for_deletion(fcport);
1506 return;
1507 }
1508 }
1509 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1510 "%s %d %8phC post login\n",
1511 __func__, __LINE__, fcport->port_name);
1512 qla2x00_post_async_login_work(vha, fcport, NULL);
1513 }
1514 }
1515
1516 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1517 {
1518 u16 data[2];
1519 u64 wwn;
1520 u16 sec;
1521
1522 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1523 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
1524 __func__, fcport->port_name, fcport->disc_state,
1525 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1526 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1527 fcport->login_gen, fcport->loop_id, fcport->scan_state);
1528
1529 if (fcport->scan_state != QLA_FCPORT_FOUND)
1530 return 0;
1531
1532 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1533 qla_dual_mode_enabled(vha) &&
1534 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1535 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1536 return 0;
1537
1538 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP &&
1539 !N2N_TOPO(vha->hw)) {
1540 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1541 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1542 return 0;
1543 }
1544 }
1545
1546 /* Target won't initiate port login if fabric is present */
1547 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw))
1548 return 0;
1549
1550 if (fcport->flags & FCF_ASYNC_SENT) {
1551 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1552 return 0;
1553 }
1554
1555 switch (fcport->disc_state) {
1556 case DSC_DELETED:
1557 wwn = wwn_to_u64(fcport->node_name);
1558 switch (vha->hw->current_topology) {
1559 case ISP_CFG_N:
1560 if (fcport_is_smaller(fcport)) {
1561 /* this adapter is bigger */
1562 if (fcport->login_retry) {
1563 if (fcport->loop_id == FC_NO_LOOP_ID) {
1564 qla2x00_find_new_loop_id(vha,
1565 fcport);
1566 fcport->fw_login_state =
1567 DSC_LS_PORT_UNAVAIL;
1568 }
1569 fcport->login_retry--;
1570 qla_post_els_plogi_work(vha, fcport);
1571 } else {
1572 ql_log(ql_log_info, vha, 0x705d,
1573 "Unable to reach remote port %8phC",
1574 fcport->port_name);
1575 }
1576 } else {
1577 qla24xx_post_gnl_work(vha, fcport);
1578 }
1579 break;
1580 default:
1581 if (wwn == 0) {
1582 ql_dbg(ql_dbg_disc, vha, 0xffff,
1583 "%s %d %8phC post GNNID\n",
1584 __func__, __LINE__, fcport->port_name);
1585 qla24xx_post_gnnid_work(vha, fcport);
1586 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1587 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1588 "%s %d %8phC post gnl\n",
1589 __func__, __LINE__, fcport->port_name);
1590 qla24xx_post_gnl_work(vha, fcport);
1591 } else {
1592 qla_chk_n2n_b4_login(vha, fcport);
1593 }
1594 break;
1595 }
1596 break;
1597
1598 case DSC_GNL:
1599 switch (vha->hw->current_topology) {
1600 case ISP_CFG_N:
1601 if ((fcport->current_login_state & 0xf) == 0x6) {
1602 ql_dbg(ql_dbg_disc, vha, 0x2118,
1603 "%s %d %8phC post GPDB work\n",
1604 __func__, __LINE__, fcport->port_name);
1605 fcport->chip_reset =
1606 vha->hw->base_qpair->chip_reset;
1607 qla24xx_post_gpdb_work(vha, fcport, 0);
1608 } else {
1609 ql_dbg(ql_dbg_disc, vha, 0x2118,
1610 "%s %d %8phC post %s PRLI\n",
1611 __func__, __LINE__, fcport->port_name,
1612 NVME_TARGET(vha->hw, fcport) ? "NVME" :
1613 "FC");
1614 qla24xx_post_prli_work(vha, fcport);
1615 }
1616 break;
1617 default:
1618 if (fcport->login_pause) {
1619 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1620 "%s %d %8phC exit\n",
1621 __func__, __LINE__,
1622 fcport->port_name);
1623 fcport->last_rscn_gen = fcport->rscn_gen;
1624 fcport->last_login_gen = fcport->login_gen;
1625 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1626 break;
1627 }
1628 qla_chk_n2n_b4_login(vha, fcport);
1629 break;
1630 }
1631 break;
1632
1633 case DSC_LOGIN_FAILED:
1634 if (N2N_TOPO(vha->hw))
1635 qla_chk_n2n_b4_login(vha, fcport);
1636 else
1637 qlt_schedule_sess_for_deletion(fcport);
1638 break;
1639
1640 case DSC_LOGIN_COMPLETE:
1641 /* recheck login state */
1642 data[0] = data[1] = 0;
1643 qla2x00_post_async_adisc_work(vha, fcport, data);
1644 break;
1645
1646 case DSC_LOGIN_PEND:
1647 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1648 qla24xx_post_prli_work(vha, fcport);
1649 break;
1650
1651 case DSC_UPD_FCPORT:
1652 sec = jiffies_to_msecs(jiffies -
1653 fcport->jiffies_at_registration)/1000;
1654 if (fcport->sec_since_registration < sec && sec &&
1655 !(sec % 60)) {
1656 fcport->sec_since_registration = sec;
1657 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1658 "%s %8phC - Slow Rport registration(%d Sec)\n",
1659 __func__, fcport->port_name, sec);
1660 }
1661
1662 if (fcport->next_disc_state != DSC_DELETE_PEND)
1663 fcport->next_disc_state = DSC_ADISC;
1664 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1665 break;
1666
1667 default:
1668 break;
1669 }
1670
1671 return 0;
1672 }
1673
1674 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1675 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1676 {
1677 struct qla_work_evt *e;
1678
1679 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1680 if (!e)
1681 return QLA_FUNCTION_FAILED;
1682
1683 e->u.new_sess.id = *id;
1684 e->u.new_sess.pla = pla;
1685 e->u.new_sess.fc4_type = fc4_type;
1686 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1687 if (node_name)
1688 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1689
1690 return qla2x00_post_work(vha, e);
1691 }
1692
1693 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea)
1694 {
1695 fc_port_t *fcport;
1696 unsigned long flags;
1697
1698 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1699 if (fcport) {
1700 fcport->scan_needed = 1;
1701 fcport->rscn_gen++;
1702 }
1703
1704 spin_lock_irqsave(&vha->work_lock, flags);
1705 if (vha->scan.scan_flags == 0) {
1706 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__);
1707 vha->scan.scan_flags |= SF_QUEUED;
1708 schedule_delayed_work(&vha->scan.scan_work, 5);
1709 }
1710 spin_unlock_irqrestore(&vha->work_lock, flags);
1711 }
1712
1713 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1714 struct event_arg *ea)
1715 {
1716 fc_port_t *fcport = ea->fcport;
1717
1718 if (test_bit(UNLOADING, &vha->dpc_flags))
1719 return;
1720
1721 ql_dbg(ql_dbg_disc, vha, 0x2102,
1722 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1723 __func__, fcport->port_name, fcport->disc_state,
1724 fcport->fw_login_state, fcport->login_pause,
1725 fcport->deleted, fcport->conflict,
1726 fcport->last_rscn_gen, fcport->rscn_gen,
1727 fcport->last_login_gen, fcport->login_gen,
1728 fcport->flags);
1729
1730 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1731 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n",
1732 __func__, __LINE__, fcport->port_name);
1733 qla24xx_post_gnl_work(vha, fcport);
1734 return;
1735 }
1736
1737 qla24xx_fcport_handle_login(vha, fcport);
1738 }
1739
1740 void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1741 struct event_arg *ea)
1742 {
1743 /* for pure Target Mode, PRLI will not be initiated */
1744 if (vha->host->active_mode == MODE_TARGET)
1745 return;
1746
1747 ql_dbg(ql_dbg_disc, vha, 0x2118,
1748 "%s %d %8phC post PRLI\n",
1749 __func__, __LINE__, ea->fcport->port_name);
1750 qla24xx_post_prli_work(vha, ea->fcport);
1751 }
1752
1753 /*
1754 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1755 * to be consumed by the fcport
1756 */
1757 void qla_rscn_replay(fc_port_t *fcport)
1758 {
1759 struct event_arg ea;
1760
1761 switch (fcport->disc_state) {
1762 case DSC_DELETE_PEND:
1763 return;
1764 default:
1765 break;
1766 }
1767
1768 if (fcport->scan_needed) {
1769 memset(&ea, 0, sizeof(ea));
1770 ea.id = fcport->d_id;
1771 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1772 qla2x00_handle_rscn(fcport->vha, &ea);
1773 }
1774 }
1775
1776 static void
1777 qla2x00_tmf_iocb_timeout(void *data)
1778 {
1779 srb_t *sp = data;
1780 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1781 int rc, h;
1782 unsigned long flags;
1783
1784 rc = qla24xx_async_abort_cmd(sp, false);
1785 if (rc) {
1786 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
1787 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; h++) {
1788 if (sp->qpair->req->outstanding_cmds[h] == sp) {
1789 sp->qpair->req->outstanding_cmds[h] = NULL;
1790 break;
1791 }
1792 }
1793 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
1794 tmf->u.tmf.comp_status = CS_TIMEOUT;
1795 tmf->u.tmf.data = QLA_FUNCTION_FAILED;
1796 complete(&tmf->u.tmf.comp);
1797 }
1798 }
1799
1800 static void qla2x00_tmf_sp_done(srb_t *sp, int res)
1801 {
1802 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1803
1804 complete(&tmf->u.tmf.comp);
1805 }
1806
1807 int
1808 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1809 uint32_t tag)
1810 {
1811 struct scsi_qla_host *vha = fcport->vha;
1812 struct srb_iocb *tm_iocb;
1813 srb_t *sp;
1814 int rval = QLA_FUNCTION_FAILED;
1815
1816 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1817 if (!sp)
1818 goto done;
1819
1820 tm_iocb = &sp->u.iocb_cmd;
1821 sp->type = SRB_TM_CMD;
1822 sp->name = "tmf";
1823
1824 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1825 init_completion(&tm_iocb->u.tmf.comp);
1826 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1827
1828 tm_iocb->u.tmf.flags = flags;
1829 tm_iocb->u.tmf.lun = lun;
1830 tm_iocb->u.tmf.data = tag;
1831 sp->done = qla2x00_tmf_sp_done;
1832
1833 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1834 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1835 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1836 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1837
1838 rval = qla2x00_start_sp(sp);
1839 if (rval != QLA_SUCCESS)
1840 goto done_free_sp;
1841 wait_for_completion(&tm_iocb->u.tmf.comp);
1842
1843 rval = tm_iocb->u.tmf.data;
1844
1845 if (rval != QLA_SUCCESS) {
1846 ql_log(ql_log_warn, vha, 0x8030,
1847 "TM IOCB failed (%x).\n", rval);
1848 }
1849
1850 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1851 flags = tm_iocb->u.tmf.flags;
1852 lun = (uint16_t)tm_iocb->u.tmf.lun;
1853
1854 /* Issue Marker IOCB */
1855 qla2x00_marker(vha, vha->hw->base_qpair,
1856 fcport->loop_id, lun,
1857 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1858 }
1859
1860 done_free_sp:
1861 sp->free(sp);
1862 fcport->flags &= ~FCF_ASYNC_SENT;
1863 done:
1864 return rval;
1865 }
1866
1867 int
1868 qla24xx_async_abort_command(srb_t *sp)
1869 {
1870 unsigned long flags = 0;
1871
1872 uint32_t handle;
1873 fc_port_t *fcport = sp->fcport;
1874 struct qla_qpair *qpair = sp->qpair;
1875 struct scsi_qla_host *vha = fcport->vha;
1876 struct req_que *req = qpair->req;
1877
1878 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1879 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1880 if (req->outstanding_cmds[handle] == sp)
1881 break;
1882 }
1883 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1884
1885 if (handle == req->num_outstanding_cmds) {
1886 /* Command not found. */
1887 return QLA_FUNCTION_FAILED;
1888 }
1889 if (sp->type == SRB_FXIOCB_DCMD)
1890 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1891 FXDISC_ABORT_IOCTL);
1892
1893 return qla24xx_async_abort_cmd(sp, true);
1894 }
1895
1896 static void
1897 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1898 {
1899 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
1900 ea->data[0]);
1901
1902 switch (ea->data[0]) {
1903 case MBS_COMMAND_COMPLETE:
1904 ql_dbg(ql_dbg_disc, vha, 0x2118,
1905 "%s %d %8phC post gpdb\n",
1906 __func__, __LINE__, ea->fcport->port_name);
1907
1908 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1909 ea->fcport->logout_on_delete = 1;
1910 ea->fcport->nvme_prli_service_param = ea->iop[0];
1911 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST)
1912 ea->fcport->nvme_first_burst_size =
1913 (ea->iop[1] & 0xffff) * 512;
1914 else
1915 ea->fcport->nvme_first_burst_size = 0;
1916 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1917 break;
1918 default:
1919 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1920 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
1921 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1922 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1923 break;
1924 }
1925
1926 /*
1927 * Retry PRLI with other FC-4 type if failure occurred on dual
1928 * FCP/NVMe port
1929 */
1930 if (NVME_FCP_TARGET(ea->fcport)) {
1931 ql_dbg(ql_dbg_disc, vha, 0x2118,
1932 "%s %d %8phC post %s prli\n",
1933 __func__, __LINE__, ea->fcport->port_name,
1934 (ea->fcport->fc4_type & FS_FC4TYPE_NVME) ?
1935 "NVMe" : "FCP");
1936 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME)
1937 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME;
1938 else
1939 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP;
1940 }
1941
1942 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1943 ea->fcport->keep_nport_handle = 0;
1944 ea->fcport->logout_on_delete = 1;
1945 qlt_schedule_sess_for_deletion(ea->fcport);
1946 break;
1947 }
1948 }
1949
1950 void
1951 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1952 {
1953 port_id_t cid; /* conflict Nport id */
1954 u16 lid;
1955 struct fc_port *conflict_fcport;
1956 unsigned long flags;
1957 struct fc_port *fcport = ea->fcport;
1958
1959 ql_dbg(ql_dbg_disc, vha, 0xffff,
1960 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1961 __func__, fcport->port_name, fcport->disc_state,
1962 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1963 ea->sp->gen1, fcport->rscn_gen,
1964 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1965
1966 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1967 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1968 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1969 "%s %d %8phC Remote is trying to login\n",
1970 __func__, __LINE__, fcport->port_name);
1971 return;
1972 }
1973
1974 if ((fcport->disc_state == DSC_DELETE_PEND) ||
1975 (fcport->disc_state == DSC_DELETED)) {
1976 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1977 return;
1978 }
1979
1980 if (ea->sp->gen2 != fcport->login_gen) {
1981 /* target side must have changed it. */
1982 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1983 "%s %8phC generation changed\n",
1984 __func__, fcport->port_name);
1985 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1986 return;
1987 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1988 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1989 "%s %8phC RSCN generation changed\n",
1990 __func__, fcport->port_name);
1991 qla_rscn_replay(fcport);
1992 qlt_schedule_sess_for_deletion(fcport);
1993 return;
1994 }
1995
1996 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n",
1997 ea->data[0]);
1998
1999 switch (ea->data[0]) {
2000 case MBS_COMMAND_COMPLETE:
2001 /*
2002 * Driver must validate login state - If PRLI not complete,
2003 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
2004 * requests.
2005 */
2006 if (NVME_TARGET(vha->hw, ea->fcport)) {
2007 ql_dbg(ql_dbg_disc, vha, 0x2117,
2008 "%s %d %8phC post prli\n",
2009 __func__, __LINE__, ea->fcport->port_name);
2010 qla24xx_post_prli_work(vha, ea->fcport);
2011 } else {
2012 ql_dbg(ql_dbg_disc, vha, 0x20ea,
2013 "%s %d %8phC LoopID 0x%x in use with %06x. post gpdb\n",
2014 __func__, __LINE__, ea->fcport->port_name,
2015 ea->fcport->loop_id, ea->fcport->d_id.b24);
2016
2017 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2018 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
2019 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2020 ea->fcport->logout_on_delete = 1;
2021 ea->fcport->send_els_logo = 0;
2022 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
2023 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2024
2025 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2026 }
2027 break;
2028 case MBS_COMMAND_ERROR:
2029 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
2030 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2031
2032 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2033 qla2x00_set_fcport_disc_state(ea->fcport, DSC_LOGIN_FAILED);
2034 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
2035 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2036 else
2037 qla2x00_mark_device_lost(vha, ea->fcport, 1);
2038 break;
2039 case MBS_LOOP_ID_USED:
2040 /* data[1] = IO PARAM 1 = nport ID */
2041 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2042 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2043 cid.b.al_pa = ea->iop[1] & 0xff;
2044 cid.b.rsvd_1 = 0;
2045
2046 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2047 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
2048 __func__, __LINE__, ea->fcport->port_name,
2049 ea->fcport->loop_id, cid.b24);
2050
2051 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2052 ea->fcport->loop_id = FC_NO_LOOP_ID;
2053 qla24xx_post_gnl_work(vha, ea->fcport);
2054 break;
2055 case MBS_PORT_ID_USED:
2056 lid = ea->iop[1] & 0xffff;
2057 qlt_find_sess_invalidate_other(vha,
2058 wwn_to_u64(ea->fcport->port_name),
2059 ea->fcport->d_id, lid, &conflict_fcport);
2060
2061 if (conflict_fcport) {
2062 /*
2063 * Another fcport share the same loop_id/nport id.
2064 * Conflict fcport needs to finish cleanup before this
2065 * fcport can proceed to login.
2066 */
2067 conflict_fcport->conflict = ea->fcport;
2068 ea->fcport->login_pause = 1;
2069
2070 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2071 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2072 __func__, __LINE__, ea->fcport->port_name,
2073 ea->fcport->d_id.b24, lid);
2074 } else {
2075 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2076 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2077 __func__, __LINE__, ea->fcport->port_name,
2078 ea->fcport->d_id.b24, lid);
2079
2080 qla2x00_clear_loop_id(ea->fcport);
2081 set_bit(lid, vha->hw->loop_id_map);
2082 ea->fcport->loop_id = lid;
2083 ea->fcport->keep_nport_handle = 0;
2084 ea->fcport->logout_on_delete = 1;
2085 qlt_schedule_sess_for_deletion(ea->fcport);
2086 }
2087 break;
2088 }
2089 return;
2090 }
2091
2092 /****************************************************************************/
2093 /* QLogic ISP2x00 Hardware Support Functions. */
2094 /****************************************************************************/
2095
2096 static int
2097 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2098 {
2099 int rval = QLA_SUCCESS;
2100 struct qla_hw_data *ha = vha->hw;
2101 uint32_t idc_major_ver, idc_minor_ver;
2102 uint16_t config[4];
2103
2104 qla83xx_idc_lock(vha, 0);
2105
2106 /* SV: TODO: Assign initialization timeout from
2107 * flash-info / other param
2108 */
2109 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2110 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2111
2112 /* Set our fcoe function presence */
2113 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2114 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2115 "Error while setting DRV-Presence.\n");
2116 rval = QLA_FUNCTION_FAILED;
2117 goto exit;
2118 }
2119
2120 /* Decide the reset ownership */
2121 qla83xx_reset_ownership(vha);
2122
2123 /*
2124 * On first protocol driver load:
2125 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2126 * register.
2127 * Others: Check compatibility with current IDC Major version.
2128 */
2129 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2130 if (ha->flags.nic_core_reset_owner) {
2131 /* Set IDC Major version */
2132 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2133 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2134
2135 /* Clearing IDC-Lock-Recovery register */
2136 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2137 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2138 /*
2139 * Clear further IDC participation if we are not compatible with
2140 * the current IDC Major Version.
2141 */
2142 ql_log(ql_log_warn, vha, 0xb07d,
2143 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2144 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2145 __qla83xx_clear_drv_presence(vha);
2146 rval = QLA_FUNCTION_FAILED;
2147 goto exit;
2148 }
2149 /* Each function sets its supported Minor version. */
2150 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2151 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2152 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2153
2154 if (ha->flags.nic_core_reset_owner) {
2155 memset(config, 0, sizeof(config));
2156 if (!qla81xx_get_port_config(vha, config))
2157 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2158 QLA8XXX_DEV_READY);
2159 }
2160
2161 rval = qla83xx_idc_state_handler(vha);
2162
2163 exit:
2164 qla83xx_idc_unlock(vha, 0);
2165
2166 return rval;
2167 }
2168
2169 /*
2170 * qla2x00_initialize_adapter
2171 * Initialize board.
2172 *
2173 * Input:
2174 * ha = adapter block pointer.
2175 *
2176 * Returns:
2177 * 0 = success
2178 */
2179 int
2180 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2181 {
2182 int rval;
2183 struct qla_hw_data *ha = vha->hw;
2184 struct req_que *req = ha->req_q_map[0];
2185 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2186
2187 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2188 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2189
2190 /* Clear adapter flags. */
2191 vha->flags.online = 0;
2192 ha->flags.chip_reset_done = 0;
2193 vha->flags.reset_active = 0;
2194 ha->flags.pci_channel_io_perm_failure = 0;
2195 ha->flags.eeh_busy = 0;
2196 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2197 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2198 atomic_set(&vha->loop_state, LOOP_DOWN);
2199 vha->device_flags = DFLG_NO_CABLE;
2200 vha->dpc_flags = 0;
2201 vha->flags.management_server_logged_in = 0;
2202 vha->marker_needed = 0;
2203 ha->isp_abort_cnt = 0;
2204 ha->beacon_blink_led = 0;
2205
2206 set_bit(0, ha->req_qid_map);
2207 set_bit(0, ha->rsp_qid_map);
2208
2209 ql_dbg(ql_dbg_init, vha, 0x0040,
2210 "Configuring PCI space...\n");
2211 rval = ha->isp_ops->pci_config(vha);
2212 if (rval) {
2213 ql_log(ql_log_warn, vha, 0x0044,
2214 "Unable to configure PCI space.\n");
2215 return (rval);
2216 }
2217
2218 ha->isp_ops->reset_chip(vha);
2219
2220 /* Check for secure flash support */
2221 if (IS_QLA28XX(ha)) {
2222 if (RD_REG_DWORD(&reg->mailbox12) & BIT_0)
2223 ha->flags.secure_adapter = 1;
2224 ql_log(ql_log_info, vha, 0xffff, "Secure Adapter: %s\n",
2225 (ha->flags.secure_adapter) ? "Yes" : "No");
2226 }
2227
2228
2229 rval = qla2xxx_get_flash_info(vha);
2230 if (rval) {
2231 ql_log(ql_log_fatal, vha, 0x004f,
2232 "Unable to validate FLASH data.\n");
2233 return rval;
2234 }
2235
2236 if (IS_QLA8044(ha)) {
2237 qla8044_read_reset_template(vha);
2238
2239 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2240 * If DONRESET_BIT0 is set, drivers should not set dev_state
2241 * to NEED_RESET. But if NEED_RESET is set, drivers should
2242 * should honor the reset. */
2243 if (ql2xdontresethba == 1)
2244 qla8044_set_idc_dontreset(vha);
2245 }
2246
2247 ha->isp_ops->get_flash_version(vha, req->ring);
2248 ql_dbg(ql_dbg_init, vha, 0x0061,
2249 "Configure NVRAM parameters...\n");
2250
2251 /* Let priority default to FCP, can be overridden by nvram_config */
2252 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2253
2254 ha->isp_ops->nvram_config(vha);
2255
2256 if (ha->fc4_type_priority != FC4_PRIORITY_FCP &&
2257 ha->fc4_type_priority != FC4_PRIORITY_NVME)
2258 ha->fc4_type_priority = FC4_PRIORITY_FCP;
2259
2260 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n",
2261 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe");
2262
2263 if (ha->flags.disable_serdes) {
2264 /* Mask HBA via NVRAM settings? */
2265 ql_log(ql_log_info, vha, 0x0077,
2266 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2267 return QLA_FUNCTION_FAILED;
2268 }
2269
2270 ql_dbg(ql_dbg_init, vha, 0x0078,
2271 "Verifying loaded RISC code...\n");
2272
2273 /* If smartsan enabled then require fdmi and rdp enabled */
2274 if (ql2xsmartsan) {
2275 ql2xfdmienable = 1;
2276 ql2xrdpenable = 1;
2277 }
2278
2279 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2280 rval = ha->isp_ops->chip_diag(vha);
2281 if (rval)
2282 return (rval);
2283 rval = qla2x00_setup_chip(vha);
2284 if (rval)
2285 return (rval);
2286 }
2287
2288 if (IS_QLA84XX(ha)) {
2289 ha->cs84xx = qla84xx_get_chip(vha);
2290 if (!ha->cs84xx) {
2291 ql_log(ql_log_warn, vha, 0x00d0,
2292 "Unable to configure ISP84XX.\n");
2293 return QLA_FUNCTION_FAILED;
2294 }
2295 }
2296
2297 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2298 rval = qla2x00_init_rings(vha);
2299
2300 /* No point in continuing if firmware initialization failed. */
2301 if (rval != QLA_SUCCESS)
2302 return rval;
2303
2304 ha->flags.chip_reset_done = 1;
2305
2306 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2307 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2308 rval = qla84xx_init_chip(vha);
2309 if (rval != QLA_SUCCESS) {
2310 ql_log(ql_log_warn, vha, 0x00d4,
2311 "Unable to initialize ISP84XX.\n");
2312 qla84xx_put_chip(vha);
2313 }
2314 }
2315
2316 /* Load the NIC Core f/w if we are the first protocol driver. */
2317 if (IS_QLA8031(ha)) {
2318 rval = qla83xx_nic_core_fw_load(vha);
2319 if (rval)
2320 ql_log(ql_log_warn, vha, 0x0124,
2321 "Error in initializing NIC Core f/w.\n");
2322 }
2323
2324 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2325 qla24xx_read_fcp_prio_cfg(vha);
2326
2327 if (IS_P3P_TYPE(ha))
2328 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2329 else
2330 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2331
2332 return (rval);
2333 }
2334
2335 /**
2336 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2337 * @vha: HA context
2338 *
2339 * Returns 0 on success.
2340 */
2341 int
2342 qla2100_pci_config(scsi_qla_host_t *vha)
2343 {
2344 uint16_t w;
2345 unsigned long flags;
2346 struct qla_hw_data *ha = vha->hw;
2347 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2348
2349 pci_set_master(ha->pdev);
2350 pci_try_set_mwi(ha->pdev);
2351
2352 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2353 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2354 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2355
2356 pci_disable_rom(ha->pdev);
2357
2358 /* Get PCI bus information. */
2359 spin_lock_irqsave(&ha->hardware_lock, flags);
2360 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2361 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2362
2363 return QLA_SUCCESS;
2364 }
2365
2366 /**
2367 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2368 * @vha: HA context
2369 *
2370 * Returns 0 on success.
2371 */
2372 int
2373 qla2300_pci_config(scsi_qla_host_t *vha)
2374 {
2375 uint16_t w;
2376 unsigned long flags = 0;
2377 uint32_t cnt;
2378 struct qla_hw_data *ha = vha->hw;
2379 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2380
2381 pci_set_master(ha->pdev);
2382 pci_try_set_mwi(ha->pdev);
2383
2384 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2385 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2386
2387 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2388 w &= ~PCI_COMMAND_INTX_DISABLE;
2389 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2390
2391 /*
2392 * If this is a 2300 card and not 2312, reset the
2393 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2394 * the 2310 also reports itself as a 2300 so we need to get the
2395 * fb revision level -- a 6 indicates it really is a 2300 and
2396 * not a 2310.
2397 */
2398 if (IS_QLA2300(ha)) {
2399 spin_lock_irqsave(&ha->hardware_lock, flags);
2400
2401 /* Pause RISC. */
2402 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2403 for (cnt = 0; cnt < 30000; cnt++) {
2404 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
2405 break;
2406
2407 udelay(10);
2408 }
2409
2410 /* Select FPM registers. */
2411 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2412 RD_REG_WORD(&reg->ctrl_status);
2413
2414 /* Get the fb rev level */
2415 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2416
2417 if (ha->fb_rev == FPM_2300)
2418 pci_clear_mwi(ha->pdev);
2419
2420 /* Deselect FPM registers. */
2421 WRT_REG_WORD(&reg->ctrl_status, 0x0);
2422 RD_REG_WORD(&reg->ctrl_status);
2423
2424 /* Release RISC module. */
2425 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2426 for (cnt = 0; cnt < 30000; cnt++) {
2427 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
2428 break;
2429
2430 udelay(10);
2431 }
2432
2433 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2434 }
2435
2436 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2437
2438 pci_disable_rom(ha->pdev);
2439
2440 /* Get PCI bus information. */
2441 spin_lock_irqsave(&ha->hardware_lock, flags);
2442 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
2443 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2444
2445 return QLA_SUCCESS;
2446 }
2447
2448 /**
2449 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2450 * @vha: HA context
2451 *
2452 * Returns 0 on success.
2453 */
2454 int
2455 qla24xx_pci_config(scsi_qla_host_t *vha)
2456 {
2457 uint16_t w;
2458 unsigned long flags = 0;
2459 struct qla_hw_data *ha = vha->hw;
2460 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2461
2462 pci_set_master(ha->pdev);
2463 pci_try_set_mwi(ha->pdev);
2464
2465 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2466 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2467 w &= ~PCI_COMMAND_INTX_DISABLE;
2468 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2469
2470 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2471
2472 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2473 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2474 pcix_set_mmrbc(ha->pdev, 2048);
2475
2476 /* PCIe -- adjust Maximum Read Request Size (2048). */
2477 if (pci_is_pcie(ha->pdev))
2478 pcie_set_readrq(ha->pdev, 4096);
2479
2480 pci_disable_rom(ha->pdev);
2481
2482 ha->chip_revision = ha->pdev->revision;
2483
2484 /* Get PCI bus information. */
2485 spin_lock_irqsave(&ha->hardware_lock, flags);
2486 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
2487 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2488
2489 return QLA_SUCCESS;
2490 }
2491
2492 /**
2493 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2494 * @vha: HA context
2495 *
2496 * Returns 0 on success.
2497 */
2498 int
2499 qla25xx_pci_config(scsi_qla_host_t *vha)
2500 {
2501 uint16_t w;
2502 struct qla_hw_data *ha = vha->hw;
2503
2504 pci_set_master(ha->pdev);
2505 pci_try_set_mwi(ha->pdev);
2506
2507 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2508 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2509 w &= ~PCI_COMMAND_INTX_DISABLE;
2510 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2511
2512 /* PCIe -- adjust Maximum Read Request Size (2048). */
2513 if (pci_is_pcie(ha->pdev))
2514 pcie_set_readrq(ha->pdev, 4096);
2515
2516 pci_disable_rom(ha->pdev);
2517
2518 ha->chip_revision = ha->pdev->revision;
2519
2520 return QLA_SUCCESS;
2521 }
2522
2523 /**
2524 * qla2x00_isp_firmware() - Choose firmware image.
2525 * @vha: HA context
2526 *
2527 * Returns 0 on success.
2528 */
2529 static int
2530 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2531 {
2532 int rval;
2533 uint16_t loop_id, topo, sw_cap;
2534 uint8_t domain, area, al_pa;
2535 struct qla_hw_data *ha = vha->hw;
2536
2537 /* Assume loading risc code */
2538 rval = QLA_FUNCTION_FAILED;
2539
2540 if (ha->flags.disable_risc_code_load) {
2541 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2542
2543 /* Verify checksum of loaded RISC code. */
2544 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2545 if (rval == QLA_SUCCESS) {
2546 /* And, verify we are not in ROM code. */
2547 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2548 &area, &domain, &topo, &sw_cap);
2549 }
2550 }
2551
2552 if (rval)
2553 ql_dbg(ql_dbg_init, vha, 0x007a,
2554 "**** Load RISC code ****.\n");
2555
2556 return (rval);
2557 }
2558
2559 /**
2560 * qla2x00_reset_chip() - Reset ISP chip.
2561 * @vha: HA context
2562 *
2563 * Returns 0 on success.
2564 */
2565 int
2566 qla2x00_reset_chip(scsi_qla_host_t *vha)
2567 {
2568 unsigned long flags = 0;
2569 struct qla_hw_data *ha = vha->hw;
2570 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2571 uint32_t cnt;
2572 uint16_t cmd;
2573 int rval = QLA_FUNCTION_FAILED;
2574
2575 if (unlikely(pci_channel_offline(ha->pdev)))
2576 return rval;
2577
2578 ha->isp_ops->disable_intrs(ha);
2579
2580 spin_lock_irqsave(&ha->hardware_lock, flags);
2581
2582 /* Turn off master enable */
2583 cmd = 0;
2584 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2585 cmd &= ~PCI_COMMAND_MASTER;
2586 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2587
2588 if (!IS_QLA2100(ha)) {
2589 /* Pause RISC. */
2590 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2591 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2592 for (cnt = 0; cnt < 30000; cnt++) {
2593 if ((RD_REG_WORD(&reg->hccr) &
2594 HCCR_RISC_PAUSE) != 0)
2595 break;
2596 udelay(100);
2597 }
2598 } else {
2599 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2600 udelay(10);
2601 }
2602
2603 /* Select FPM registers. */
2604 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2605 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2606
2607 /* FPM Soft Reset. */
2608 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2609 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2610
2611 /* Toggle Fpm Reset. */
2612 if (!IS_QLA2200(ha)) {
2613 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2614 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2615 }
2616
2617 /* Select frame buffer registers. */
2618 WRT_REG_WORD(&reg->ctrl_status, 0x10);
2619 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2620
2621 /* Reset frame buffer FIFOs. */
2622 if (IS_QLA2200(ha)) {
2623 WRT_FB_CMD_REG(ha, reg, 0xa000);
2624 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2625 } else {
2626 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2627
2628 /* Read back fb_cmd until zero or 3 seconds max */
2629 for (cnt = 0; cnt < 3000; cnt++) {
2630 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2631 break;
2632 udelay(100);
2633 }
2634 }
2635
2636 /* Select RISC module registers. */
2637 WRT_REG_WORD(&reg->ctrl_status, 0);
2638 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2639
2640 /* Reset RISC processor. */
2641 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2642 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2643
2644 /* Release RISC processor. */
2645 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2646 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2647 }
2648
2649 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2650 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
2651
2652 /* Reset ISP chip. */
2653 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2654
2655 /* Wait for RISC to recover from reset. */
2656 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2657 /*
2658 * It is necessary to for a delay here since the card doesn't
2659 * respond to PCI reads during a reset. On some architectures
2660 * this will result in an MCA.
2661 */
2662 udelay(20);
2663 for (cnt = 30000; cnt; cnt--) {
2664 if ((RD_REG_WORD(&reg->ctrl_status) &
2665 CSR_ISP_SOFT_RESET) == 0)
2666 break;
2667 udelay(100);
2668 }
2669 } else
2670 udelay(10);
2671
2672 /* Reset RISC processor. */
2673 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2674
2675 WRT_REG_WORD(&reg->semaphore, 0);
2676
2677 /* Release RISC processor. */
2678 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2679 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2680
2681 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2682 for (cnt = 0; cnt < 30000; cnt++) {
2683 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2684 break;
2685
2686 udelay(100);
2687 }
2688 } else
2689 udelay(100);
2690
2691 /* Turn on master enable */
2692 cmd |= PCI_COMMAND_MASTER;
2693 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2694
2695 /* Disable RISC pause on FPM parity error. */
2696 if (!IS_QLA2100(ha)) {
2697 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2698 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2699 }
2700
2701 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2702
2703 return QLA_SUCCESS;
2704 }
2705
2706 /**
2707 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2708 * @vha: HA context
2709 *
2710 * Returns 0 on success.
2711 */
2712 static int
2713 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2714 {
2715 uint16_t mb[4] = {0x1010, 0, 1, 0};
2716
2717 if (!IS_QLA81XX(vha->hw))
2718 return QLA_SUCCESS;
2719
2720 return qla81xx_write_mpi_register(vha, mb);
2721 }
2722
2723 /**
2724 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2725 * @vha: HA context
2726 *
2727 * Returns 0 on success.
2728 */
2729 static inline int
2730 qla24xx_reset_risc(scsi_qla_host_t *vha)
2731 {
2732 unsigned long flags = 0;
2733 struct qla_hw_data *ha = vha->hw;
2734 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2735 uint32_t cnt;
2736 uint16_t wd;
2737 static int abts_cnt; /* ISP abort retry counts */
2738 int rval = QLA_SUCCESS;
2739
2740 spin_lock_irqsave(&ha->hardware_lock, flags);
2741
2742 /* Reset RISC. */
2743 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2744 for (cnt = 0; cnt < 30000; cnt++) {
2745 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2746 break;
2747
2748 udelay(10);
2749 }
2750
2751 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2752 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2753
2754 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2755 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2756 RD_REG_DWORD(&reg->hccr),
2757 RD_REG_DWORD(&reg->ctrl_status),
2758 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2759
2760 WRT_REG_DWORD(&reg->ctrl_status,
2761 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2762 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2763
2764 udelay(100);
2765
2766 /* Wait for firmware to complete NVRAM accesses. */
2767 RD_REG_WORD(&reg->mailbox0);
2768 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2769 rval == QLA_SUCCESS; cnt--) {
2770 barrier();
2771 if (cnt)
2772 udelay(5);
2773 else
2774 rval = QLA_FUNCTION_TIMEOUT;
2775 }
2776
2777 if (rval == QLA_SUCCESS)
2778 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2779
2780 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2781 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2782 RD_REG_DWORD(&reg->hccr),
2783 RD_REG_DWORD(&reg->mailbox0));
2784
2785 /* Wait for soft-reset to complete. */
2786 RD_REG_DWORD(&reg->ctrl_status);
2787 for (cnt = 0; cnt < 60; cnt++) {
2788 barrier();
2789 if ((RD_REG_DWORD(&reg->ctrl_status) &
2790 CSRX_ISP_SOFT_RESET) == 0)
2791 break;
2792
2793 udelay(5);
2794 }
2795 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2796 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2797
2798 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2799 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2800 RD_REG_DWORD(&reg->hccr),
2801 RD_REG_DWORD(&reg->ctrl_status));
2802
2803 /* If required, do an MPI FW reset now */
2804 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2805 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2806 if (++abts_cnt < 5) {
2807 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2808 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2809 } else {
2810 /*
2811 * We exhausted the ISP abort retries. We have to
2812 * set the board offline.
2813 */
2814 abts_cnt = 0;
2815 vha->flags.online = 0;
2816 }
2817 }
2818 }
2819
2820 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2821 RD_REG_DWORD(&reg->hccr);
2822
2823 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2824 RD_REG_DWORD(&reg->hccr);
2825
2826 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2827 RD_REG_DWORD(&reg->hccr);
2828
2829 RD_REG_WORD(&reg->mailbox0);
2830 for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
2831 rval == QLA_SUCCESS; cnt--) {
2832 barrier();
2833 if (cnt)
2834 udelay(5);
2835 else
2836 rval = QLA_FUNCTION_TIMEOUT;
2837 }
2838 if (rval == QLA_SUCCESS)
2839 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2840
2841 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2842 "Host Risc 0x%x, mailbox0 0x%x\n",
2843 RD_REG_DWORD(&reg->hccr),
2844 RD_REG_WORD(&reg->mailbox0));
2845
2846 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2847
2848 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2849 "Driver in %s mode\n",
2850 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2851
2852 if (IS_NOPOLLING_TYPE(ha))
2853 ha->isp_ops->enable_intrs(ha);
2854
2855 return rval;
2856 }
2857
2858 static void
2859 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2860 {
2861 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2862
2863 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2864 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2865
2866 }
2867
2868 static void
2869 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2870 {
2871 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2872
2873 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2874 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2875 }
2876
2877 static void
2878 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2879 {
2880 uint32_t wd32 = 0;
2881 uint delta_msec = 100;
2882 uint elapsed_msec = 0;
2883 uint timeout_msec;
2884 ulong n;
2885
2886 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2887 vha->hw->pdev->subsystem_device != 0x0240)
2888 return;
2889
2890 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2891 udelay(100);
2892
2893 attempt:
2894 timeout_msec = TIMEOUT_SEMAPHORE;
2895 n = timeout_msec / delta_msec;
2896 while (n--) {
2897 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2898 qla25xx_read_risc_sema_reg(vha, &wd32);
2899 if (wd32 & RISC_SEMAPHORE)
2900 break;
2901 msleep(delta_msec);
2902 elapsed_msec += delta_msec;
2903 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2904 goto force;
2905 }
2906
2907 if (!(wd32 & RISC_SEMAPHORE))
2908 goto force;
2909
2910 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2911 goto acquired;
2912
2913 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2914 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2915 n = timeout_msec / delta_msec;
2916 while (n--) {
2917 qla25xx_read_risc_sema_reg(vha, &wd32);
2918 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2919 break;
2920 msleep(delta_msec);
2921 elapsed_msec += delta_msec;
2922 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2923 goto force;
2924 }
2925
2926 if (wd32 & RISC_SEMAPHORE_FORCE)
2927 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2928
2929 goto attempt;
2930
2931 force:
2932 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2933
2934 acquired:
2935 return;
2936 }
2937
2938 /**
2939 * qla24xx_reset_chip() - Reset ISP24xx chip.
2940 * @vha: HA context
2941 *
2942 * Returns 0 on success.
2943 */
2944 int
2945 qla24xx_reset_chip(scsi_qla_host_t *vha)
2946 {
2947 struct qla_hw_data *ha = vha->hw;
2948 int rval = QLA_FUNCTION_FAILED;
2949
2950 if (pci_channel_offline(ha->pdev) &&
2951 ha->flags.pci_channel_io_perm_failure) {
2952 return rval;
2953 }
2954
2955 ha->isp_ops->disable_intrs(ha);
2956
2957 qla25xx_manipulate_risc_semaphore(vha);
2958
2959 /* Perform RISC reset. */
2960 rval = qla24xx_reset_risc(vha);
2961
2962 return rval;
2963 }
2964
2965 /**
2966 * qla2x00_chip_diag() - Test chip for proper operation.
2967 * @vha: HA context
2968 *
2969 * Returns 0 on success.
2970 */
2971 int
2972 qla2x00_chip_diag(scsi_qla_host_t *vha)
2973 {
2974 int rval;
2975 struct qla_hw_data *ha = vha->hw;
2976 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2977 unsigned long flags = 0;
2978 uint16_t data;
2979 uint32_t cnt;
2980 uint16_t mb[5];
2981 struct req_que *req = ha->req_q_map[0];
2982
2983 /* Assume a failed state */
2984 rval = QLA_FUNCTION_FAILED;
2985
2986 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2987 &reg->flash_address);
2988
2989 spin_lock_irqsave(&ha->hardware_lock, flags);
2990
2991 /* Reset ISP chip. */
2992 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2993
2994 /*
2995 * We need to have a delay here since the card will not respond while
2996 * in reset causing an MCA on some architectures.
2997 */
2998 udelay(20);
2999 data = qla2x00_debounce_register(&reg->ctrl_status);
3000 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
3001 udelay(5);
3002 data = RD_REG_WORD(&reg->ctrl_status);
3003 barrier();
3004 }
3005
3006 if (!cnt)
3007 goto chip_diag_failed;
3008
3009 ql_dbg(ql_dbg_init, vha, 0x007c,
3010 "Reset register cleared by chip reset.\n");
3011
3012 /* Reset RISC processor. */
3013 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
3014 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
3015
3016 /* Workaround for QLA2312 PCI parity error */
3017 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
3018 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
3019 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
3020 udelay(5);
3021 data = RD_MAILBOX_REG(ha, reg, 0);
3022 barrier();
3023 }
3024 } else
3025 udelay(10);
3026
3027 if (!cnt)
3028 goto chip_diag_failed;
3029
3030 /* Check product ID of chip */
3031 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
3032
3033 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3034 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3035 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3036 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3037 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3038 mb[3] != PROD_ID_3) {
3039 ql_log(ql_log_warn, vha, 0x0062,
3040 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3041 mb[1], mb[2], mb[3]);
3042
3043 goto chip_diag_failed;
3044 }
3045 ha->product_id[0] = mb[1];
3046 ha->product_id[1] = mb[2];
3047 ha->product_id[2] = mb[3];
3048 ha->product_id[3] = mb[4];
3049
3050 /* Adjust fw RISC transfer size */
3051 if (req->length > 1024)
3052 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3053 else
3054 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
3055 req->length;
3056
3057 if (IS_QLA2200(ha) &&
3058 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3059 /* Limit firmware transfer size with a 2200A */
3060 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3061
3062 ha->device_type |= DT_ISP2200A;
3063 ha->fw_transfer_size = 128;
3064 }
3065
3066 /* Wrap Incoming Mailboxes Test. */
3067 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3068
3069 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3070 rval = qla2x00_mbx_reg_test(vha);
3071 if (rval)
3072 ql_log(ql_log_warn, vha, 0x0080,
3073 "Failed mailbox send register test.\n");
3074 else
3075 /* Flag a successful rval */
3076 rval = QLA_SUCCESS;
3077 spin_lock_irqsave(&ha->hardware_lock, flags);
3078
3079 chip_diag_failed:
3080 if (rval)
3081 ql_log(ql_log_info, vha, 0x0081,
3082 "Chip diagnostics **** FAILED ****.\n");
3083
3084 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3085
3086 return (rval);
3087 }
3088
3089 /**
3090 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3091 * @vha: HA context
3092 *
3093 * Returns 0 on success.
3094 */
3095 int
3096 qla24xx_chip_diag(scsi_qla_host_t *vha)
3097 {
3098 int rval;
3099 struct qla_hw_data *ha = vha->hw;
3100 struct req_que *req = ha->req_q_map[0];
3101
3102 if (IS_P3P_TYPE(ha))
3103 return QLA_SUCCESS;
3104
3105 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3106
3107 rval = qla2x00_mbx_reg_test(vha);
3108 if (rval) {
3109 ql_log(ql_log_warn, vha, 0x0082,
3110 "Failed mailbox send register test.\n");
3111 } else {
3112 /* Flag a successful rval */
3113 rval = QLA_SUCCESS;
3114 }
3115
3116 return rval;
3117 }
3118
3119 static void
3120 qla2x00_init_fce_trace(scsi_qla_host_t *vha)
3121 {
3122 int rval;
3123 dma_addr_t tc_dma;
3124 void *tc;
3125 struct qla_hw_data *ha = vha->hw;
3126
3127 if (!IS_FWI2_CAPABLE(ha))
3128 return;
3129
3130 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3131 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
3132 return;
3133
3134 if (ha->fce) {
3135 ql_dbg(ql_dbg_init, vha, 0x00bd,
3136 "%s: FCE Mem is already allocated.\n",
3137 __func__);
3138 return;
3139 }
3140
3141 /* Allocate memory for Fibre Channel Event Buffer. */
3142 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3143 GFP_KERNEL);
3144 if (!tc) {
3145 ql_log(ql_log_warn, vha, 0x00be,
3146 "Unable to allocate (%d KB) for FCE.\n",
3147 FCE_SIZE / 1024);
3148 return;
3149 }
3150
3151 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3152 ha->fce_mb, &ha->fce_bufs);
3153 if (rval) {
3154 ql_log(ql_log_warn, vha, 0x00bf,
3155 "Unable to initialize FCE (%d).\n", rval);
3156 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma);
3157 return;
3158 }
3159
3160 ql_dbg(ql_dbg_init, vha, 0x00c0,
3161 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024);
3162
3163 ha->flags.fce_enabled = 1;
3164 ha->fce_dma = tc_dma;
3165 ha->fce = tc;
3166 }
3167
3168 static void
3169 qla2x00_init_eft_trace(scsi_qla_host_t *vha)
3170 {
3171 int rval;
3172 dma_addr_t tc_dma;
3173 void *tc;
3174 struct qla_hw_data *ha = vha->hw;
3175
3176 if (!IS_FWI2_CAPABLE(ha))
3177 return;
3178
3179 if (ha->eft) {
3180 ql_dbg(ql_dbg_init, vha, 0x00bd,
3181 "%s: EFT Mem is already allocated.\n",
3182 __func__);
3183 return;
3184 }
3185
3186 /* Allocate memory for Extended Trace Buffer. */
3187 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3188 GFP_KERNEL);
3189 if (!tc) {
3190 ql_log(ql_log_warn, vha, 0x00c1,
3191 "Unable to allocate (%d KB) for EFT.\n",
3192 EFT_SIZE / 1024);
3193 return;
3194 }
3195
3196 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3197 if (rval) {
3198 ql_log(ql_log_warn, vha, 0x00c2,
3199 "Unable to initialize EFT (%d).\n", rval);
3200 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma);
3201 return;
3202 }
3203
3204 ql_dbg(ql_dbg_init, vha, 0x00c3,
3205 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3206
3207 ha->eft_dma = tc_dma;
3208 ha->eft = tc;
3209 }
3210
3211 static void
3212 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3213 {
3214 qla2x00_init_fce_trace(vha);
3215 qla2x00_init_eft_trace(vha);
3216 }
3217
3218 void
3219 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3220 {
3221 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3222 eft_size, fce_size, mq_size;
3223 struct qla_hw_data *ha = vha->hw;
3224 struct req_que *req = ha->req_q_map[0];
3225 struct rsp_que *rsp = ha->rsp_q_map[0];
3226 struct qla2xxx_fw_dump *fw_dump;
3227
3228 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3229 req_q_size = rsp_q_size = 0;
3230
3231 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3232 fixed_size = sizeof(struct qla2100_fw_dump);
3233 } else if (IS_QLA23XX(ha)) {
3234 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3235 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3236 sizeof(uint16_t);
3237 } else if (IS_FWI2_CAPABLE(ha)) {
3238 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
3239 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3240 else if (IS_QLA81XX(ha))
3241 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3242 else if (IS_QLA25XX(ha))
3243 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3244 else
3245 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3246
3247 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3248 sizeof(uint32_t);
3249 if (ha->mqenable) {
3250 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) &&
3251 !IS_QLA28XX(ha))
3252 mq_size = sizeof(struct qla2xxx_mq_chain);
3253 /*
3254 * Allocate maximum buffer size for all queues - Q0.
3255 * Resizing must be done at end-of-dump processing.
3256 */
3257 mq_size += (ha->max_req_queues - 1) *
3258 (req->length * sizeof(request_t));
3259 mq_size += (ha->max_rsp_queues - 1) *
3260 (rsp->length * sizeof(response_t));
3261 }
3262 if (ha->tgt.atio_ring)
3263 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3264
3265 qla2x00_init_fce_trace(vha);
3266 if (ha->fce)
3267 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3268 qla2x00_init_eft_trace(vha);
3269 if (ha->eft)
3270 eft_size = EFT_SIZE;
3271 }
3272
3273 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3274 struct fwdt *fwdt = ha->fwdt;
3275 uint j;
3276
3277 for (j = 0; j < 2; j++, fwdt++) {
3278 if (!fwdt->template) {
3279 ql_dbg(ql_dbg_init, vha, 0x00ba,
3280 "-> fwdt%u no template\n", j);
3281 continue;
3282 }
3283 ql_dbg(ql_dbg_init, vha, 0x00fa,
3284 "-> fwdt%u calculating fwdump size...\n", j);
3285 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size(
3286 vha, fwdt->template);
3287 ql_dbg(ql_dbg_init, vha, 0x00fa,
3288 "-> fwdt%u calculated fwdump size = %#lx bytes\n",
3289 j, fwdt->dump_size);
3290 dump_size += fwdt->dump_size;
3291 }
3292 } else {
3293 req_q_size = req->length * sizeof(request_t);
3294 rsp_q_size = rsp->length * sizeof(response_t);
3295 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3296 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size
3297 + eft_size;
3298 ha->chain_offset = dump_size;
3299 dump_size += mq_size + fce_size;
3300 if (ha->exchoffld_buf)
3301 dump_size += sizeof(struct qla2xxx_offld_chain) +
3302 ha->exchoffld_size;
3303 if (ha->exlogin_buf)
3304 dump_size += sizeof(struct qla2xxx_offld_chain) +
3305 ha->exlogin_size;
3306 }
3307
3308 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) {
3309
3310 ql_dbg(ql_dbg_init, vha, 0x00c5,
3311 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n",
3312 __func__, dump_size, ha->fw_dump_len,
3313 ha->fw_dump_alloc_len);
3314
3315 fw_dump = vmalloc(dump_size);
3316 if (!fw_dump) {
3317 ql_log(ql_log_warn, vha, 0x00c4,
3318 "Unable to allocate (%d KB) for firmware dump.\n",
3319 dump_size / 1024);
3320 } else {
3321 mutex_lock(&ha->optrom_mutex);
3322 if (ha->fw_dumped) {
3323 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len);
3324 vfree(ha->fw_dump);
3325 ha->fw_dump = fw_dump;
3326 ha->fw_dump_alloc_len = dump_size;
3327 ql_dbg(ql_dbg_init, vha, 0x00c5,
3328 "Re-Allocated (%d KB) and save firmware dump.\n",
3329 dump_size / 1024);
3330 } else {
3331 if (ha->fw_dump)
3332 vfree(ha->fw_dump);
3333 ha->fw_dump = fw_dump;
3334
3335 ha->fw_dump_len = ha->fw_dump_alloc_len =
3336 dump_size;
3337 ql_dbg(ql_dbg_init, vha, 0x00c5,
3338 "Allocated (%d KB) for firmware dump.\n",
3339 dump_size / 1024);
3340
3341 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
3342 mutex_unlock(&ha->optrom_mutex);
3343 return;
3344 }
3345
3346 ha->fw_dump->signature[0] = 'Q';
3347 ha->fw_dump->signature[1] = 'L';
3348 ha->fw_dump->signature[2] = 'G';
3349 ha->fw_dump->signature[3] = 'C';
3350 ha->fw_dump->version = htonl(1);
3351
3352 ha->fw_dump->fixed_size = htonl(fixed_size);
3353 ha->fw_dump->mem_size = htonl(mem_size);
3354 ha->fw_dump->req_q_size = htonl(req_q_size);
3355 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3356
3357 ha->fw_dump->eft_size = htonl(eft_size);
3358 ha->fw_dump->eft_addr_l =
3359 htonl(LSD(ha->eft_dma));
3360 ha->fw_dump->eft_addr_h =
3361 htonl(MSD(ha->eft_dma));
3362
3363 ha->fw_dump->header_size =
3364 htonl(offsetof
3365 (struct qla2xxx_fw_dump, isp));
3366 }
3367 mutex_unlock(&ha->optrom_mutex);
3368 }
3369 }
3370 }
3371
3372 static int
3373 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3374 {
3375 #define MPS_MASK 0xe0
3376 int rval;
3377 uint16_t dc;
3378 uint32_t dw;
3379
3380 if (!IS_QLA81XX(vha->hw))
3381 return QLA_SUCCESS;
3382
3383 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3384 if (rval != QLA_SUCCESS) {
3385 ql_log(ql_log_warn, vha, 0x0105,
3386 "Unable to acquire semaphore.\n");
3387 goto done;
3388 }
3389
3390 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3391 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3392 if (rval != QLA_SUCCESS) {
3393 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3394 goto done_release;
3395 }
3396
3397 dc &= MPS_MASK;
3398 if (dc == (dw & MPS_MASK))
3399 goto done_release;
3400
3401 dw &= ~MPS_MASK;
3402 dw |= dc;
3403 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3404 if (rval != QLA_SUCCESS) {
3405 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3406 }
3407
3408 done_release:
3409 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3410 if (rval != QLA_SUCCESS) {
3411 ql_log(ql_log_warn, vha, 0x006d,
3412 "Unable to release semaphore.\n");
3413 }
3414
3415 done:
3416 return rval;
3417 }
3418
3419 int
3420 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3421 {
3422 /* Don't try to reallocate the array */
3423 if (req->outstanding_cmds)
3424 return QLA_SUCCESS;
3425
3426 if (!IS_FWI2_CAPABLE(ha))
3427 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3428 else {
3429 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3430 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3431 else
3432 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3433 }
3434
3435 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3436 sizeof(srb_t *),
3437 GFP_KERNEL);
3438
3439 if (!req->outstanding_cmds) {
3440 /*
3441 * Try to allocate a minimal size just so we can get through
3442 * initialization.
3443 */
3444 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3445 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3446 sizeof(srb_t *),
3447 GFP_KERNEL);
3448
3449 if (!req->outstanding_cmds) {
3450 ql_log(ql_log_fatal, NULL, 0x0126,
3451 "Failed to allocate memory for "
3452 "outstanding_cmds for req_que %p.\n", req);
3453 req->num_outstanding_cmds = 0;
3454 return QLA_FUNCTION_FAILED;
3455 }
3456 }
3457
3458 return QLA_SUCCESS;
3459 }
3460
3461 #define PRINT_FIELD(_field, _flag, _str) { \
3462 if (a0->_field & _flag) {\
3463 if (p) {\
3464 strcat(ptr, "|");\
3465 ptr++;\
3466 leftover--;\
3467 } \
3468 len = snprintf(ptr, leftover, "%s", _str); \
3469 p = 1;\
3470 leftover -= len;\
3471 ptr += len; \
3472 } \
3473 }
3474
3475 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3476 {
3477 #define STR_LEN 64
3478 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3479 u8 str[STR_LEN], *ptr, p;
3480 int leftover, len;
3481
3482 memset(str, 0, STR_LEN);
3483 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3484 ql_dbg(ql_dbg_init, vha, 0x015a,
3485 "SFP MFG Name: %s\n", str);
3486
3487 memset(str, 0, STR_LEN);
3488 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3489 ql_dbg(ql_dbg_init, vha, 0x015c,
3490 "SFP Part Name: %s\n", str);
3491
3492 /* media */
3493 memset(str, 0, STR_LEN);
3494 ptr = str;
3495 leftover = STR_LEN;
3496 p = len = 0;
3497 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3498 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3499 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3500 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3501 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3502 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3503 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3504 ql_dbg(ql_dbg_init, vha, 0x0160,
3505 "SFP Media: %s\n", str);
3506
3507 /* link length */
3508 memset(str, 0, STR_LEN);
3509 ptr = str;
3510 leftover = STR_LEN;
3511 p = len = 0;
3512 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3513 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3514 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3515 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3516 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3517 ql_dbg(ql_dbg_init, vha, 0x0196,
3518 "SFP Link Length: %s\n", str);
3519
3520 memset(str, 0, STR_LEN);
3521 ptr = str;
3522 leftover = STR_LEN;
3523 p = len = 0;
3524 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3525 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3526 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3527 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3528 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3529 ql_dbg(ql_dbg_init, vha, 0x016e,
3530 "SFP FC Link Tech: %s\n", str);
3531
3532 if (a0->length_km)
3533 ql_dbg(ql_dbg_init, vha, 0x016f,
3534 "SFP Distant: %d km\n", a0->length_km);
3535 if (a0->length_100m)
3536 ql_dbg(ql_dbg_init, vha, 0x0170,
3537 "SFP Distant: %d m\n", a0->length_100m*100);
3538 if (a0->length_50um_10m)
3539 ql_dbg(ql_dbg_init, vha, 0x0189,
3540 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3541 if (a0->length_62um_10m)
3542 ql_dbg(ql_dbg_init, vha, 0x018a,
3543 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3544 if (a0->length_om4_10m)
3545 ql_dbg(ql_dbg_init, vha, 0x0194,
3546 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3547 if (a0->length_om3_10m)
3548 ql_dbg(ql_dbg_init, vha, 0x0195,
3549 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3550 }
3551
3552
3553 /**
3554 * qla24xx_detect_sfp()
3555 *
3556 * @vha: adapter state pointer.
3557 *
3558 * @return
3559 * 0 -- Configure firmware to use short-range settings -- normal
3560 * buffer-to-buffer credits.
3561 *
3562 * 1 -- Configure firmware to use long-range settings -- extra
3563 * buffer-to-buffer credits should be allocated with
3564 * ha->lr_distance containing distance settings from NVRAM or SFP
3565 * (if supported).
3566 */
3567 int
3568 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3569 {
3570 int rc, used_nvram;
3571 struct sff_8247_a0 *a;
3572 struct qla_hw_data *ha = vha->hw;
3573 struct nvram_81xx *nv = ha->nvram;
3574 #define LR_DISTANCE_UNKNOWN 2
3575 static const char * const types[] = { "Short", "Long" };
3576 static const char * const lengths[] = { "(10km)", "(5km)", "" };
3577 u8 ll = 0;
3578
3579 /* Seed with NVRAM settings. */
3580 used_nvram = 0;
3581 ha->flags.lr_detected = 0;
3582 if (IS_BPM_RANGE_CAPABLE(ha) &&
3583 (nv->enhanced_features & NEF_LR_DIST_ENABLE)) {
3584 used_nvram = 1;
3585 ha->flags.lr_detected = 1;
3586 ha->lr_distance =
3587 (nv->enhanced_features >> LR_DIST_NV_POS)
3588 & LR_DIST_NV_MASK;
3589 }
3590
3591 if (!IS_BPM_ENABLED(vha))
3592 goto out;
3593 /* Determine SR/LR capabilities of SFP/Transceiver. */
3594 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3595 if (rc)
3596 goto out;
3597
3598 used_nvram = 0;
3599 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3600 qla2xxx_print_sfp_info(vha);
3601
3602 ha->flags.lr_detected = 0;
3603 ll = a->fc_ll_cc7;
3604 if (ll & FC_LL_VL || ll & FC_LL_L) {
3605 /* Long range, track length. */
3606 ha->flags.lr_detected = 1;
3607
3608 if (a->length_km > 5 || a->length_100m > 50)
3609 ha->lr_distance = LR_DISTANCE_10K;
3610 else
3611 ha->lr_distance = LR_DISTANCE_5K;
3612 }
3613
3614 out:
3615 ql_dbg(ql_dbg_async, vha, 0x507b,
3616 "SFP detect: %s-Range SFP %s (nvr=%x ll=%x lr=%x lrd=%x).\n",
3617 types[ha->flags.lr_detected],
3618 ha->flags.lr_detected ? lengths[ha->lr_distance] :
3619 lengths[LR_DISTANCE_UNKNOWN],
3620 used_nvram, ll, ha->flags.lr_detected, ha->lr_distance);
3621 return ha->flags.lr_detected;
3622 }
3623
3624 /**
3625 * qla2x00_setup_chip() - Load and start RISC firmware.
3626 * @vha: HA context
3627 *
3628 * Returns 0 on success.
3629 */
3630 static int
3631 qla2x00_setup_chip(scsi_qla_host_t *vha)
3632 {
3633 int rval;
3634 uint32_t srisc_address = 0;
3635 struct qla_hw_data *ha = vha->hw;
3636 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3637 unsigned long flags;
3638 uint16_t fw_major_version;
3639 int done_once = 0;
3640
3641 if (IS_P3P_TYPE(ha)) {
3642 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3643 if (rval == QLA_SUCCESS) {
3644 qla2x00_stop_firmware(vha);
3645 goto enable_82xx_npiv;
3646 } else
3647 goto failed;
3648 }
3649
3650 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3651 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3652 spin_lock_irqsave(&ha->hardware_lock, flags);
3653 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3654 RD_REG_WORD(&reg->hccr);
3655 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3656 }
3657
3658 qla81xx_mpi_sync(vha);
3659
3660 execute_fw_with_lr:
3661 /* Load firmware sequences */
3662 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3663 if (rval == QLA_SUCCESS) {
3664 ql_dbg(ql_dbg_init, vha, 0x00c9,
3665 "Verifying Checksum of loaded RISC code.\n");
3666
3667 rval = qla2x00_verify_checksum(vha, srisc_address);
3668 if (rval == QLA_SUCCESS) {
3669 /* Start firmware execution. */
3670 ql_dbg(ql_dbg_init, vha, 0x00ca,
3671 "Starting firmware.\n");
3672
3673 if (ql2xexlogins)
3674 ha->flags.exlogins_enabled = 1;
3675
3676 if (qla_is_exch_offld_enabled(vha))
3677 ha->flags.exchoffld_enabled = 1;
3678
3679 rval = qla2x00_execute_fw(vha, srisc_address);
3680 /* Retrieve firmware information. */
3681 if (rval == QLA_SUCCESS) {
3682 /* Enable BPM support? */
3683 if (!done_once++ && qla24xx_detect_sfp(vha)) {
3684 ql_dbg(ql_dbg_init, vha, 0x00ca,
3685 "Re-starting firmware -- BPM.\n");
3686 /* Best-effort - re-init. */
3687 ha->isp_ops->reset_chip(vha);
3688 ha->isp_ops->chip_diag(vha);
3689 goto execute_fw_with_lr;
3690 }
3691
3692 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3693 IS_QLA28XX(ha)) &&
3694 (ha->zio_mode == QLA_ZIO_MODE_6))
3695 qla27xx_set_zio_threshold(vha,
3696 ha->last_zio_threshold);
3697
3698 rval = qla2x00_set_exlogins_buffer(vha);
3699 if (rval != QLA_SUCCESS)
3700 goto failed;
3701
3702 rval = qla2x00_set_exchoffld_buffer(vha);
3703 if (rval != QLA_SUCCESS)
3704 goto failed;
3705
3706 enable_82xx_npiv:
3707 fw_major_version = ha->fw_major_version;
3708 if (IS_P3P_TYPE(ha))
3709 qla82xx_check_md_needed(vha);
3710 else
3711 rval = qla2x00_get_fw_version(vha);
3712 if (rval != QLA_SUCCESS)
3713 goto failed;
3714 ha->flags.npiv_supported = 0;
3715 if (IS_QLA2XXX_MIDTYPE(ha) &&
3716 (ha->fw_attributes & BIT_2)) {
3717 ha->flags.npiv_supported = 1;
3718 if ((!ha->max_npiv_vports) ||
3719 ((ha->max_npiv_vports + 1) %
3720 MIN_MULTI_ID_FABRIC))
3721 ha->max_npiv_vports =
3722 MIN_MULTI_ID_FABRIC - 1;
3723 }
3724 qla2x00_get_resource_cnts(vha);
3725
3726 /*
3727 * Allocate the array of outstanding commands
3728 * now that we know the firmware resources.
3729 */
3730 rval = qla2x00_alloc_outstanding_cmds(ha,
3731 vha->req);
3732 if (rval != QLA_SUCCESS)
3733 goto failed;
3734
3735 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3736 qla2x00_alloc_offload_mem(vha);
3737
3738 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3739 qla2x00_alloc_fw_dump(vha);
3740
3741 } else {
3742 goto failed;
3743 }
3744 } else {
3745 ql_log(ql_log_fatal, vha, 0x00cd,
3746 "ISP Firmware failed checksum.\n");
3747 goto failed;
3748 }
3749
3750 /* Enable PUREX PASSTHRU */
3751 if (ql2xrdpenable)
3752 qla25xx_set_els_cmds_supported(vha);
3753 } else
3754 goto failed;
3755
3756 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3757 /* Enable proper parity. */
3758 spin_lock_irqsave(&ha->hardware_lock, flags);
3759 if (IS_QLA2300(ha))
3760 /* SRAM parity */
3761 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3762 else
3763 /* SRAM, Instruction RAM and GP RAM parity */
3764 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3765 RD_REG_WORD(&reg->hccr);
3766 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3767 }
3768
3769 if (IS_QLA27XX(ha) || IS_QLA28XX(ha))
3770 ha->flags.fac_supported = 1;
3771 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3772 uint32_t size;
3773
3774 rval = qla81xx_fac_get_sector_size(vha, &size);
3775 if (rval == QLA_SUCCESS) {
3776 ha->flags.fac_supported = 1;
3777 ha->fdt_block_size = size << 2;
3778 } else {
3779 ql_log(ql_log_warn, vha, 0x00ce,
3780 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3781 ha->fw_major_version, ha->fw_minor_version,
3782 ha->fw_subminor_version);
3783
3784 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3785 IS_QLA28XX(ha)) {
3786 ha->flags.fac_supported = 0;
3787 rval = QLA_SUCCESS;
3788 }
3789 }
3790 }
3791 failed:
3792 if (rval) {
3793 ql_log(ql_log_fatal, vha, 0x00cf,
3794 "Setup chip ****FAILED****.\n");
3795 }
3796
3797 return (rval);
3798 }
3799
3800 /**
3801 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3802 * @rsp: response queue
3803 *
3804 * Beginning of request ring has initialization control block already built
3805 * by nvram config routine.
3806 *
3807 * Returns 0 on success.
3808 */
3809 void
3810 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3811 {
3812 uint16_t cnt;
3813 response_t *pkt;
3814
3815 rsp->ring_ptr = rsp->ring;
3816 rsp->ring_index = 0;
3817 rsp->status_srb = NULL;
3818 pkt = rsp->ring_ptr;
3819 for (cnt = 0; cnt < rsp->length; cnt++) {
3820 pkt->signature = RESPONSE_PROCESSED;
3821 pkt++;
3822 }
3823 }
3824
3825 /**
3826 * qla2x00_update_fw_options() - Read and process firmware options.
3827 * @vha: HA context
3828 *
3829 * Returns 0 on success.
3830 */
3831 void
3832 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3833 {
3834 uint16_t swing, emphasis, tx_sens, rx_sens;
3835 struct qla_hw_data *ha = vha->hw;
3836
3837 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3838 qla2x00_get_fw_options(vha, ha->fw_options);
3839
3840 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3841 return;
3842
3843 /* Serial Link options. */
3844 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3845 "Serial link options.\n");
3846 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3847 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options));
3848
3849 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3850 if (ha->fw_seriallink_options[3] & BIT_2) {
3851 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3852
3853 /* 1G settings */
3854 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3855 emphasis = (ha->fw_seriallink_options[2] &
3856 (BIT_4 | BIT_3)) >> 3;
3857 tx_sens = ha->fw_seriallink_options[0] &
3858 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3859 rx_sens = (ha->fw_seriallink_options[0] &
3860 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3861 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3862 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3863 if (rx_sens == 0x0)
3864 rx_sens = 0x3;
3865 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3866 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3867 ha->fw_options[10] |= BIT_5 |
3868 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3869 (tx_sens & (BIT_1 | BIT_0));
3870
3871 /* 2G settings */
3872 swing = (ha->fw_seriallink_options[2] &
3873 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3874 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3875 tx_sens = ha->fw_seriallink_options[1] &
3876 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3877 rx_sens = (ha->fw_seriallink_options[1] &
3878 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3879 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3880 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3881 if (rx_sens == 0x0)
3882 rx_sens = 0x3;
3883 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3884 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3885 ha->fw_options[11] |= BIT_5 |
3886 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3887 (tx_sens & (BIT_1 | BIT_0));
3888 }
3889
3890 /* FCP2 options. */
3891 /* Return command IOCBs without waiting for an ABTS to complete. */
3892 ha->fw_options[3] |= BIT_13;
3893
3894 /* LED scheme. */
3895 if (ha->flags.enable_led_scheme)
3896 ha->fw_options[2] |= BIT_12;
3897
3898 /* Detect ISP6312. */
3899 if (IS_QLA6312(ha))
3900 ha->fw_options[2] |= BIT_13;
3901
3902 /* Set Retry FLOGI in case of P2P connection */
3903 if (ha->operating_mode == P2P) {
3904 ha->fw_options[2] |= BIT_3;
3905 ql_dbg(ql_dbg_disc, vha, 0x2100,
3906 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3907 __func__, ha->fw_options[2]);
3908 }
3909
3910 /* Update firmware options. */
3911 qla2x00_set_fw_options(vha, ha->fw_options);
3912 }
3913
3914 void
3915 qla24xx_update_fw_options(scsi_qla_host_t *vha)
3916 {
3917 int rval;
3918 struct qla_hw_data *ha = vha->hw;
3919
3920 if (IS_P3P_TYPE(ha))
3921 return;
3922
3923 /* Hold status IOCBs until ABTS response received. */
3924 if (ql2xfwholdabts)
3925 ha->fw_options[3] |= BIT_12;
3926
3927 /* Set Retry FLOGI in case of P2P connection */
3928 if (ha->operating_mode == P2P) {
3929 ha->fw_options[2] |= BIT_3;
3930 ql_dbg(ql_dbg_disc, vha, 0x2101,
3931 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3932 __func__, ha->fw_options[2]);
3933 }
3934
3935 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3936 if (ql2xmvasynctoatio &&
3937 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
3938 if (qla_tgt_mode_enabled(vha) ||
3939 qla_dual_mode_enabled(vha))
3940 ha->fw_options[2] |= BIT_11;
3941 else
3942 ha->fw_options[2] &= ~BIT_11;
3943 }
3944
3945 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3946 IS_QLA28XX(ha)) {
3947 /*
3948 * Tell FW to track each exchange to prevent
3949 * driver from using stale exchange.
3950 */
3951 if (qla_tgt_mode_enabled(vha) ||
3952 qla_dual_mode_enabled(vha))
3953 ha->fw_options[2] |= BIT_4;
3954 else
3955 ha->fw_options[2] &= ~BIT_4;
3956
3957 /* Reserve 1/2 of emergency exchanges for ELS.*/
3958 if (qla2xuseresexchforels)
3959 ha->fw_options[2] |= BIT_8;
3960 else
3961 ha->fw_options[2] &= ~BIT_8;
3962 }
3963
3964 if (ql2xrdpenable)
3965 ha->fw_options[1] |= ADD_FO1_ENABLE_PUREX_IOCB;
3966
3967 /* Enable Async 8130/8131 events -- transceiver insertion/removal */
3968 if (IS_BPM_RANGE_CAPABLE(ha))
3969 ha->fw_options[3] |= BIT_10;
3970
3971 ql_dbg(ql_dbg_init, vha, 0x00e8,
3972 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3973 __func__, ha->fw_options[1], ha->fw_options[2],
3974 ha->fw_options[3], vha->host->active_mode);
3975
3976 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3977 qla2x00_set_fw_options(vha, ha->fw_options);
3978
3979 /* Update Serial Link options. */
3980 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
3981 return;
3982
3983 rval = qla2x00_set_serdes_params(vha,
3984 le16_to_cpu(ha->fw_seriallink_options24[1]),
3985 le16_to_cpu(ha->fw_seriallink_options24[2]),
3986 le16_to_cpu(ha->fw_seriallink_options24[3]));
3987 if (rval != QLA_SUCCESS) {
3988 ql_log(ql_log_warn, vha, 0x0104,
3989 "Unable to update Serial Link options (%x).\n", rval);
3990 }
3991 }
3992
3993 void
3994 qla2x00_config_rings(struct scsi_qla_host *vha)
3995 {
3996 struct qla_hw_data *ha = vha->hw;
3997 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3998 struct req_que *req = ha->req_q_map[0];
3999 struct rsp_que *rsp = ha->rsp_q_map[0];
4000
4001 /* Setup ring parameters in initialization control block. */
4002 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
4003 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
4004 ha->init_cb->request_q_length = cpu_to_le16(req->length);
4005 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
4006 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address);
4007 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address);
4008
4009 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
4010 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
4011 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
4012 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
4013 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
4014 }
4015
4016 void
4017 qla24xx_config_rings(struct scsi_qla_host *vha)
4018 {
4019 struct qla_hw_data *ha = vha->hw;
4020 device_reg_t *reg = ISP_QUE_REG(ha, 0);
4021 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
4022 struct qla_msix_entry *msix;
4023 struct init_cb_24xx *icb;
4024 uint16_t rid = 0;
4025 struct req_que *req = ha->req_q_map[0];
4026 struct rsp_que *rsp = ha->rsp_q_map[0];
4027
4028 /* Setup ring parameters in initialization control block. */
4029 icb = (struct init_cb_24xx *)ha->init_cb;
4030 icb->request_q_outpointer = cpu_to_le16(0);
4031 icb->response_q_inpointer = cpu_to_le16(0);
4032 icb->request_q_length = cpu_to_le16(req->length);
4033 icb->response_q_length = cpu_to_le16(rsp->length);
4034 put_unaligned_le64(req->dma, &icb->request_q_address);
4035 put_unaligned_le64(rsp->dma, &icb->response_q_address);
4036
4037 /* Setup ATIO queue dma pointers for target mode */
4038 icb->atio_q_inpointer = cpu_to_le16(0);
4039 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
4040 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address);
4041
4042 if (IS_SHADOW_REG_CAPABLE(ha))
4043 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
4044
4045 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
4046 IS_QLA28XX(ha)) {
4047 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
4048 icb->rid = cpu_to_le16(rid);
4049 if (ha->flags.msix_enabled) {
4050 msix = &ha->msix_entries[1];
4051 ql_dbg(ql_dbg_init, vha, 0x0019,
4052 "Registering vector 0x%x for base que.\n",
4053 msix->entry);
4054 icb->msix = cpu_to_le16(msix->entry);
4055 }
4056 /* Use alternate PCI bus number */
4057 if (MSB(rid))
4058 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
4059 /* Use alternate PCI devfn */
4060 if (LSB(rid))
4061 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
4062
4063 /* Use Disable MSIX Handshake mode for capable adapters */
4064 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
4065 (ha->flags.msix_enabled)) {
4066 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
4067 ha->flags.disable_msix_handshake = 1;
4068 ql_dbg(ql_dbg_init, vha, 0x00fe,
4069 "MSIX Handshake Disable Mode turned on.\n");
4070 } else {
4071 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
4072 }
4073 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
4074
4075 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
4076 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
4077 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
4078 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
4079 } else {
4080 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
4081 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
4082 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
4083 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
4084 }
4085
4086 qlt_24xx_config_rings(vha);
4087
4088 /* If the user has configured the speed, set it here */
4089 if (ha->set_data_rate) {
4090 ql_dbg(ql_dbg_init, vha, 0x00fd,
4091 "Speed set by user : %s Gbps \n",
4092 qla2x00_get_link_speed_str(ha, ha->set_data_rate));
4093 icb->firmware_options_3 = (ha->set_data_rate << 13);
4094 }
4095
4096 /* PCI posting */
4097 RD_REG_DWORD(&ioreg->hccr);
4098 }
4099
4100 /**
4101 * qla2x00_init_rings() - Initializes firmware.
4102 * @vha: HA context
4103 *
4104 * Beginning of request ring has initialization control block already built
4105 * by nvram config routine.
4106 *
4107 * Returns 0 on success.
4108 */
4109 int
4110 qla2x00_init_rings(scsi_qla_host_t *vha)
4111 {
4112 int rval;
4113 unsigned long flags = 0;
4114 int cnt, que;
4115 struct qla_hw_data *ha = vha->hw;
4116 struct req_que *req;
4117 struct rsp_que *rsp;
4118 struct mid_init_cb_24xx *mid_init_cb =
4119 (struct mid_init_cb_24xx *) ha->init_cb;
4120
4121 spin_lock_irqsave(&ha->hardware_lock, flags);
4122
4123 /* Clear outstanding commands array. */
4124 for (que = 0; que < ha->max_req_queues; que++) {
4125 req = ha->req_q_map[que];
4126 if (!req || !test_bit(que, ha->req_qid_map))
4127 continue;
4128 req->out_ptr = (void *)(req->ring + req->length);
4129 *req->out_ptr = 0;
4130 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
4131 req->outstanding_cmds[cnt] = NULL;
4132
4133 req->current_outstanding_cmd = 1;
4134
4135 /* Initialize firmware. */
4136 req->ring_ptr = req->ring;
4137 req->ring_index = 0;
4138 req->cnt = req->length;
4139 }
4140
4141 for (que = 0; que < ha->max_rsp_queues; que++) {
4142 rsp = ha->rsp_q_map[que];
4143 if (!rsp || !test_bit(que, ha->rsp_qid_map))
4144 continue;
4145 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
4146 *rsp->in_ptr = 0;
4147 /* Initialize response queue entries */
4148 if (IS_QLAFX00(ha))
4149 qlafx00_init_response_q_entries(rsp);
4150 else
4151 qla2x00_init_response_q_entries(rsp);
4152 }
4153
4154 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4155 ha->tgt.atio_ring_index = 0;
4156 /* Initialize ATIO queue entries */
4157 qlt_init_atio_q_entries(vha);
4158
4159 ha->isp_ops->config_rings(vha);
4160
4161 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4162
4163 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4164
4165 if (IS_QLAFX00(ha)) {
4166 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4167 goto next_check;
4168 }
4169
4170 /* Update any ISP specific firmware options before initialization. */
4171 ha->isp_ops->update_fw_options(vha);
4172
4173 if (ha->flags.npiv_supported) {
4174 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4175 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4176 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4177 }
4178
4179 if (IS_FWI2_CAPABLE(ha)) {
4180 mid_init_cb->options = cpu_to_le16(BIT_1);
4181 mid_init_cb->init_cb.execution_throttle =
4182 cpu_to_le16(ha->cur_fw_xcb_count);
4183 ha->flags.dport_enabled =
4184 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
4185 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4186 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4187 /* FA-WWPN Status */
4188 ha->flags.fawwpn_enabled =
4189 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
4190 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4191 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4192 }
4193
4194 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4195 next_check:
4196 if (rval) {
4197 ql_log(ql_log_fatal, vha, 0x00d2,
4198 "Init Firmware **** FAILED ****.\n");
4199 } else {
4200 ql_dbg(ql_dbg_init, vha, 0x00d3,
4201 "Init Firmware -- success.\n");
4202 QLA_FW_STARTED(ha);
4203 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
4204 }
4205
4206 return (rval);
4207 }
4208
4209 /**
4210 * qla2x00_fw_ready() - Waits for firmware ready.
4211 * @vha: HA context
4212 *
4213 * Returns 0 on success.
4214 */
4215 static int
4216 qla2x00_fw_ready(scsi_qla_host_t *vha)
4217 {
4218 int rval;
4219 unsigned long wtime, mtime, cs84xx_time;
4220 uint16_t min_wait; /* Minimum wait time if loop is down */
4221 uint16_t wait_time; /* Wait time if loop is coming ready */
4222 uint16_t state[6];
4223 struct qla_hw_data *ha = vha->hw;
4224
4225 if (IS_QLAFX00(vha->hw))
4226 return qlafx00_fw_ready(vha);
4227
4228 rval = QLA_SUCCESS;
4229
4230 /* Time to wait for loop down */
4231 if (IS_P3P_TYPE(ha))
4232 min_wait = 30;
4233 else
4234 min_wait = 20;
4235
4236 /*
4237 * Firmware should take at most one RATOV to login, plus 5 seconds for
4238 * our own processing.
4239 */
4240 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4241 wait_time = min_wait;
4242 }
4243
4244 /* Min wait time if loop down */
4245 mtime = jiffies + (min_wait * HZ);
4246
4247 /* wait time before firmware ready */
4248 wtime = jiffies + (wait_time * HZ);
4249
4250 /* Wait for ISP to finish LIP */
4251 if (!vha->flags.init_done)
4252 ql_log(ql_log_info, vha, 0x801e,
4253 "Waiting for LIP to complete.\n");
4254
4255 do {
4256 memset(state, -1, sizeof(state));
4257 rval = qla2x00_get_firmware_state(vha, state);
4258 if (rval == QLA_SUCCESS) {
4259 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4260 vha->device_flags &= ~DFLG_NO_CABLE;
4261 }
4262 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4263 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4264 "fw_state=%x 84xx=%x.\n", state[0],
4265 state[2]);
4266 if ((state[2] & FSTATE_LOGGED_IN) &&
4267 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4268 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4269 "Sending verify iocb.\n");
4270
4271 cs84xx_time = jiffies;
4272 rval = qla84xx_init_chip(vha);
4273 if (rval != QLA_SUCCESS) {
4274 ql_log(ql_log_warn,
4275 vha, 0x8007,
4276 "Init chip failed.\n");
4277 break;
4278 }
4279
4280 /* Add time taken to initialize. */
4281 cs84xx_time = jiffies - cs84xx_time;
4282 wtime += cs84xx_time;
4283 mtime += cs84xx_time;
4284 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4285 "Increasing wait time by %ld. "
4286 "New time %ld.\n", cs84xx_time,
4287 wtime);
4288 }
4289 } else if (state[0] == FSTATE_READY) {
4290 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4291 "F/W Ready - OK.\n");
4292
4293 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4294 &ha->login_timeout, &ha->r_a_tov);
4295
4296 rval = QLA_SUCCESS;
4297 break;
4298 }
4299
4300 rval = QLA_FUNCTION_FAILED;
4301
4302 if (atomic_read(&vha->loop_down_timer) &&
4303 state[0] != FSTATE_READY) {
4304 /* Loop down. Timeout on min_wait for states
4305 * other than Wait for Login.
4306 */
4307 if (time_after_eq(jiffies, mtime)) {
4308 ql_log(ql_log_info, vha, 0x8038,
4309 "Cable is unplugged...\n");
4310
4311 vha->device_flags |= DFLG_NO_CABLE;
4312 break;
4313 }
4314 }
4315 } else {
4316 /* Mailbox cmd failed. Timeout on min_wait. */
4317 if (time_after_eq(jiffies, mtime) ||
4318 ha->flags.isp82xx_fw_hung)
4319 break;
4320 }
4321
4322 if (time_after_eq(jiffies, wtime))
4323 break;
4324
4325 /* Delay for a while */
4326 msleep(500);
4327 } while (1);
4328
4329 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4330 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4331 state[1], state[2], state[3], state[4], state[5], jiffies);
4332
4333 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4334 ql_log(ql_log_warn, vha, 0x803b,
4335 "Firmware ready **** FAILED ****.\n");
4336 }
4337
4338 return (rval);
4339 }
4340
4341 /*
4342 * qla2x00_configure_hba
4343 * Setup adapter context.
4344 *
4345 * Input:
4346 * ha = adapter state pointer.
4347 *
4348 * Returns:
4349 * 0 = success
4350 *
4351 * Context:
4352 * Kernel context.
4353 */
4354 static int
4355 qla2x00_configure_hba(scsi_qla_host_t *vha)
4356 {
4357 int rval;
4358 uint16_t loop_id;
4359 uint16_t topo;
4360 uint16_t sw_cap;
4361 uint8_t al_pa;
4362 uint8_t area;
4363 uint8_t domain;
4364 char connect_type[22];
4365 struct qla_hw_data *ha = vha->hw;
4366 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4367 port_id_t id;
4368 unsigned long flags;
4369
4370 /* Get host addresses. */
4371 rval = qla2x00_get_adapter_id(vha,
4372 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4373 if (rval != QLA_SUCCESS) {
4374 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4375 IS_CNA_CAPABLE(ha) ||
4376 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4377 ql_dbg(ql_dbg_disc, vha, 0x2008,
4378 "Loop is in a transition state.\n");
4379 } else {
4380 ql_log(ql_log_warn, vha, 0x2009,
4381 "Unable to get host loop ID.\n");
4382 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4383 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4384 ql_log(ql_log_warn, vha, 0x1151,
4385 "Doing link init.\n");
4386 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4387 return rval;
4388 }
4389 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4390 }
4391 return (rval);
4392 }
4393
4394 if (topo == 4) {
4395 ql_log(ql_log_info, vha, 0x200a,
4396 "Cannot get topology - retrying.\n");
4397 return (QLA_FUNCTION_FAILED);
4398 }
4399
4400 vha->loop_id = loop_id;
4401
4402 /* initialize */
4403 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4404 ha->operating_mode = LOOP;
4405 ha->switch_cap = 0;
4406
4407 switch (topo) {
4408 case 0:
4409 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4410 ha->current_topology = ISP_CFG_NL;
4411 strcpy(connect_type, "(Loop)");
4412 break;
4413
4414 case 1:
4415 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4416 ha->switch_cap = sw_cap;
4417 ha->current_topology = ISP_CFG_FL;
4418 strcpy(connect_type, "(FL_Port)");
4419 break;
4420
4421 case 2:
4422 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4423 ha->operating_mode = P2P;
4424 ha->current_topology = ISP_CFG_N;
4425 strcpy(connect_type, "(N_Port-to-N_Port)");
4426 break;
4427
4428 case 3:
4429 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4430 ha->switch_cap = sw_cap;
4431 ha->operating_mode = P2P;
4432 ha->current_topology = ISP_CFG_F;
4433 strcpy(connect_type, "(F_Port)");
4434 break;
4435
4436 default:
4437 ql_dbg(ql_dbg_disc, vha, 0x200f,
4438 "HBA in unknown topology %x, using NL.\n", topo);
4439 ha->current_topology = ISP_CFG_NL;
4440 strcpy(connect_type, "(Loop)");
4441 break;
4442 }
4443
4444 /* Save Host port and loop ID. */
4445 /* byte order - Big Endian */
4446 id.b.domain = domain;
4447 id.b.area = area;
4448 id.b.al_pa = al_pa;
4449 id.b.rsvd_1 = 0;
4450 spin_lock_irqsave(&ha->hardware_lock, flags);
4451 if (!(topo == 2 && ha->flags.n2n_bigger))
4452 qlt_update_host_map(vha, id);
4453 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4454
4455 if (!vha->flags.init_done)
4456 ql_log(ql_log_info, vha, 0x2010,
4457 "Topology - %s, Host Loop address 0x%x.\n",
4458 connect_type, vha->loop_id);
4459
4460 return(rval);
4461 }
4462
4463 inline void
4464 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4465 const char *def)
4466 {
4467 char *st, *en;
4468 uint16_t index;
4469 uint64_t zero[2] = { 0 };
4470 struct qla_hw_data *ha = vha->hw;
4471 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4472 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4473
4474 if (len > sizeof(zero))
4475 len = sizeof(zero);
4476 if (memcmp(model, &zero, len) != 0) {
4477 memcpy(ha->model_number, model, len);
4478 st = en = ha->model_number;
4479 en += len - 1;
4480 while (en > st) {
4481 if (*en != 0x20 && *en != 0x00)
4482 break;
4483 *en-- = '\0';
4484 }
4485
4486 index = (ha->pdev->subsystem_device & 0xff);
4487 if (use_tbl &&
4488 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4489 index < QLA_MODEL_NAMES)
4490 strlcpy(ha->model_desc,
4491 qla2x00_model_name[index * 2 + 1],
4492 sizeof(ha->model_desc));
4493 } else {
4494 index = (ha->pdev->subsystem_device & 0xff);
4495 if (use_tbl &&
4496 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4497 index < QLA_MODEL_NAMES) {
4498 strlcpy(ha->model_number,
4499 qla2x00_model_name[index * 2],
4500 sizeof(ha->model_number));
4501 strlcpy(ha->model_desc,
4502 qla2x00_model_name[index * 2 + 1],
4503 sizeof(ha->model_desc));
4504 } else {
4505 strlcpy(ha->model_number, def,
4506 sizeof(ha->model_number));
4507 }
4508 }
4509 if (IS_FWI2_CAPABLE(ha))
4510 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4511 sizeof(ha->model_desc));
4512 }
4513
4514 /* On sparc systems, obtain port and node WWN from firmware
4515 * properties.
4516 */
4517 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4518 {
4519 #ifdef CONFIG_SPARC
4520 struct qla_hw_data *ha = vha->hw;
4521 struct pci_dev *pdev = ha->pdev;
4522 struct device_node *dp = pci_device_to_OF_node(pdev);
4523 const u8 *val;
4524 int len;
4525
4526 val = of_get_property(dp, "port-wwn", &len);
4527 if (val && len >= WWN_SIZE)
4528 memcpy(nv->port_name, val, WWN_SIZE);
4529
4530 val = of_get_property(dp, "node-wwn", &len);
4531 if (val && len >= WWN_SIZE)
4532 memcpy(nv->node_name, val, WWN_SIZE);
4533 #endif
4534 }
4535
4536 /*
4537 * NVRAM configuration for ISP 2xxx
4538 *
4539 * Input:
4540 * ha = adapter block pointer.
4541 *
4542 * Output:
4543 * initialization control block in response_ring
4544 * host adapters parameters in host adapter block
4545 *
4546 * Returns:
4547 * 0 = success.
4548 */
4549 int
4550 qla2x00_nvram_config(scsi_qla_host_t *vha)
4551 {
4552 int rval;
4553 uint8_t chksum = 0;
4554 uint16_t cnt;
4555 uint8_t *dptr1, *dptr2;
4556 struct qla_hw_data *ha = vha->hw;
4557 init_cb_t *icb = ha->init_cb;
4558 nvram_t *nv = ha->nvram;
4559 uint8_t *ptr = ha->nvram;
4560 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4561
4562 rval = QLA_SUCCESS;
4563
4564 /* Determine NVRAM starting address. */
4565 ha->nvram_size = sizeof(*nv);
4566 ha->nvram_base = 0;
4567 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4568 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
4569 ha->nvram_base = 0x80;
4570
4571 /* Get NVRAM data and calculate checksum. */
4572 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4573 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4574 chksum += *ptr++;
4575
4576 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4577 "Contents of NVRAM.\n");
4578 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4579 nv, ha->nvram_size);
4580
4581 /* Bad NVRAM data, set defaults parameters. */
4582 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
4583 nv->nvram_version < 1) {
4584 /* Reset NVRAM data. */
4585 ql_log(ql_log_warn, vha, 0x0064,
4586 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n",
4587 chksum, nv->id, nv->nvram_version);
4588 ql_log(ql_log_warn, vha, 0x0065,
4589 "Falling back to "
4590 "functioning (yet invalid -- WWPN) defaults.\n");
4591
4592 /*
4593 * Set default initialization control block.
4594 */
4595 memset(nv, 0, ha->nvram_size);
4596 nv->parameter_block_version = ICB_VERSION;
4597
4598 if (IS_QLA23XX(ha)) {
4599 nv->firmware_options[0] = BIT_2 | BIT_1;
4600 nv->firmware_options[1] = BIT_7 | BIT_5;
4601 nv->add_firmware_options[0] = BIT_5;
4602 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4603 nv->frame_payload_size = 2048;
4604 nv->special_options[1] = BIT_7;
4605 } else if (IS_QLA2200(ha)) {
4606 nv->firmware_options[0] = BIT_2 | BIT_1;
4607 nv->firmware_options[1] = BIT_7 | BIT_5;
4608 nv->add_firmware_options[0] = BIT_5;
4609 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4610 nv->frame_payload_size = 1024;
4611 } else if (IS_QLA2100(ha)) {
4612 nv->firmware_options[0] = BIT_3 | BIT_1;
4613 nv->firmware_options[1] = BIT_5;
4614 nv->frame_payload_size = 1024;
4615 }
4616
4617 nv->max_iocb_allocation = cpu_to_le16(256);
4618 nv->execution_throttle = cpu_to_le16(16);
4619 nv->retry_count = 8;
4620 nv->retry_delay = 1;
4621
4622 nv->port_name[0] = 33;
4623 nv->port_name[3] = 224;
4624 nv->port_name[4] = 139;
4625
4626 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4627
4628 nv->login_timeout = 4;
4629
4630 /*
4631 * Set default host adapter parameters
4632 */
4633 nv->host_p[1] = BIT_2;
4634 nv->reset_delay = 5;
4635 nv->port_down_retry_count = 8;
4636 nv->max_luns_per_target = cpu_to_le16(8);
4637 nv->link_down_timeout = 60;
4638
4639 rval = 1;
4640 }
4641
4642 /* Reset Initialization control block */
4643 memset(icb, 0, ha->init_cb_size);
4644
4645 /*
4646 * Setup driver NVRAM options.
4647 */
4648 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4649 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4650 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4651 nv->firmware_options[1] &= ~BIT_4;
4652
4653 if (IS_QLA23XX(ha)) {
4654 nv->firmware_options[0] |= BIT_2;
4655 nv->firmware_options[0] &= ~BIT_3;
4656 nv->special_options[0] &= ~BIT_6;
4657 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4658
4659 if (IS_QLA2300(ha)) {
4660 if (ha->fb_rev == FPM_2310) {
4661 strcpy(ha->model_number, "QLA2310");
4662 } else {
4663 strcpy(ha->model_number, "QLA2300");
4664 }
4665 } else {
4666 qla2x00_set_model_info(vha, nv->model_number,
4667 sizeof(nv->model_number), "QLA23xx");
4668 }
4669 } else if (IS_QLA2200(ha)) {
4670 nv->firmware_options[0] |= BIT_2;
4671 /*
4672 * 'Point-to-point preferred, else loop' is not a safe
4673 * connection mode setting.
4674 */
4675 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4676 (BIT_5 | BIT_4)) {
4677 /* Force 'loop preferred, else point-to-point'. */
4678 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4679 nv->add_firmware_options[0] |= BIT_5;
4680 }
4681 strcpy(ha->model_number, "QLA22xx");
4682 } else /*if (IS_QLA2100(ha))*/ {
4683 strcpy(ha->model_number, "QLA2100");
4684 }
4685
4686 /*
4687 * Copy over NVRAM RISC parameter block to initialization control block.
4688 */
4689 dptr1 = (uint8_t *)icb;
4690 dptr2 = (uint8_t *)&nv->parameter_block_version;
4691 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4692 while (cnt--)
4693 *dptr1++ = *dptr2++;
4694
4695 /* Copy 2nd half. */
4696 dptr1 = (uint8_t *)icb->add_firmware_options;
4697 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4698 while (cnt--)
4699 *dptr1++ = *dptr2++;
4700 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4701 /* Use alternate WWN? */
4702 if (nv->host_p[1] & BIT_7) {
4703 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4704 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4705 }
4706
4707 /* Prepare nodename */
4708 if ((icb->firmware_options[1] & BIT_6) == 0) {
4709 /*
4710 * Firmware will apply the following mask if the nodename was
4711 * not provided.
4712 */
4713 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4714 icb->node_name[0] &= 0xF0;
4715 }
4716
4717 /*
4718 * Set host adapter parameters.
4719 */
4720
4721 /*
4722 * BIT_7 in the host-parameters section allows for modification to
4723 * internal driver logging.
4724 */
4725 if (nv->host_p[0] & BIT_7)
4726 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4727 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4728 /* Always load RISC code on non ISP2[12]00 chips. */
4729 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4730 ha->flags.disable_risc_code_load = 0;
4731 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4732 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4733 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4734 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4735 ha->flags.disable_serdes = 0;
4736
4737 ha->operating_mode =
4738 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4739
4740 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4741 sizeof(ha->fw_seriallink_options));
4742
4743 /* save HBA serial number */
4744 ha->serial0 = icb->port_name[5];
4745 ha->serial1 = icb->port_name[6];
4746 ha->serial2 = icb->port_name[7];
4747 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4748 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4749
4750 icb->execution_throttle = cpu_to_le16(0xFFFF);
4751
4752 ha->retry_count = nv->retry_count;
4753
4754 /* Set minimum login_timeout to 4 seconds. */
4755 if (nv->login_timeout != ql2xlogintimeout)
4756 nv->login_timeout = ql2xlogintimeout;
4757 if (nv->login_timeout < 4)
4758 nv->login_timeout = 4;
4759 ha->login_timeout = nv->login_timeout;
4760
4761 /* Set minimum RATOV to 100 tenths of a second. */
4762 ha->r_a_tov = 100;
4763
4764 ha->loop_reset_delay = nv->reset_delay;
4765
4766 /* Link Down Timeout = 0:
4767 *
4768 * When Port Down timer expires we will start returning
4769 * I/O's to OS with "DID_NO_CONNECT".
4770 *
4771 * Link Down Timeout != 0:
4772 *
4773 * The driver waits for the link to come up after link down
4774 * before returning I/Os to OS with "DID_NO_CONNECT".
4775 */
4776 if (nv->link_down_timeout == 0) {
4777 ha->loop_down_abort_time =
4778 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4779 } else {
4780 ha->link_down_timeout = nv->link_down_timeout;
4781 ha->loop_down_abort_time =
4782 (LOOP_DOWN_TIME - ha->link_down_timeout);
4783 }
4784
4785 /*
4786 * Need enough time to try and get the port back.
4787 */
4788 ha->port_down_retry_count = nv->port_down_retry_count;
4789 if (qlport_down_retry)
4790 ha->port_down_retry_count = qlport_down_retry;
4791 /* Set login_retry_count */
4792 ha->login_retry_count = nv->retry_count;
4793 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4794 ha->port_down_retry_count > 3)
4795 ha->login_retry_count = ha->port_down_retry_count;
4796 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4797 ha->login_retry_count = ha->port_down_retry_count;
4798 if (ql2xloginretrycount)
4799 ha->login_retry_count = ql2xloginretrycount;
4800
4801 icb->lun_enables = cpu_to_le16(0);
4802 icb->command_resource_count = 0;
4803 icb->immediate_notify_resource_count = 0;
4804 icb->timeout = cpu_to_le16(0);
4805
4806 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4807 /* Enable RIO */
4808 icb->firmware_options[0] &= ~BIT_3;
4809 icb->add_firmware_options[0] &=
4810 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4811 icb->add_firmware_options[0] |= BIT_2;
4812 icb->response_accumulation_timer = 3;
4813 icb->interrupt_delay_timer = 5;
4814
4815 vha->flags.process_response_queue = 1;
4816 } else {
4817 /* Enable ZIO. */
4818 if (!vha->flags.init_done) {
4819 ha->zio_mode = icb->add_firmware_options[0] &
4820 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4821 ha->zio_timer = icb->interrupt_delay_timer ?
4822 icb->interrupt_delay_timer : 2;
4823 }
4824 icb->add_firmware_options[0] &=
4825 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4826 vha->flags.process_response_queue = 0;
4827 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4828 ha->zio_mode = QLA_ZIO_MODE_6;
4829
4830 ql_log(ql_log_info, vha, 0x0068,
4831 "ZIO mode %d enabled; timer delay (%d us).\n",
4832 ha->zio_mode, ha->zio_timer * 100);
4833
4834 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4835 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4836 vha->flags.process_response_queue = 1;
4837 }
4838 }
4839
4840 if (rval) {
4841 ql_log(ql_log_warn, vha, 0x0069,
4842 "NVRAM configuration failed.\n");
4843 }
4844 return (rval);
4845 }
4846
4847 static void
4848 qla2x00_rport_del(void *data)
4849 {
4850 fc_port_t *fcport = data;
4851 struct fc_rport *rport;
4852 unsigned long flags;
4853
4854 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4855 rport = fcport->drport ? fcport->drport : fcport->rport;
4856 fcport->drport = NULL;
4857 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4858 if (rport) {
4859 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4860 "%s %8phN. rport %p roles %x\n",
4861 __func__, fcport->port_name, rport,
4862 rport->roles);
4863
4864 fc_remote_port_delete(rport);
4865 }
4866 }
4867
4868 void qla2x00_set_fcport_state(fc_port_t *fcport, int state)
4869 {
4870 int old_state;
4871
4872 old_state = atomic_read(&fcport->state);
4873 atomic_set(&fcport->state, state);
4874
4875 /* Don't print state transitions during initial allocation of fcport */
4876 if (old_state && old_state != state) {
4877 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d,
4878 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n",
4879 fcport->port_name, port_state_str[old_state],
4880 port_state_str[state], fcport->d_id.b.domain,
4881 fcport->d_id.b.area, fcport->d_id.b.al_pa);
4882 }
4883 }
4884
4885 /**
4886 * qla2x00_alloc_fcport() - Allocate a generic fcport.
4887 * @vha: HA context
4888 * @flags: allocation flags
4889 *
4890 * Returns a pointer to the allocated fcport, or NULL, if none available.
4891 */
4892 fc_port_t *
4893 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
4894 {
4895 fc_port_t *fcport;
4896
4897 fcport = kzalloc(sizeof(fc_port_t), flags);
4898 if (!fcport)
4899 return NULL;
4900
4901 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4902 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4903 flags);
4904 if (!fcport->ct_desc.ct_sns) {
4905 ql_log(ql_log_warn, vha, 0xd049,
4906 "Failed to allocate ct_sns request.\n");
4907 kfree(fcport);
4908 return NULL;
4909 }
4910
4911 /* Setup fcport template structure. */
4912 fcport->vha = vha;
4913 fcport->port_type = FCT_UNKNOWN;
4914 fcport->loop_id = FC_NO_LOOP_ID;
4915 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
4916 fcport->supported_classes = FC_COS_UNSPECIFIED;
4917 fcport->fp_speed = PORT_SPEED_UNKNOWN;
4918
4919 fcport->disc_state = DSC_DELETED;
4920 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4921 fcport->deleted = QLA_SESS_DELETED;
4922 fcport->login_retry = vha->hw->login_retry_count;
4923 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
4924 fcport->logout_on_delete = 1;
4925
4926 if (!fcport->ct_desc.ct_sns) {
4927 ql_log(ql_log_warn, vha, 0xd049,
4928 "Failed to allocate ct_sns request.\n");
4929 kfree(fcport);
4930 return NULL;
4931 }
4932
4933 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4934 INIT_WORK(&fcport->free_work, qlt_free_session_done);
4935 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
4936 INIT_LIST_HEAD(&fcport->gnl_entry);
4937 INIT_LIST_HEAD(&fcport->list);
4938
4939 return fcport;
4940 }
4941
4942 void
4943 qla2x00_free_fcport(fc_port_t *fcport)
4944 {
4945 if (fcport->ct_desc.ct_sns) {
4946 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4947 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4948 fcport->ct_desc.ct_sns_dma);
4949
4950 fcport->ct_desc.ct_sns = NULL;
4951 }
4952 list_del(&fcport->list);
4953 qla2x00_clear_loop_id(fcport);
4954 kfree(fcport);
4955 }
4956
4957 /*
4958 * qla2x00_configure_loop
4959 * Updates Fibre Channel Device Database with what is actually on loop.
4960 *
4961 * Input:
4962 * ha = adapter block pointer.
4963 *
4964 * Returns:
4965 * 0 = success.
4966 * 1 = error.
4967 * 2 = database was full and device was not configured.
4968 */
4969 static int
4970 qla2x00_configure_loop(scsi_qla_host_t *vha)
4971 {
4972 int rval;
4973 unsigned long flags, save_flags;
4974 struct qla_hw_data *ha = vha->hw;
4975
4976 rval = QLA_SUCCESS;
4977
4978 /* Get Initiator ID */
4979 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4980 rval = qla2x00_configure_hba(vha);
4981 if (rval != QLA_SUCCESS) {
4982 ql_dbg(ql_dbg_disc, vha, 0x2013,
4983 "Unable to configure HBA.\n");
4984 return (rval);
4985 }
4986 }
4987
4988 save_flags = flags = vha->dpc_flags;
4989 ql_dbg(ql_dbg_disc, vha, 0x2014,
4990 "Configure loop -- dpc flags = 0x%lx.\n", flags);
4991
4992 /*
4993 * If we have both an RSCN and PORT UPDATE pending then handle them
4994 * both at the same time.
4995 */
4996 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4997 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
4998
4999 qla2x00_get_data_rate(vha);
5000
5001 /* Determine what we need to do */
5002 if ((ha->current_topology == ISP_CFG_FL ||
5003 ha->current_topology == ISP_CFG_F) &&
5004 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
5005
5006 set_bit(RSCN_UPDATE, &flags);
5007 clear_bit(LOCAL_LOOP_UPDATE, &flags);
5008
5009 } else if (ha->current_topology == ISP_CFG_NL ||
5010 ha->current_topology == ISP_CFG_N) {
5011 clear_bit(RSCN_UPDATE, &flags);
5012 set_bit(LOCAL_LOOP_UPDATE, &flags);
5013 } else if (!vha->flags.online ||
5014 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
5015 set_bit(RSCN_UPDATE, &flags);
5016 set_bit(LOCAL_LOOP_UPDATE, &flags);
5017 }
5018
5019 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
5020 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5021 ql_dbg(ql_dbg_disc, vha, 0x2015,
5022 "Loop resync needed, failing.\n");
5023 rval = QLA_FUNCTION_FAILED;
5024 } else
5025 rval = qla2x00_configure_local_loop(vha);
5026 }
5027
5028 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
5029 if (LOOP_TRANSITION(vha)) {
5030 ql_dbg(ql_dbg_disc, vha, 0x2099,
5031 "Needs RSCN update and loop transition.\n");
5032 rval = QLA_FUNCTION_FAILED;
5033 }
5034 else
5035 rval = qla2x00_configure_fabric(vha);
5036 }
5037
5038 if (rval == QLA_SUCCESS) {
5039 if (atomic_read(&vha->loop_down_timer) ||
5040 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5041 rval = QLA_FUNCTION_FAILED;
5042 } else {
5043 atomic_set(&vha->loop_state, LOOP_READY);
5044 ql_dbg(ql_dbg_disc, vha, 0x2069,
5045 "LOOP READY.\n");
5046 ha->flags.fw_init_done = 1;
5047
5048 /*
5049 * Process any ATIO queue entries that came in
5050 * while we weren't online.
5051 */
5052 if (qla_tgt_mode_enabled(vha) ||
5053 qla_dual_mode_enabled(vha)) {
5054 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
5055 qlt_24xx_process_atio_queue(vha, 0);
5056 spin_unlock_irqrestore(&ha->tgt.atio_lock,
5057 flags);
5058 }
5059 }
5060 }
5061
5062 if (rval) {
5063 ql_dbg(ql_dbg_disc, vha, 0x206a,
5064 "%s *** FAILED ***.\n", __func__);
5065 } else {
5066 ql_dbg(ql_dbg_disc, vha, 0x206b,
5067 "%s: exiting normally.\n", __func__);
5068 }
5069
5070 /* Restore state if a resync event occurred during processing */
5071 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
5072 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
5073 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5074 if (test_bit(RSCN_UPDATE, &save_flags)) {
5075 set_bit(RSCN_UPDATE, &vha->dpc_flags);
5076 }
5077 }
5078
5079 return (rval);
5080 }
5081
5082 /*
5083 * qla2x00_configure_local_loop
5084 * Updates Fibre Channel Device Database with local loop devices.
5085 *
5086 * Input:
5087 * ha = adapter block pointer.
5088 *
5089 * Returns:
5090 * 0 = success.
5091 */
5092 static int
5093 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
5094 {
5095 int rval, rval2;
5096 int found_devs;
5097 int found;
5098 fc_port_t *fcport, *new_fcport;
5099
5100 uint16_t index;
5101 uint16_t entries;
5102 struct gid_list_info *gid;
5103 uint16_t loop_id;
5104 uint8_t domain, area, al_pa;
5105 struct qla_hw_data *ha = vha->hw;
5106 unsigned long flags;
5107
5108 /* Inititae N2N login. */
5109 if (N2N_TOPO(ha)) {
5110 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
5111 /* borrowing */
5112 u32 *bp, sz;
5113
5114 memset(ha->init_cb, 0, ha->init_cb_size);
5115 sz = min_t(int, sizeof(struct els_plogi_payload),
5116 ha->init_cb_size);
5117 rval = qla24xx_get_port_login_templ(vha,
5118 ha->init_cb_dma, (void *)ha->init_cb, sz);
5119 if (rval == QLA_SUCCESS) {
5120 __be32 *q = &ha->plogi_els_payld.data[0];
5121
5122 bp = (uint32_t *)ha->init_cb;
5123 cpu_to_be32_array(q, bp, sz / 4);
5124
5125 memcpy(bp, q, sizeof(ha->plogi_els_payld.data));
5126 } else {
5127 ql_dbg(ql_dbg_init, vha, 0x00d1,
5128 "PLOGI ELS param read fail.\n");
5129 goto skip_login;
5130 }
5131 }
5132
5133 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5134 if (fcport->n2n_flag) {
5135 qla24xx_fcport_handle_login(vha, fcport);
5136 return QLA_SUCCESS;
5137 }
5138 }
5139 skip_login:
5140 spin_lock_irqsave(&vha->work_lock, flags);
5141 vha->scan.scan_retry++;
5142 spin_unlock_irqrestore(&vha->work_lock, flags);
5143
5144 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5145 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5146 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5147 }
5148 return QLA_FUNCTION_FAILED;
5149 }
5150
5151 found_devs = 0;
5152 new_fcport = NULL;
5153 entries = MAX_FIBRE_DEVICES_LOOP;
5154
5155 /* Get list of logged in devices. */
5156 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
5157 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
5158 &entries);
5159 if (rval != QLA_SUCCESS)
5160 goto err;
5161
5162 ql_dbg(ql_dbg_disc, vha, 0x2011,
5163 "Entries in ID list (%d).\n", entries);
5164 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5165 ha->gid_list, entries * sizeof(*ha->gid_list));
5166
5167 if (entries == 0) {
5168 spin_lock_irqsave(&vha->work_lock, flags);
5169 vha->scan.scan_retry++;
5170 spin_unlock_irqrestore(&vha->work_lock, flags);
5171
5172 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5173 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5174 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5175 }
5176 } else {
5177 vha->scan.scan_retry = 0;
5178 }
5179
5180 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5181 fcport->scan_state = QLA_FCPORT_SCAN;
5182 }
5183
5184 /* Allocate temporary fcport for any new fcports discovered. */
5185 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5186 if (new_fcport == NULL) {
5187 ql_log(ql_log_warn, vha, 0x2012,
5188 "Memory allocation failed for fcport.\n");
5189 rval = QLA_MEMORY_ALLOC_FAILED;
5190 goto err;
5191 }
5192 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5193
5194 /* Add devices to port list. */
5195 gid = ha->gid_list;
5196 for (index = 0; index < entries; index++) {
5197 domain = gid->domain;
5198 area = gid->area;
5199 al_pa = gid->al_pa;
5200 if (IS_QLA2100(ha) || IS_QLA2200(ha))
5201 loop_id = gid->loop_id_2100;
5202 else
5203 loop_id = le16_to_cpu(gid->loop_id);
5204 gid = (void *)gid + ha->gid_list_info_size;
5205
5206 /* Bypass reserved domain fields. */
5207 if ((domain & 0xf0) == 0xf0)
5208 continue;
5209
5210 /* Bypass if not same domain and area of adapter. */
5211 if (area && domain && ((area != vha->d_id.b.area) ||
5212 (domain != vha->d_id.b.domain)) &&
5213 (ha->current_topology == ISP_CFG_NL))
5214 continue;
5215
5216
5217 /* Bypass invalid local loop ID. */
5218 if (loop_id > LAST_LOCAL_LOOP_ID)
5219 continue;
5220
5221 memset(new_fcport->port_name, 0, WWN_SIZE);
5222
5223 /* Fill in member data. */
5224 new_fcport->d_id.b.domain = domain;
5225 new_fcport->d_id.b.area = area;
5226 new_fcport->d_id.b.al_pa = al_pa;
5227 new_fcport->loop_id = loop_id;
5228 new_fcport->scan_state = QLA_FCPORT_FOUND;
5229
5230 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5231 if (rval2 != QLA_SUCCESS) {
5232 ql_dbg(ql_dbg_disc, vha, 0x2097,
5233 "Failed to retrieve fcport information "
5234 "-- get_port_database=%x, loop_id=0x%04x.\n",
5235 rval2, new_fcport->loop_id);
5236 /* Skip retry if N2N */
5237 if (ha->current_topology != ISP_CFG_N) {
5238 ql_dbg(ql_dbg_disc, vha, 0x2105,
5239 "Scheduling resync.\n");
5240 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5241 continue;
5242 }
5243 }
5244
5245 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5246 /* Check for matching device in port list. */
5247 found = 0;
5248 fcport = NULL;
5249 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5250 if (memcmp(new_fcport->port_name, fcport->port_name,
5251 WWN_SIZE))
5252 continue;
5253
5254 fcport->flags &= ~FCF_FABRIC_DEVICE;
5255 fcport->loop_id = new_fcport->loop_id;
5256 fcport->port_type = new_fcport->port_type;
5257 fcport->d_id.b24 = new_fcport->d_id.b24;
5258 memcpy(fcport->node_name, new_fcport->node_name,
5259 WWN_SIZE);
5260 fcport->scan_state = QLA_FCPORT_FOUND;
5261 found++;
5262 break;
5263 }
5264
5265 if (!found) {
5266 /* New device, add to fcports list. */
5267 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5268
5269 /* Allocate a new replacement fcport. */
5270 fcport = new_fcport;
5271
5272 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5273
5274 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5275
5276 if (new_fcport == NULL) {
5277 ql_log(ql_log_warn, vha, 0xd031,
5278 "Failed to allocate memory for fcport.\n");
5279 rval = QLA_MEMORY_ALLOC_FAILED;
5280 goto err;
5281 }
5282 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5283 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5284 }
5285
5286 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5287
5288 /* Base iIDMA settings on HBA port speed. */
5289 fcport->fp_speed = ha->link_data_rate;
5290
5291 found_devs++;
5292 }
5293
5294 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5295 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5296 break;
5297
5298 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5299 if ((qla_dual_mode_enabled(vha) ||
5300 qla_ini_mode_enabled(vha)) &&
5301 atomic_read(&fcport->state) == FCS_ONLINE) {
5302 qla2x00_mark_device_lost(vha, fcport,
5303 ql2xplogiabsentdevice);
5304 if (fcport->loop_id != FC_NO_LOOP_ID &&
5305 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5306 fcport->port_type != FCT_INITIATOR &&
5307 fcport->port_type != FCT_BROADCAST) {
5308 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5309 "%s %d %8phC post del sess\n",
5310 __func__, __LINE__,
5311 fcport->port_name);
5312
5313 qlt_schedule_sess_for_deletion(fcport);
5314 continue;
5315 }
5316 }
5317 }
5318
5319 if (fcport->scan_state == QLA_FCPORT_FOUND)
5320 qla24xx_fcport_handle_login(vha, fcport);
5321 }
5322
5323 qla2x00_free_fcport(new_fcport);
5324
5325 return rval;
5326
5327 err:
5328 ql_dbg(ql_dbg_disc, vha, 0x2098,
5329 "Configure local loop error exit: rval=%x.\n", rval);
5330 return rval;
5331 }
5332
5333 static void
5334 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5335 {
5336 int rval;
5337 uint16_t mb[MAILBOX_REGISTER_COUNT];
5338 struct qla_hw_data *ha = vha->hw;
5339
5340 if (!IS_IIDMA_CAPABLE(ha))
5341 return;
5342
5343 if (atomic_read(&fcport->state) != FCS_ONLINE)
5344 return;
5345
5346 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5347 fcport->fp_speed > ha->link_data_rate ||
5348 !ha->flags.gpsc_supported)
5349 return;
5350
5351 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5352 mb);
5353 if (rval != QLA_SUCCESS) {
5354 ql_dbg(ql_dbg_disc, vha, 0x2004,
5355 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5356 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5357 } else {
5358 ql_dbg(ql_dbg_disc, vha, 0x2005,
5359 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5360 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5361 fcport->fp_speed, fcport->port_name);
5362 }
5363 }
5364
5365 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5366 {
5367 qla2x00_iidma_fcport(vha, fcport);
5368 qla24xx_update_fcport_fcp_prio(vha, fcport);
5369 }
5370
5371 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5372 {
5373 struct qla_work_evt *e;
5374
5375 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5376 if (!e)
5377 return QLA_FUNCTION_FAILED;
5378
5379 e->u.fcport.fcport = fcport;
5380 return qla2x00_post_work(vha, e);
5381 }
5382
5383 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5384 static void
5385 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5386 {
5387 struct fc_rport_identifiers rport_ids;
5388 struct fc_rport *rport;
5389 unsigned long flags;
5390
5391 if (atomic_read(&fcport->state) == FCS_ONLINE)
5392 return;
5393
5394 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5395 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5396 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5397 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5398 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5399 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5400 if (!rport) {
5401 ql_log(ql_log_warn, vha, 0x2006,
5402 "Unable to allocate fc remote port.\n");
5403 return;
5404 }
5405
5406 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5407 *((fc_port_t **)rport->dd_data) = fcport;
5408 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5409
5410 rport->supported_classes = fcport->supported_classes;
5411
5412 rport_ids.roles = FC_PORT_ROLE_UNKNOWN;
5413 if (fcport->port_type == FCT_INITIATOR)
5414 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR;
5415 if (fcport->port_type == FCT_TARGET)
5416 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET;
5417 if (fcport->port_type & FCT_NVME_INITIATOR)
5418 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR;
5419 if (fcport->port_type & FCT_NVME_TARGET)
5420 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET;
5421 if (fcport->port_type & FCT_NVME_DISCOVERY)
5422 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY;
5423
5424 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5425 "%s %8phN. rport %p is %s mode\n",
5426 __func__, fcport->port_name, rport,
5427 (fcport->port_type == FCT_TARGET) ? "tgt" :
5428 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini"));
5429
5430 fc_remote_port_rolechg(rport, rport_ids.roles);
5431 }
5432
5433 /*
5434 * qla2x00_update_fcport
5435 * Updates device on list.
5436 *
5437 * Input:
5438 * ha = adapter block pointer.
5439 * fcport = port structure pointer.
5440 *
5441 * Return:
5442 * 0 - Success
5443 * BIT_0 - error
5444 *
5445 * Context:
5446 * Kernel context.
5447 */
5448 void
5449 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5450 {
5451 if (IS_SW_RESV_ADDR(fcport->d_id))
5452 return;
5453
5454 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5455 __func__, fcport->port_name);
5456
5457 qla2x00_set_fcport_disc_state(fcport, DSC_UPD_FCPORT);
5458 fcport->login_retry = vha->hw->login_retry_count;
5459 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5460 fcport->deleted = 0;
5461 if (vha->hw->current_topology == ISP_CFG_NL)
5462 fcport->logout_on_delete = 0;
5463 else
5464 fcport->logout_on_delete = 1;
5465 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5466
5467 switch (vha->hw->current_topology) {
5468 case ISP_CFG_N:
5469 case ISP_CFG_NL:
5470 fcport->keep_nport_handle = 1;
5471 break;
5472 default:
5473 break;
5474 }
5475
5476 qla2x00_iidma_fcport(vha, fcport);
5477
5478 if (NVME_TARGET(vha->hw, fcport)) {
5479 qla_nvme_register_remote(vha, fcport);
5480 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5481 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5482 return;
5483 }
5484
5485 qla24xx_update_fcport_fcp_prio(vha, fcport);
5486
5487 switch (vha->host->active_mode) {
5488 case MODE_INITIATOR:
5489 qla2x00_reg_remote_port(vha, fcport);
5490 break;
5491 case MODE_TARGET:
5492 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5493 !vha->vha_tgt.qla_tgt->tgt_stopped)
5494 qlt_fc_port_added(vha, fcport);
5495 break;
5496 case MODE_DUAL:
5497 qla2x00_reg_remote_port(vha, fcport);
5498 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5499 !vha->vha_tgt.qla_tgt->tgt_stopped)
5500 qlt_fc_port_added(vha, fcport);
5501 break;
5502 default:
5503 break;
5504 }
5505
5506 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5507
5508 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5509 if (fcport->id_changed) {
5510 fcport->id_changed = 0;
5511 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5512 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5513 __func__, __LINE__, fcport->port_name,
5514 vha->fcport_count);
5515 qla24xx_post_gfpnid_work(vha, fcport);
5516 } else {
5517 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5518 "%s %d %8phC post gpsc fcp_cnt %d\n",
5519 __func__, __LINE__, fcport->port_name,
5520 vha->fcport_count);
5521 qla24xx_post_gpsc_work(vha, fcport);
5522 }
5523 }
5524
5525 qla2x00_set_fcport_disc_state(fcport, DSC_LOGIN_COMPLETE);
5526 }
5527
5528 void qla_register_fcport_fn(struct work_struct *work)
5529 {
5530 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5531 u32 rscn_gen = fcport->rscn_gen;
5532 u16 data[2];
5533
5534 if (IS_SW_RESV_ADDR(fcport->d_id))
5535 return;
5536
5537 qla2x00_update_fcport(fcport->vha, fcport);
5538
5539 if (rscn_gen != fcport->rscn_gen) {
5540 /* RSCN(s) came in while registration */
5541 switch (fcport->next_disc_state) {
5542 case DSC_DELETE_PEND:
5543 qlt_schedule_sess_for_deletion(fcport);
5544 break;
5545 case DSC_ADISC:
5546 data[0] = data[1] = 0;
5547 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5548 data);
5549 break;
5550 default:
5551 break;
5552 }
5553 }
5554 }
5555
5556 /*
5557 * qla2x00_configure_fabric
5558 * Setup SNS devices with loop ID's.
5559 *
5560 * Input:
5561 * ha = adapter block pointer.
5562 *
5563 * Returns:
5564 * 0 = success.
5565 * BIT_0 = error
5566 */
5567 static int
5568 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5569 {
5570 int rval;
5571 fc_port_t *fcport;
5572 uint16_t mb[MAILBOX_REGISTER_COUNT];
5573 uint16_t loop_id;
5574 LIST_HEAD(new_fcports);
5575 struct qla_hw_data *ha = vha->hw;
5576 int discovery_gen;
5577
5578 /* If FL port exists, then SNS is present */
5579 if (IS_FWI2_CAPABLE(ha))
5580 loop_id = NPH_F_PORT;
5581 else
5582 loop_id = SNS_FL_PORT;
5583 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5584 if (rval != QLA_SUCCESS) {
5585 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5586 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5587
5588 vha->device_flags &= ~SWITCH_FOUND;
5589 return (QLA_SUCCESS);
5590 }
5591 vha->device_flags |= SWITCH_FOUND;
5592
5593 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_port_name, 0);
5594 if (rval != QLA_SUCCESS)
5595 ql_dbg(ql_dbg_disc, vha, 0x20ff,
5596 "Failed to get Fabric Port Name\n");
5597
5598 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5599 rval = qla2x00_send_change_request(vha, 0x3, 0);
5600 if (rval != QLA_SUCCESS)
5601 ql_log(ql_log_warn, vha, 0x121,
5602 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5603 rval);
5604 }
5605
5606 do {
5607 qla2x00_mgmt_svr_login(vha);
5608
5609 /* Ensure we are logged into the SNS. */
5610 loop_id = NPH_SNS_LID(ha);
5611 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5612 0xfc, mb, BIT_1|BIT_0);
5613 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5614 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5615 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5616 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5617 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5618 return rval;
5619 }
5620
5621 /* FDMI support. */
5622 if (ql2xfdmienable &&
5623 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5624 qla2x00_fdmi_register(vha);
5625
5626 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5627 if (qla2x00_rft_id(vha)) {
5628 /* EMPTY */
5629 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5630 "Register FC-4 TYPE failed.\n");
5631 if (test_bit(LOOP_RESYNC_NEEDED,
5632 &vha->dpc_flags))
5633 break;
5634 }
5635 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5636 /* EMPTY */
5637 ql_dbg(ql_dbg_disc, vha, 0x209a,
5638 "Register FC-4 Features failed.\n");
5639 if (test_bit(LOOP_RESYNC_NEEDED,
5640 &vha->dpc_flags))
5641 break;
5642 }
5643 if (vha->flags.nvme_enabled) {
5644 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5645 ql_dbg(ql_dbg_disc, vha, 0x2049,
5646 "Register NVME FC Type Features failed.\n");
5647 }
5648 }
5649 if (qla2x00_rnn_id(vha)) {
5650 /* EMPTY */
5651 ql_dbg(ql_dbg_disc, vha, 0x2104,
5652 "Register Node Name failed.\n");
5653 if (test_bit(LOOP_RESYNC_NEEDED,
5654 &vha->dpc_flags))
5655 break;
5656 } else if (qla2x00_rsnn_nn(vha)) {
5657 /* EMPTY */
5658 ql_dbg(ql_dbg_disc, vha, 0x209b,
5659 "Register Symbolic Node Name failed.\n");
5660 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5661 break;
5662 }
5663 }
5664
5665
5666 /* Mark the time right before querying FW for connected ports.
5667 * This process is long, asynchronous and by the time it's done,
5668 * collected information might not be accurate anymore. E.g.
5669 * disconnected port might have re-connected and a brand new
5670 * session has been created. In this case session's generation
5671 * will be newer than discovery_gen. */
5672 qlt_do_generation_tick(vha, &discovery_gen);
5673
5674 if (USE_ASYNC_SCAN(ha)) {
5675 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5676 NULL);
5677 if (rval)
5678 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5679 } else {
5680 list_for_each_entry(fcport, &vha->vp_fcports, list)
5681 fcport->scan_state = QLA_FCPORT_SCAN;
5682
5683 rval = qla2x00_find_all_fabric_devs(vha);
5684 }
5685 if (rval != QLA_SUCCESS)
5686 break;
5687 } while (0);
5688
5689 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5690 qla_nvme_register_hba(vha);
5691
5692 if (rval)
5693 ql_dbg(ql_dbg_disc, vha, 0x2068,
5694 "Configure fabric error exit rval=%d.\n", rval);
5695
5696 return (rval);
5697 }
5698
5699 /*
5700 * qla2x00_find_all_fabric_devs
5701 *
5702 * Input:
5703 * ha = adapter block pointer.
5704 * dev = database device entry pointer.
5705 *
5706 * Returns:
5707 * 0 = success.
5708 *
5709 * Context:
5710 * Kernel context.
5711 */
5712 static int
5713 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5714 {
5715 int rval;
5716 uint16_t loop_id;
5717 fc_port_t *fcport, *new_fcport;
5718 int found;
5719
5720 sw_info_t *swl;
5721 int swl_idx;
5722 int first_dev, last_dev;
5723 port_id_t wrap = {}, nxt_d_id;
5724 struct qla_hw_data *ha = vha->hw;
5725 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5726 unsigned long flags;
5727
5728 rval = QLA_SUCCESS;
5729
5730 /* Try GID_PT to get device list, else GAN. */
5731 if (!ha->swl)
5732 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5733 GFP_KERNEL);
5734 swl = ha->swl;
5735 if (!swl) {
5736 /*EMPTY*/
5737 ql_dbg(ql_dbg_disc, vha, 0x209c,
5738 "GID_PT allocations failed, fallback on GA_NXT.\n");
5739 } else {
5740 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5741 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5742 swl = NULL;
5743 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5744 return rval;
5745 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5746 swl = NULL;
5747 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5748 return rval;
5749 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5750 swl = NULL;
5751 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5752 return rval;
5753 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5754 swl = NULL;
5755 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5756 return rval;
5757 }
5758
5759 /* If other queries succeeded probe for FC-4 type */
5760 if (swl) {
5761 qla2x00_gff_id(vha, swl);
5762 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5763 return rval;
5764 }
5765 }
5766 swl_idx = 0;
5767
5768 /* Allocate temporary fcport for any new fcports discovered. */
5769 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5770 if (new_fcport == NULL) {
5771 ql_log(ql_log_warn, vha, 0x209d,
5772 "Failed to allocate memory for fcport.\n");
5773 return (QLA_MEMORY_ALLOC_FAILED);
5774 }
5775 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5776 /* Set start port ID scan at adapter ID. */
5777 first_dev = 1;
5778 last_dev = 0;
5779
5780 /* Starting free loop ID. */
5781 loop_id = ha->min_external_loopid;
5782 for (; loop_id <= ha->max_loop_id; loop_id++) {
5783 if (qla2x00_is_reserved_id(vha, loop_id))
5784 continue;
5785
5786 if (ha->current_topology == ISP_CFG_FL &&
5787 (atomic_read(&vha->loop_down_timer) ||
5788 LOOP_TRANSITION(vha))) {
5789 atomic_set(&vha->loop_down_timer, 0);
5790 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5791 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5792 break;
5793 }
5794
5795 if (swl != NULL) {
5796 if (last_dev) {
5797 wrap.b24 = new_fcport->d_id.b24;
5798 } else {
5799 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5800 memcpy(new_fcport->node_name,
5801 swl[swl_idx].node_name, WWN_SIZE);
5802 memcpy(new_fcport->port_name,
5803 swl[swl_idx].port_name, WWN_SIZE);
5804 memcpy(new_fcport->fabric_port_name,
5805 swl[swl_idx].fabric_port_name, WWN_SIZE);
5806 new_fcport->fp_speed = swl[swl_idx].fp_speed;
5807 new_fcport->fc4_type = swl[swl_idx].fc4_type;
5808
5809 new_fcport->nvme_flag = 0;
5810 if (vha->flags.nvme_enabled &&
5811 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) {
5812 ql_log(ql_log_info, vha, 0x2131,
5813 "FOUND: NVME port %8phC as FC Type 28h\n",
5814 new_fcport->port_name);
5815 }
5816
5817 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5818 last_dev = 1;
5819 }
5820 swl_idx++;
5821 }
5822 } else {
5823 /* Send GA_NXT to the switch */
5824 rval = qla2x00_ga_nxt(vha, new_fcport);
5825 if (rval != QLA_SUCCESS) {
5826 ql_log(ql_log_warn, vha, 0x209e,
5827 "SNS scan failed -- assuming "
5828 "zero-entry result.\n");
5829 rval = QLA_SUCCESS;
5830 break;
5831 }
5832 }
5833
5834 /* If wrap on switch device list, exit. */
5835 if (first_dev) {
5836 wrap.b24 = new_fcport->d_id.b24;
5837 first_dev = 0;
5838 } else if (new_fcport->d_id.b24 == wrap.b24) {
5839 ql_dbg(ql_dbg_disc, vha, 0x209f,
5840 "Device wrap (%02x%02x%02x).\n",
5841 new_fcport->d_id.b.domain,
5842 new_fcport->d_id.b.area,
5843 new_fcport->d_id.b.al_pa);
5844 break;
5845 }
5846
5847 /* Bypass if same physical adapter. */
5848 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5849 continue;
5850
5851 /* Bypass virtual ports of the same host. */
5852 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5853 continue;
5854
5855 /* Bypass if same domain and area of adapter. */
5856 if (((new_fcport->d_id.b24 & 0xffff00) ==
5857 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5858 ISP_CFG_FL)
5859 continue;
5860
5861 /* Bypass reserved domain fields. */
5862 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5863 continue;
5864
5865 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
5866 if (ql2xgffidenable &&
5867 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) &&
5868 new_fcport->fc4_type != 0))
5869 continue;
5870
5871 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5872
5873 /* Locate matching device in database. */
5874 found = 0;
5875 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5876 if (memcmp(new_fcport->port_name, fcport->port_name,
5877 WWN_SIZE))
5878 continue;
5879
5880 fcport->scan_state = QLA_FCPORT_FOUND;
5881
5882 found++;
5883
5884 /* Update port state. */
5885 memcpy(fcport->fabric_port_name,
5886 new_fcport->fabric_port_name, WWN_SIZE);
5887 fcport->fp_speed = new_fcport->fp_speed;
5888
5889 /*
5890 * If address the same and state FCS_ONLINE
5891 * (or in target mode), nothing changed.
5892 */
5893 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
5894 (atomic_read(&fcport->state) == FCS_ONLINE ||
5895 (vha->host->active_mode == MODE_TARGET))) {
5896 break;
5897 }
5898
5899 /*
5900 * If device was not a fabric device before.
5901 */
5902 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5903 fcport->d_id.b24 = new_fcport->d_id.b24;
5904 qla2x00_clear_loop_id(fcport);
5905 fcport->flags |= (FCF_FABRIC_DEVICE |
5906 FCF_LOGIN_NEEDED);
5907 break;
5908 }
5909
5910 /*
5911 * Port ID changed or device was marked to be updated;
5912 * Log it out if still logged in and mark it for
5913 * relogin later.
5914 */
5915 if (qla_tgt_mode_enabled(base_vha)) {
5916 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5917 "port changed FC ID, %8phC"
5918 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5919 fcport->port_name,
5920 fcport->d_id.b.domain,
5921 fcport->d_id.b.area,
5922 fcport->d_id.b.al_pa,
5923 fcport->loop_id,
5924 new_fcport->d_id.b.domain,
5925 new_fcport->d_id.b.area,
5926 new_fcport->d_id.b.al_pa);
5927 fcport->d_id.b24 = new_fcport->d_id.b24;
5928 break;
5929 }
5930
5931 fcport->d_id.b24 = new_fcport->d_id.b24;
5932 fcport->flags |= FCF_LOGIN_NEEDED;
5933 break;
5934 }
5935
5936 if (NVME_TARGET(vha->hw, fcport)) {
5937 if (fcport->disc_state == DSC_DELETE_PEND) {
5938 qla2x00_set_fcport_disc_state(fcport, DSC_GNL);
5939 vha->fcport_count--;
5940 fcport->login_succ = 0;
5941 }
5942 }
5943
5944 if (found) {
5945 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5946 continue;
5947 }
5948 /* If device was not in our fcports list, then add it. */
5949 new_fcport->scan_state = QLA_FCPORT_FOUND;
5950 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5951
5952 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5953
5954
5955 /* Allocate a new replacement fcport. */
5956 nxt_d_id.b24 = new_fcport->d_id.b24;
5957 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5958 if (new_fcport == NULL) {
5959 ql_log(ql_log_warn, vha, 0xd032,
5960 "Memory allocation failed for fcport.\n");
5961 return (QLA_MEMORY_ALLOC_FAILED);
5962 }
5963 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5964 new_fcport->d_id.b24 = nxt_d_id.b24;
5965 }
5966
5967 qla2x00_free_fcport(new_fcport);
5968
5969 /*
5970 * Logout all previous fabric dev marked lost, except FCP2 devices.
5971 */
5972 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5973 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5974 break;
5975
5976 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
5977 continue;
5978
5979 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5980 if ((qla_dual_mode_enabled(vha) ||
5981 qla_ini_mode_enabled(vha)) &&
5982 atomic_read(&fcport->state) == FCS_ONLINE) {
5983 qla2x00_mark_device_lost(vha, fcport,
5984 ql2xplogiabsentdevice);
5985 if (fcport->loop_id != FC_NO_LOOP_ID &&
5986 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5987 fcport->port_type != FCT_INITIATOR &&
5988 fcport->port_type != FCT_BROADCAST) {
5989 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5990 "%s %d %8phC post del sess\n",
5991 __func__, __LINE__,
5992 fcport->port_name);
5993 qlt_schedule_sess_for_deletion(fcport);
5994 continue;
5995 }
5996 }
5997 }
5998
5999 if (fcport->scan_state == QLA_FCPORT_FOUND &&
6000 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
6001 qla24xx_fcport_handle_login(vha, fcport);
6002 }
6003 return (rval);
6004 }
6005
6006 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
6007 int
6008 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
6009 {
6010 int loop_id = FC_NO_LOOP_ID;
6011 int lid = NPH_MGMT_SERVER - vha->vp_idx;
6012 unsigned long flags;
6013 struct qla_hw_data *ha = vha->hw;
6014
6015 if (vha->vp_idx == 0) {
6016 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
6017 return NPH_MGMT_SERVER;
6018 }
6019
6020 /* pick id from high and work down to low */
6021 spin_lock_irqsave(&ha->vport_slock, flags);
6022 for (; lid > 0; lid--) {
6023 if (!test_bit(lid, vha->hw->loop_id_map)) {
6024 set_bit(lid, vha->hw->loop_id_map);
6025 loop_id = lid;
6026 break;
6027 }
6028 }
6029 spin_unlock_irqrestore(&ha->vport_slock, flags);
6030
6031 return loop_id;
6032 }
6033
6034 /*
6035 * qla2x00_fabric_login
6036 * Issue fabric login command.
6037 *
6038 * Input:
6039 * ha = adapter block pointer.
6040 * device = pointer to FC device type structure.
6041 *
6042 * Returns:
6043 * 0 - Login successfully
6044 * 1 - Login failed
6045 * 2 - Initiator device
6046 * 3 - Fatal error
6047 */
6048 int
6049 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
6050 uint16_t *next_loopid)
6051 {
6052 int rval;
6053 int retry;
6054 uint16_t tmp_loopid;
6055 uint16_t mb[MAILBOX_REGISTER_COUNT];
6056 struct qla_hw_data *ha = vha->hw;
6057
6058 retry = 0;
6059 tmp_loopid = 0;
6060
6061 for (;;) {
6062 ql_dbg(ql_dbg_disc, vha, 0x2000,
6063 "Trying Fabric Login w/loop id 0x%04x for port "
6064 "%02x%02x%02x.\n",
6065 fcport->loop_id, fcport->d_id.b.domain,
6066 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6067
6068 /* Login fcport on switch. */
6069 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
6070 fcport->d_id.b.domain, fcport->d_id.b.area,
6071 fcport->d_id.b.al_pa, mb, BIT_0);
6072 if (rval != QLA_SUCCESS) {
6073 return rval;
6074 }
6075 if (mb[0] == MBS_PORT_ID_USED) {
6076 /*
6077 * Device has another loop ID. The firmware team
6078 * recommends the driver perform an implicit login with
6079 * the specified ID again. The ID we just used is save
6080 * here so we return with an ID that can be tried by
6081 * the next login.
6082 */
6083 retry++;
6084 tmp_loopid = fcport->loop_id;
6085 fcport->loop_id = mb[1];
6086
6087 ql_dbg(ql_dbg_disc, vha, 0x2001,
6088 "Fabric Login: port in use - next loop "
6089 "id=0x%04x, port id= %02x%02x%02x.\n",
6090 fcport->loop_id, fcport->d_id.b.domain,
6091 fcport->d_id.b.area, fcport->d_id.b.al_pa);
6092
6093 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
6094 /*
6095 * Login succeeded.
6096 */
6097 if (retry) {
6098 /* A retry occurred before. */
6099 *next_loopid = tmp_loopid;
6100 } else {
6101 /*
6102 * No retry occurred before. Just increment the
6103 * ID value for next login.
6104 */
6105 *next_loopid = (fcport->loop_id + 1);
6106 }
6107
6108 if (mb[1] & BIT_0) {
6109 fcport->port_type = FCT_INITIATOR;
6110 } else {
6111 fcport->port_type = FCT_TARGET;
6112 if (mb[1] & BIT_1) {
6113 fcport->flags |= FCF_FCP2_DEVICE;
6114 }
6115 }
6116
6117 if (mb[10] & BIT_0)
6118 fcport->supported_classes |= FC_COS_CLASS2;
6119 if (mb[10] & BIT_1)
6120 fcport->supported_classes |= FC_COS_CLASS3;
6121
6122 if (IS_FWI2_CAPABLE(ha)) {
6123 if (mb[10] & BIT_7)
6124 fcport->flags |=
6125 FCF_CONF_COMP_SUPPORTED;
6126 }
6127
6128 rval = QLA_SUCCESS;
6129 break;
6130 } else if (mb[0] == MBS_LOOP_ID_USED) {
6131 /*
6132 * Loop ID already used, try next loop ID.
6133 */
6134 fcport->loop_id++;
6135 rval = qla2x00_find_new_loop_id(vha, fcport);
6136 if (rval != QLA_SUCCESS) {
6137 /* Ran out of loop IDs to use */
6138 break;
6139 }
6140 } else if (mb[0] == MBS_COMMAND_ERROR) {
6141 /*
6142 * Firmware possibly timed out during login. If NO
6143 * retries are left to do then the device is declared
6144 * dead.
6145 */
6146 *next_loopid = fcport->loop_id;
6147 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6148 fcport->d_id.b.domain, fcport->d_id.b.area,
6149 fcport->d_id.b.al_pa);
6150 qla2x00_mark_device_lost(vha, fcport, 1);
6151
6152 rval = 1;
6153 break;
6154 } else {
6155 /*
6156 * unrecoverable / not handled error
6157 */
6158 ql_dbg(ql_dbg_disc, vha, 0x2002,
6159 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6160 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6161 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6162 fcport->loop_id, jiffies);
6163
6164 *next_loopid = fcport->loop_id;
6165 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6166 fcport->d_id.b.domain, fcport->d_id.b.area,
6167 fcport->d_id.b.al_pa);
6168 qla2x00_clear_loop_id(fcport);
6169 fcport->login_retry = 0;
6170
6171 rval = 3;
6172 break;
6173 }
6174 }
6175
6176 return (rval);
6177 }
6178
6179 /*
6180 * qla2x00_local_device_login
6181 * Issue local device login command.
6182 *
6183 * Input:
6184 * ha = adapter block pointer.
6185 * loop_id = loop id of device to login to.
6186 *
6187 * Returns (Where's the #define!!!!):
6188 * 0 - Login successfully
6189 * 1 - Login failed
6190 * 3 - Fatal error
6191 */
6192 int
6193 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6194 {
6195 int rval;
6196 uint16_t mb[MAILBOX_REGISTER_COUNT];
6197
6198 memset(mb, 0, sizeof(mb));
6199 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6200 if (rval == QLA_SUCCESS) {
6201 /* Interrogate mailbox registers for any errors */
6202 if (mb[0] == MBS_COMMAND_ERROR)
6203 rval = 1;
6204 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6205 /* device not in PCB table */
6206 rval = 3;
6207 }
6208
6209 return (rval);
6210 }
6211
6212 /*
6213 * qla2x00_loop_resync
6214 * Resync with fibre channel devices.
6215 *
6216 * Input:
6217 * ha = adapter block pointer.
6218 *
6219 * Returns:
6220 * 0 = success
6221 */
6222 int
6223 qla2x00_loop_resync(scsi_qla_host_t *vha)
6224 {
6225 int rval = QLA_SUCCESS;
6226 uint32_t wait_time;
6227
6228 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6229 if (vha->flags.online) {
6230 if (!(rval = qla2x00_fw_ready(vha))) {
6231 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6232 wait_time = 256;
6233 do {
6234 if (!IS_QLAFX00(vha->hw)) {
6235 /*
6236 * Issue a marker after FW becomes
6237 * ready.
6238 */
6239 qla2x00_marker(vha, vha->hw->base_qpair,
6240 0, 0, MK_SYNC_ALL);
6241 vha->marker_needed = 0;
6242 }
6243
6244 /* Remap devices on Loop. */
6245 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6246
6247 if (IS_QLAFX00(vha->hw))
6248 qlafx00_configure_devices(vha);
6249 else
6250 qla2x00_configure_loop(vha);
6251
6252 wait_time--;
6253 } while (!atomic_read(&vha->loop_down_timer) &&
6254 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6255 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6256 &vha->dpc_flags)));
6257 }
6258 }
6259
6260 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6261 return (QLA_FUNCTION_FAILED);
6262
6263 if (rval)
6264 ql_dbg(ql_dbg_disc, vha, 0x206c,
6265 "%s *** FAILED ***.\n", __func__);
6266
6267 return (rval);
6268 }
6269
6270 /*
6271 * qla2x00_perform_loop_resync
6272 * Description: This function will set the appropriate flags and call
6273 * qla2x00_loop_resync. If successful loop will be resynced
6274 * Arguments : scsi_qla_host_t pointer
6275 * returm : Success or Failure
6276 */
6277
6278 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6279 {
6280 int32_t rval = 0;
6281
6282 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6283 /*Configure the flags so that resync happens properly*/
6284 atomic_set(&ha->loop_down_timer, 0);
6285 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6286 atomic_set(&ha->loop_state, LOOP_UP);
6287 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6288 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6289 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6290
6291 rval = qla2x00_loop_resync(ha);
6292 } else
6293 atomic_set(&ha->loop_state, LOOP_DEAD);
6294
6295 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6296 }
6297
6298 return rval;
6299 }
6300
6301 void
6302 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6303 {
6304 fc_port_t *fcport;
6305 struct scsi_qla_host *vha;
6306 struct qla_hw_data *ha = base_vha->hw;
6307 unsigned long flags;
6308
6309 spin_lock_irqsave(&ha->vport_slock, flags);
6310 /* Go with deferred removal of rport references. */
6311 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6312 atomic_inc(&vha->vref_count);
6313 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6314 if (fcport->drport &&
6315 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6316 spin_unlock_irqrestore(&ha->vport_slock, flags);
6317 qla2x00_rport_del(fcport);
6318
6319 spin_lock_irqsave(&ha->vport_slock, flags);
6320 }
6321 }
6322 atomic_dec(&vha->vref_count);
6323 wake_up(&vha->vref_waitq);
6324 }
6325 spin_unlock_irqrestore(&ha->vport_slock, flags);
6326 }
6327
6328 /* Assumes idc_lock always held on entry */
6329 void
6330 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6331 {
6332 struct qla_hw_data *ha = vha->hw;
6333 uint32_t drv_presence, drv_presence_mask;
6334 uint32_t dev_part_info1, dev_part_info2, class_type;
6335 uint32_t class_type_mask = 0x3;
6336 uint16_t fcoe_other_function = 0xffff, i;
6337
6338 if (IS_QLA8044(ha)) {
6339 drv_presence = qla8044_rd_direct(vha,
6340 QLA8044_CRB_DRV_ACTIVE_INDEX);
6341 dev_part_info1 = qla8044_rd_direct(vha,
6342 QLA8044_CRB_DEV_PART_INFO_INDEX);
6343 dev_part_info2 = qla8044_rd_direct(vha,
6344 QLA8044_CRB_DEV_PART_INFO2);
6345 } else {
6346 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6347 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6348 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6349 }
6350 for (i = 0; i < 8; i++) {
6351 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6352 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6353 (i != ha->portnum)) {
6354 fcoe_other_function = i;
6355 break;
6356 }
6357 }
6358 if (fcoe_other_function == 0xffff) {
6359 for (i = 0; i < 8; i++) {
6360 class_type = ((dev_part_info2 >> (i * 4)) &
6361 class_type_mask);
6362 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6363 ((i + 8) != ha->portnum)) {
6364 fcoe_other_function = i + 8;
6365 break;
6366 }
6367 }
6368 }
6369 /*
6370 * Prepare drv-presence mask based on fcoe functions present.
6371 * However consider only valid physical fcoe function numbers (0-15).
6372 */
6373 drv_presence_mask = ~((1 << (ha->portnum)) |
6374 ((fcoe_other_function == 0xffff) ?
6375 0 : (1 << (fcoe_other_function))));
6376
6377 /* We are the reset owner iff:
6378 * - No other protocol drivers present.
6379 * - This is the lowest among fcoe functions. */
6380 if (!(drv_presence & drv_presence_mask) &&
6381 (ha->portnum < fcoe_other_function)) {
6382 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6383 "This host is Reset owner.\n");
6384 ha->flags.nic_core_reset_owner = 1;
6385 }
6386 }
6387
6388 static int
6389 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6390 {
6391 int rval = QLA_SUCCESS;
6392 struct qla_hw_data *ha = vha->hw;
6393 uint32_t drv_ack;
6394
6395 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6396 if (rval == QLA_SUCCESS) {
6397 drv_ack |= (1 << ha->portnum);
6398 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6399 }
6400
6401 return rval;
6402 }
6403
6404 static int
6405 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6406 {
6407 int rval = QLA_SUCCESS;
6408 struct qla_hw_data *ha = vha->hw;
6409 uint32_t drv_ack;
6410
6411 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6412 if (rval == QLA_SUCCESS) {
6413 drv_ack &= ~(1 << ha->portnum);
6414 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6415 }
6416
6417 return rval;
6418 }
6419
6420 static const char *
6421 qla83xx_dev_state_to_string(uint32_t dev_state)
6422 {
6423 switch (dev_state) {
6424 case QLA8XXX_DEV_COLD:
6425 return "COLD/RE-INIT";
6426 case QLA8XXX_DEV_INITIALIZING:
6427 return "INITIALIZING";
6428 case QLA8XXX_DEV_READY:
6429 return "READY";
6430 case QLA8XXX_DEV_NEED_RESET:
6431 return "NEED RESET";
6432 case QLA8XXX_DEV_NEED_QUIESCENT:
6433 return "NEED QUIESCENT";
6434 case QLA8XXX_DEV_FAILED:
6435 return "FAILED";
6436 case QLA8XXX_DEV_QUIESCENT:
6437 return "QUIESCENT";
6438 default:
6439 return "Unknown";
6440 }
6441 }
6442
6443 /* Assumes idc-lock always held on entry */
6444 void
6445 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6446 {
6447 struct qla_hw_data *ha = vha->hw;
6448 uint32_t idc_audit_reg = 0, duration_secs = 0;
6449
6450 switch (audit_type) {
6451 case IDC_AUDIT_TIMESTAMP:
6452 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6453 idc_audit_reg = (ha->portnum) |
6454 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6455 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6456 break;
6457
6458 case IDC_AUDIT_COMPLETION:
6459 duration_secs = ((jiffies_to_msecs(jiffies) -
6460 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6461 idc_audit_reg = (ha->portnum) |
6462 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6463 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6464 break;
6465
6466 default:
6467 ql_log(ql_log_warn, vha, 0xb078,
6468 "Invalid audit type specified.\n");
6469 break;
6470 }
6471 }
6472
6473 /* Assumes idc_lock always held on entry */
6474 static int
6475 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6476 {
6477 struct qla_hw_data *ha = vha->hw;
6478 uint32_t idc_control, dev_state;
6479
6480 __qla83xx_get_idc_control(vha, &idc_control);
6481 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6482 ql_log(ql_log_info, vha, 0xb080,
6483 "NIC Core reset has been disabled. idc-control=0x%x\n",
6484 idc_control);
6485 return QLA_FUNCTION_FAILED;
6486 }
6487
6488 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6489 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6490 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6491 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6492 QLA8XXX_DEV_NEED_RESET);
6493 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6494 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6495 } else {
6496 const char *state = qla83xx_dev_state_to_string(dev_state);
6497
6498 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6499
6500 /* SV: XXX: Is timeout required here? */
6501 /* Wait for IDC state change READY -> NEED_RESET */
6502 while (dev_state == QLA8XXX_DEV_READY) {
6503 qla83xx_idc_unlock(vha, 0);
6504 msleep(200);
6505 qla83xx_idc_lock(vha, 0);
6506 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6507 }
6508 }
6509
6510 /* Send IDC ack by writing to drv-ack register */
6511 __qla83xx_set_drv_ack(vha);
6512
6513 return QLA_SUCCESS;
6514 }
6515
6516 int
6517 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6518 {
6519 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6520 }
6521
6522 int
6523 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6524 {
6525 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6526 }
6527
6528 static int
6529 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6530 {
6531 uint32_t drv_presence = 0;
6532 struct qla_hw_data *ha = vha->hw;
6533
6534 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6535 if (drv_presence & (1 << ha->portnum))
6536 return QLA_SUCCESS;
6537 else
6538 return QLA_TEST_FAILED;
6539 }
6540
6541 int
6542 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6543 {
6544 int rval = QLA_SUCCESS;
6545 struct qla_hw_data *ha = vha->hw;
6546
6547 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6548 "Entered %s().\n", __func__);
6549
6550 if (vha->device_flags & DFLG_DEV_FAILED) {
6551 ql_log(ql_log_warn, vha, 0xb059,
6552 "Device in unrecoverable FAILED state.\n");
6553 return QLA_FUNCTION_FAILED;
6554 }
6555
6556 qla83xx_idc_lock(vha, 0);
6557
6558 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6559 ql_log(ql_log_warn, vha, 0xb05a,
6560 "Function=0x%x has been removed from IDC participation.\n",
6561 ha->portnum);
6562 rval = QLA_FUNCTION_FAILED;
6563 goto exit;
6564 }
6565
6566 qla83xx_reset_ownership(vha);
6567
6568 rval = qla83xx_initiating_reset(vha);
6569
6570 /*
6571 * Perform reset if we are the reset-owner,
6572 * else wait till IDC state changes to READY/FAILED.
6573 */
6574 if (rval == QLA_SUCCESS) {
6575 rval = qla83xx_idc_state_handler(vha);
6576
6577 if (rval == QLA_SUCCESS)
6578 ha->flags.nic_core_hung = 0;
6579 __qla83xx_clear_drv_ack(vha);
6580 }
6581
6582 exit:
6583 qla83xx_idc_unlock(vha, 0);
6584
6585 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6586
6587 return rval;
6588 }
6589
6590 int
6591 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6592 {
6593 struct qla_hw_data *ha = vha->hw;
6594 int rval = QLA_FUNCTION_FAILED;
6595
6596 if (!IS_MCTP_CAPABLE(ha)) {
6597 /* This message can be removed from the final version */
6598 ql_log(ql_log_info, vha, 0x506d,
6599 "This board is not MCTP capable\n");
6600 return rval;
6601 }
6602
6603 if (!ha->mctp_dump) {
6604 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6605 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6606
6607 if (!ha->mctp_dump) {
6608 ql_log(ql_log_warn, vha, 0x506e,
6609 "Failed to allocate memory for mctp dump\n");
6610 return rval;
6611 }
6612 }
6613
6614 #define MCTP_DUMP_STR_ADDR 0x00000000
6615 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6616 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6617 if (rval != QLA_SUCCESS) {
6618 ql_log(ql_log_warn, vha, 0x506f,
6619 "Failed to capture mctp dump\n");
6620 } else {
6621 ql_log(ql_log_info, vha, 0x5070,
6622 "Mctp dump capture for host (%ld/%p).\n",
6623 vha->host_no, ha->mctp_dump);
6624 ha->mctp_dumped = 1;
6625 }
6626
6627 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6628 ha->flags.nic_core_reset_hdlr_active = 1;
6629 rval = qla83xx_restart_nic_firmware(vha);
6630 if (rval)
6631 /* NIC Core reset failed. */
6632 ql_log(ql_log_warn, vha, 0x5071,
6633 "Failed to restart nic firmware\n");
6634 else
6635 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6636 "Restarted NIC firmware successfully.\n");
6637 ha->flags.nic_core_reset_hdlr_active = 0;
6638 }
6639
6640 return rval;
6641
6642 }
6643
6644 /*
6645 * qla2x00_quiesce_io
6646 * Description: This function will block the new I/Os
6647 * Its not aborting any I/Os as context
6648 * is not destroyed during quiescence
6649 * Arguments: scsi_qla_host_t
6650 * return : void
6651 */
6652 void
6653 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6654 {
6655 struct qla_hw_data *ha = vha->hw;
6656 struct scsi_qla_host *vp;
6657
6658 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6659 "Quiescing I/O - ha=%p.\n", ha);
6660
6661 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6662 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6663 atomic_set(&vha->loop_state, LOOP_DOWN);
6664 qla2x00_mark_all_devices_lost(vha);
6665 list_for_each_entry(vp, &ha->vp_list, list)
6666 qla2x00_mark_all_devices_lost(vp);
6667 } else {
6668 if (!atomic_read(&vha->loop_down_timer))
6669 atomic_set(&vha->loop_down_timer,
6670 LOOP_DOWN_TIME);
6671 }
6672 /* Wait for pending cmds to complete */
6673 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST)
6674 != QLA_SUCCESS);
6675 }
6676
6677 void
6678 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6679 {
6680 struct qla_hw_data *ha = vha->hw;
6681 struct scsi_qla_host *vp;
6682 unsigned long flags;
6683 fc_port_t *fcport;
6684 u16 i;
6685
6686 /* For ISP82XX, driver waits for completion of the commands.
6687 * online flag should be set.
6688 */
6689 if (!(IS_P3P_TYPE(ha)))
6690 vha->flags.online = 0;
6691 ha->flags.chip_reset_done = 0;
6692 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6693 vha->qla_stats.total_isp_aborts++;
6694
6695 ql_log(ql_log_info, vha, 0x00af,
6696 "Performing ISP error recovery - ha=%p.\n", ha);
6697
6698 ha->flags.purge_mbox = 1;
6699 /* For ISP82XX, reset_chip is just disabling interrupts.
6700 * Driver waits for the completion of the commands.
6701 * the interrupts need to be enabled.
6702 */
6703 if (!(IS_P3P_TYPE(ha)))
6704 ha->isp_ops->reset_chip(vha);
6705
6706 ha->link_data_rate = PORT_SPEED_UNKNOWN;
6707 SAVE_TOPO(ha);
6708 ha->flags.rida_fmt2 = 0;
6709 ha->flags.n2n_ae = 0;
6710 ha->flags.lip_ae = 0;
6711 ha->current_topology = 0;
6712 QLA_FW_STOPPED(ha);
6713 ha->flags.fw_init_done = 0;
6714 ha->chip_reset++;
6715 ha->base_qpair->chip_reset = ha->chip_reset;
6716 for (i = 0; i < ha->max_qpairs; i++) {
6717 if (ha->queue_pair_map[i])
6718 ha->queue_pair_map[i]->chip_reset =
6719 ha->base_qpair->chip_reset;
6720 }
6721
6722 /* purge MBox commands */
6723 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6724 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6725 complete(&ha->mbx_intr_comp);
6726 }
6727
6728 i = 0;
6729 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6730 atomic_read(&ha->num_pend_mbx_stage2) ||
6731 atomic_read(&ha->num_pend_mbx_stage1)) {
6732 msleep(20);
6733 i++;
6734 if (i > 50)
6735 break;
6736 }
6737 ha->flags.purge_mbox = 0;
6738
6739 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6740 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6741 atomic_set(&vha->loop_state, LOOP_DOWN);
6742 qla2x00_mark_all_devices_lost(vha);
6743
6744 spin_lock_irqsave(&ha->vport_slock, flags);
6745 list_for_each_entry(vp, &ha->vp_list, list) {
6746 atomic_inc(&vp->vref_count);
6747 spin_unlock_irqrestore(&ha->vport_slock, flags);
6748
6749 qla2x00_mark_all_devices_lost(vp);
6750
6751 spin_lock_irqsave(&ha->vport_slock, flags);
6752 atomic_dec(&vp->vref_count);
6753 }
6754 spin_unlock_irqrestore(&ha->vport_slock, flags);
6755 } else {
6756 if (!atomic_read(&vha->loop_down_timer))
6757 atomic_set(&vha->loop_down_timer,
6758 LOOP_DOWN_TIME);
6759 }
6760
6761 /* Clear all async request states across all VPs. */
6762 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6763 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6764 fcport->scan_state = 0;
6765 }
6766 spin_lock_irqsave(&ha->vport_slock, flags);
6767 list_for_each_entry(vp, &ha->vp_list, list) {
6768 atomic_inc(&vp->vref_count);
6769 spin_unlock_irqrestore(&ha->vport_slock, flags);
6770
6771 list_for_each_entry(fcport, &vp->vp_fcports, list)
6772 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6773
6774 spin_lock_irqsave(&ha->vport_slock, flags);
6775 atomic_dec(&vp->vref_count);
6776 }
6777 spin_unlock_irqrestore(&ha->vport_slock, flags);
6778
6779 if (!ha->flags.eeh_busy) {
6780 /* Make sure for ISP 82XX IO DMA is complete */
6781 if (IS_P3P_TYPE(ha)) {
6782 qla82xx_chip_reset_cleanup(vha);
6783 ql_log(ql_log_info, vha, 0x00b4,
6784 "Done chip reset cleanup.\n");
6785
6786 /* Done waiting for pending commands.
6787 * Reset the online flag.
6788 */
6789 vha->flags.online = 0;
6790 }
6791
6792 /* Requeue all commands in outstanding command list. */
6793 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6794 }
6795 /* memory barrier */
6796 wmb();
6797 }
6798
6799 /*
6800 * qla2x00_abort_isp
6801 * Resets ISP and aborts all outstanding commands.
6802 *
6803 * Input:
6804 * ha = adapter block pointer.
6805 *
6806 * Returns:
6807 * 0 = success
6808 */
6809 int
6810 qla2x00_abort_isp(scsi_qla_host_t *vha)
6811 {
6812 int rval;
6813 uint8_t status = 0;
6814 struct qla_hw_data *ha = vha->hw;
6815 struct scsi_qla_host *vp;
6816 struct req_que *req = ha->req_q_map[0];
6817 unsigned long flags;
6818
6819 if (vha->flags.online) {
6820 qla2x00_abort_isp_cleanup(vha);
6821
6822 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) {
6823 ha->flags.chip_reset_done = 1;
6824 vha->flags.online = 1;
6825 status = 0;
6826 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6827 return status;
6828 }
6829
6830 if (IS_QLA8031(ha)) {
6831 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6832 "Clearing fcoe driver presence.\n");
6833 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6834 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6835 "Error while clearing DRV-Presence.\n");
6836 }
6837
6838 if (unlikely(pci_channel_offline(ha->pdev) &&
6839 ha->flags.pci_channel_io_perm_failure)) {
6840 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6841 status = 0;
6842 return status;
6843 }
6844
6845 switch (vha->qlini_mode) {
6846 case QLA2XXX_INI_MODE_DISABLED:
6847 if (!qla_tgt_mode_enabled(vha))
6848 return 0;
6849 break;
6850 case QLA2XXX_INI_MODE_DUAL:
6851 if (!qla_dual_mode_enabled(vha))
6852 return 0;
6853 break;
6854 case QLA2XXX_INI_MODE_ENABLED:
6855 default:
6856 break;
6857 }
6858
6859 ha->isp_ops->get_flash_version(vha, req->ring);
6860
6861 ha->isp_ops->nvram_config(vha);
6862
6863 if (!qla2x00_restart_isp(vha)) {
6864 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6865
6866 if (!atomic_read(&vha->loop_down_timer)) {
6867 /*
6868 * Issue marker command only when we are going
6869 * to start the I/O .
6870 */
6871 vha->marker_needed = 1;
6872 }
6873
6874 vha->flags.online = 1;
6875
6876 ha->isp_ops->enable_intrs(ha);
6877
6878 ha->isp_abort_cnt = 0;
6879 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6880
6881 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6882 qla2x00_get_fw_version(vha);
6883 if (ha->fce) {
6884 ha->flags.fce_enabled = 1;
6885 memset(ha->fce, 0,
6886 fce_calc_size(ha->fce_bufs));
6887 rval = qla2x00_enable_fce_trace(vha,
6888 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6889 &ha->fce_bufs);
6890 if (rval) {
6891 ql_log(ql_log_warn, vha, 0x8033,
6892 "Unable to reinitialize FCE "
6893 "(%d).\n", rval);
6894 ha->flags.fce_enabled = 0;
6895 }
6896 }
6897
6898 if (ha->eft) {
6899 memset(ha->eft, 0, EFT_SIZE);
6900 rval = qla2x00_enable_eft_trace(vha,
6901 ha->eft_dma, EFT_NUM_BUFFERS);
6902 if (rval) {
6903 ql_log(ql_log_warn, vha, 0x8034,
6904 "Unable to reinitialize EFT "
6905 "(%d).\n", rval);
6906 }
6907 }
6908 } else { /* failed the ISP abort */
6909 vha->flags.online = 1;
6910 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
6911 if (ha->isp_abort_cnt == 0) {
6912 ql_log(ql_log_fatal, vha, 0x8035,
6913 "ISP error recover failed - "
6914 "board disabled.\n");
6915 /*
6916 * The next call disables the board
6917 * completely.
6918 */
6919 qla2x00_abort_isp_cleanup(vha);
6920 vha->flags.online = 0;
6921 clear_bit(ISP_ABORT_RETRY,
6922 &vha->dpc_flags);
6923 status = 0;
6924 } else { /* schedule another ISP abort */
6925 ha->isp_abort_cnt--;
6926 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6927 "ISP abort - retry remaining %d.\n",
6928 ha->isp_abort_cnt);
6929 status = 1;
6930 }
6931 } else {
6932 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
6933 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6934 "ISP error recovery - retrying (%d) "
6935 "more times.\n", ha->isp_abort_cnt);
6936 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6937 status = 1;
6938 }
6939 }
6940
6941 }
6942
6943 if (!status) {
6944 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
6945 qla2x00_configure_hba(vha);
6946 spin_lock_irqsave(&ha->vport_slock, flags);
6947 list_for_each_entry(vp, &ha->vp_list, list) {
6948 if (vp->vp_idx) {
6949 atomic_inc(&vp->vref_count);
6950 spin_unlock_irqrestore(&ha->vport_slock, flags);
6951
6952 qla2x00_vp_abort_isp(vp);
6953
6954 spin_lock_irqsave(&ha->vport_slock, flags);
6955 atomic_dec(&vp->vref_count);
6956 }
6957 }
6958 spin_unlock_irqrestore(&ha->vport_slock, flags);
6959
6960 if (IS_QLA8031(ha)) {
6961 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6962 "Setting back fcoe driver presence.\n");
6963 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6964 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6965 "Error while setting DRV-Presence.\n");
6966 }
6967 } else {
6968 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6969 __func__);
6970 }
6971
6972 return(status);
6973 }
6974
6975 /*
6976 * qla2x00_restart_isp
6977 * restarts the ISP after a reset
6978 *
6979 * Input:
6980 * ha = adapter block pointer.
6981 *
6982 * Returns:
6983 * 0 = success
6984 */
6985 static int
6986 qla2x00_restart_isp(scsi_qla_host_t *vha)
6987 {
6988 int status = 0;
6989 struct qla_hw_data *ha = vha->hw;
6990
6991 /* If firmware needs to be loaded */
6992 if (qla2x00_isp_firmware(vha)) {
6993 vha->flags.online = 0;
6994 status = ha->isp_ops->chip_diag(vha);
6995 if (!status)
6996 status = qla2x00_setup_chip(vha);
6997 }
6998
6999 if (!status && !(status = qla2x00_init_rings(vha))) {
7000 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7001 ha->flags.chip_reset_done = 1;
7002
7003 /* Initialize the queues in use */
7004 qla25xx_init_queues(ha);
7005
7006 status = qla2x00_fw_ready(vha);
7007 if (!status) {
7008 /* Issue a marker after FW becomes ready. */
7009 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
7010 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7011 }
7012
7013 /* if no cable then assume it's good */
7014 if ((vha->device_flags & DFLG_NO_CABLE))
7015 status = 0;
7016 }
7017 return (status);
7018 }
7019
7020 static int
7021 qla25xx_init_queues(struct qla_hw_data *ha)
7022 {
7023 struct rsp_que *rsp = NULL;
7024 struct req_que *req = NULL;
7025 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7026 int ret = -1;
7027 int i;
7028
7029 for (i = 1; i < ha->max_rsp_queues; i++) {
7030 rsp = ha->rsp_q_map[i];
7031 if (rsp && test_bit(i, ha->rsp_qid_map)) {
7032 rsp->options &= ~BIT_0;
7033 ret = qla25xx_init_rsp_que(base_vha, rsp);
7034 if (ret != QLA_SUCCESS)
7035 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
7036 "%s Rsp que: %d init failed.\n",
7037 __func__, rsp->id);
7038 else
7039 ql_dbg(ql_dbg_init, base_vha, 0x0100,
7040 "%s Rsp que: %d inited.\n",
7041 __func__, rsp->id);
7042 }
7043 }
7044 for (i = 1; i < ha->max_req_queues; i++) {
7045 req = ha->req_q_map[i];
7046 if (req && test_bit(i, ha->req_qid_map)) {
7047 /* Clear outstanding commands array. */
7048 req->options &= ~BIT_0;
7049 ret = qla25xx_init_req_que(base_vha, req);
7050 if (ret != QLA_SUCCESS)
7051 ql_dbg(ql_dbg_init, base_vha, 0x0101,
7052 "%s Req que: %d init failed.\n",
7053 __func__, req->id);
7054 else
7055 ql_dbg(ql_dbg_init, base_vha, 0x0102,
7056 "%s Req que: %d inited.\n",
7057 __func__, req->id);
7058 }
7059 }
7060 return ret;
7061 }
7062
7063 /*
7064 * qla2x00_reset_adapter
7065 * Reset adapter.
7066 *
7067 * Input:
7068 * ha = adapter block pointer.
7069 */
7070 int
7071 qla2x00_reset_adapter(scsi_qla_host_t *vha)
7072 {
7073 unsigned long flags = 0;
7074 struct qla_hw_data *ha = vha->hw;
7075 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
7076
7077 vha->flags.online = 0;
7078 ha->isp_ops->disable_intrs(ha);
7079
7080 spin_lock_irqsave(&ha->hardware_lock, flags);
7081 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
7082 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
7083 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
7084 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
7085 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7086
7087 return QLA_SUCCESS;
7088 }
7089
7090 int
7091 qla24xx_reset_adapter(scsi_qla_host_t *vha)
7092 {
7093 unsigned long flags = 0;
7094 struct qla_hw_data *ha = vha->hw;
7095 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
7096 int rval = QLA_SUCCESS;
7097
7098 if (IS_P3P_TYPE(ha))
7099 return rval;
7100
7101 vha->flags.online = 0;
7102 ha->isp_ops->disable_intrs(ha);
7103
7104 spin_lock_irqsave(&ha->hardware_lock, flags);
7105 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
7106 RD_REG_DWORD(&reg->hccr);
7107 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
7108 RD_REG_DWORD(&reg->hccr);
7109 spin_unlock_irqrestore(&ha->hardware_lock, flags);
7110
7111 if (IS_NOPOLLING_TYPE(ha))
7112 ha->isp_ops->enable_intrs(ha);
7113
7114 return rval;
7115 }
7116
7117 /* On sparc systems, obtain port and node WWN from firmware
7118 * properties.
7119 */
7120 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
7121 struct nvram_24xx *nv)
7122 {
7123 #ifdef CONFIG_SPARC
7124 struct qla_hw_data *ha = vha->hw;
7125 struct pci_dev *pdev = ha->pdev;
7126 struct device_node *dp = pci_device_to_OF_node(pdev);
7127 const u8 *val;
7128 int len;
7129
7130 val = of_get_property(dp, "port-wwn", &len);
7131 if (val && len >= WWN_SIZE)
7132 memcpy(nv->port_name, val, WWN_SIZE);
7133
7134 val = of_get_property(dp, "node-wwn", &len);
7135 if (val && len >= WWN_SIZE)
7136 memcpy(nv->node_name, val, WWN_SIZE);
7137 #endif
7138 }
7139
7140 int
7141 qla24xx_nvram_config(scsi_qla_host_t *vha)
7142 {
7143 int rval;
7144 struct init_cb_24xx *icb;
7145 struct nvram_24xx *nv;
7146 uint32_t *dptr;
7147 uint8_t *dptr1, *dptr2;
7148 uint32_t chksum;
7149 uint16_t cnt;
7150 struct qla_hw_data *ha = vha->hw;
7151
7152 rval = QLA_SUCCESS;
7153 icb = (struct init_cb_24xx *)ha->init_cb;
7154 nv = ha->nvram;
7155
7156 /* Determine NVRAM starting address. */
7157 if (ha->port_no == 0) {
7158 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7159 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7160 } else {
7161 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
7162 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7163 }
7164
7165 ha->nvram_size = sizeof(*nv);
7166 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7167
7168 /* Get VPD data into cache */
7169 ha->vpd = ha->nvram + VPD_OFFSET;
7170 ha->isp_ops->read_nvram(vha, ha->vpd,
7171 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7172
7173 /* Get NVRAM data into cache and calculate checksum. */
7174 dptr = (uint32_t *)nv;
7175 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size);
7176 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7177 chksum += le32_to_cpu(*dptr);
7178
7179 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7180 "Contents of NVRAM\n");
7181 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7182 nv, ha->nvram_size);
7183
7184 /* Bad NVRAM data, set defaults parameters. */
7185 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
7186 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
7187 /* Reset NVRAM data. */
7188 ql_log(ql_log_warn, vha, 0x006b,
7189 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
7190 chksum, nv->id, nv->nvram_version);
7191 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv));
7192 ql_log(ql_log_warn, vha, 0x006c,
7193 "Falling back to functioning (yet invalid -- WWPN) "
7194 "defaults.\n");
7195
7196 /*
7197 * Set default initialization control block.
7198 */
7199 memset(nv, 0, ha->nvram_size);
7200 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7201 nv->version = cpu_to_le16(ICB_VERSION);
7202 nv->frame_payload_size = 2048;
7203 nv->execution_throttle = cpu_to_le16(0xFFFF);
7204 nv->exchange_count = cpu_to_le16(0);
7205 nv->hard_address = cpu_to_le16(124);
7206 nv->port_name[0] = 0x21;
7207 nv->port_name[1] = 0x00 + ha->port_no + 1;
7208 nv->port_name[2] = 0x00;
7209 nv->port_name[3] = 0xe0;
7210 nv->port_name[4] = 0x8b;
7211 nv->port_name[5] = 0x1c;
7212 nv->port_name[6] = 0x55;
7213 nv->port_name[7] = 0x86;
7214 nv->node_name[0] = 0x20;
7215 nv->node_name[1] = 0x00;
7216 nv->node_name[2] = 0x00;
7217 nv->node_name[3] = 0xe0;
7218 nv->node_name[4] = 0x8b;
7219 nv->node_name[5] = 0x1c;
7220 nv->node_name[6] = 0x55;
7221 nv->node_name[7] = 0x86;
7222 qla24xx_nvram_wwn_from_ofw(vha, nv);
7223 nv->login_retry_count = cpu_to_le16(8);
7224 nv->interrupt_delay_timer = cpu_to_le16(0);
7225 nv->login_timeout = cpu_to_le16(0);
7226 nv->firmware_options_1 =
7227 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7228 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7229 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7230 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7231 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7232 nv->efi_parameters = cpu_to_le32(0);
7233 nv->reset_delay = 5;
7234 nv->max_luns_per_target = cpu_to_le16(128);
7235 nv->port_down_retry_count = cpu_to_le16(30);
7236 nv->link_down_timeout = cpu_to_le16(30);
7237
7238 rval = 1;
7239 }
7240
7241 if (qla_tgt_mode_enabled(vha)) {
7242 /* Don't enable full login after initial LIP */
7243 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7244 /* Don't enable LIP full login for initiator */
7245 nv->host_p &= cpu_to_le32(~BIT_10);
7246 }
7247
7248 qlt_24xx_config_nvram_stage1(vha, nv);
7249
7250 /* Reset Initialization control block */
7251 memset(icb, 0, ha->init_cb_size);
7252
7253 /* Copy 1st segment. */
7254 dptr1 = (uint8_t *)icb;
7255 dptr2 = (uint8_t *)&nv->version;
7256 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7257 while (cnt--)
7258 *dptr1++ = *dptr2++;
7259
7260 icb->login_retry_count = nv->login_retry_count;
7261 icb->link_down_on_nos = nv->link_down_on_nos;
7262
7263 /* Copy 2nd segment. */
7264 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7265 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7266 cnt = (uint8_t *)&icb->reserved_3 -
7267 (uint8_t *)&icb->interrupt_delay_timer;
7268 while (cnt--)
7269 *dptr1++ = *dptr2++;
7270 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7271 /*
7272 * Setup driver NVRAM options.
7273 */
7274 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7275 "QLA2462");
7276
7277 qlt_24xx_config_nvram_stage2(vha, icb);
7278
7279 if (nv->host_p & cpu_to_le32(BIT_15)) {
7280 /* Use alternate WWN? */
7281 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7282 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7283 }
7284
7285 /* Prepare nodename */
7286 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7287 /*
7288 * Firmware will apply the following mask if the nodename was
7289 * not provided.
7290 */
7291 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7292 icb->node_name[0] &= 0xF0;
7293 }
7294
7295 /* Set host adapter parameters. */
7296 ha->flags.disable_risc_code_load = 0;
7297 ha->flags.enable_lip_reset = 0;
7298 ha->flags.enable_lip_full_login =
7299 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
7300 ha->flags.enable_target_reset =
7301 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
7302 ha->flags.enable_led_scheme = 0;
7303 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
7304
7305 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7306 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7307
7308 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7309 sizeof(ha->fw_seriallink_options24));
7310
7311 /* save HBA serial number */
7312 ha->serial0 = icb->port_name[5];
7313 ha->serial1 = icb->port_name[6];
7314 ha->serial2 = icb->port_name[7];
7315 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7316 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7317
7318 icb->execution_throttle = cpu_to_le16(0xFFFF);
7319
7320 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7321
7322 /* Set minimum login_timeout to 4 seconds. */
7323 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7324 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7325 if (le16_to_cpu(nv->login_timeout) < 4)
7326 nv->login_timeout = cpu_to_le16(4);
7327 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7328
7329 /* Set minimum RATOV to 100 tenths of a second. */
7330 ha->r_a_tov = 100;
7331
7332 ha->loop_reset_delay = nv->reset_delay;
7333
7334 /* Link Down Timeout = 0:
7335 *
7336 * When Port Down timer expires we will start returning
7337 * I/O's to OS with "DID_NO_CONNECT".
7338 *
7339 * Link Down Timeout != 0:
7340 *
7341 * The driver waits for the link to come up after link down
7342 * before returning I/Os to OS with "DID_NO_CONNECT".
7343 */
7344 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7345 ha->loop_down_abort_time =
7346 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7347 } else {
7348 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7349 ha->loop_down_abort_time =
7350 (LOOP_DOWN_TIME - ha->link_down_timeout);
7351 }
7352
7353 /* Need enough time to try and get the port back. */
7354 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7355 if (qlport_down_retry)
7356 ha->port_down_retry_count = qlport_down_retry;
7357
7358 /* Set login_retry_count */
7359 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7360 if (ha->port_down_retry_count ==
7361 le16_to_cpu(nv->port_down_retry_count) &&
7362 ha->port_down_retry_count > 3)
7363 ha->login_retry_count = ha->port_down_retry_count;
7364 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7365 ha->login_retry_count = ha->port_down_retry_count;
7366 if (ql2xloginretrycount)
7367 ha->login_retry_count = ql2xloginretrycount;
7368
7369 /* N2N: driver will initiate Login instead of FW */
7370 icb->firmware_options_3 |= BIT_8;
7371
7372 /* Enable ZIO. */
7373 if (!vha->flags.init_done) {
7374 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7375 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7376 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7377 le16_to_cpu(icb->interrupt_delay_timer) : 2;
7378 }
7379 icb->firmware_options_2 &= cpu_to_le32(
7380 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7381 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7382 ha->zio_mode = QLA_ZIO_MODE_6;
7383
7384 ql_log(ql_log_info, vha, 0x006f,
7385 "ZIO mode %d enabled; timer delay (%d us).\n",
7386 ha->zio_mode, ha->zio_timer * 100);
7387
7388 icb->firmware_options_2 |= cpu_to_le32(
7389 (uint32_t)ha->zio_mode);
7390 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7391 }
7392
7393 if (rval) {
7394 ql_log(ql_log_warn, vha, 0x0070,
7395 "NVRAM configuration failed.\n");
7396 }
7397 return (rval);
7398 }
7399
7400 static void
7401 qla27xx_print_image(struct scsi_qla_host *vha, char *name,
7402 struct qla27xx_image_status *image_status)
7403 {
7404 ql_dbg(ql_dbg_init, vha, 0x018b,
7405 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n",
7406 name, "status",
7407 image_status->image_status_mask,
7408 le16_to_cpu(image_status->generation),
7409 image_status->ver_major,
7410 image_status->ver_minor,
7411 image_status->bitmap,
7412 le32_to_cpu(image_status->checksum),
7413 le32_to_cpu(image_status->signature));
7414 }
7415
7416 static bool
7417 qla28xx_check_aux_image_status_signature(
7418 struct qla27xx_image_status *image_status)
7419 {
7420 ulong signature = le32_to_cpu(image_status->signature);
7421
7422 return signature != QLA28XX_AUX_IMG_STATUS_SIGN;
7423 }
7424
7425 static bool
7426 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status)
7427 {
7428 ulong signature = le32_to_cpu(image_status->signature);
7429
7430 return
7431 signature != QLA27XX_IMG_STATUS_SIGN &&
7432 signature != QLA28XX_IMG_STATUS_SIGN;
7433 }
7434
7435 static ulong
7436 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status)
7437 {
7438 uint32_t *p = (void *)image_status;
7439 uint n = sizeof(*image_status) / sizeof(*p);
7440 uint32_t sum = 0;
7441
7442 for ( ; n--; p++)
7443 sum += le32_to_cpup(p);
7444
7445 return sum;
7446 }
7447
7448 static inline uint
7449 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask)
7450 {
7451 return aux->bitmap & bitmask ?
7452 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE;
7453 }
7454
7455 static void
7456 qla28xx_component_status(
7457 struct active_regions *active_regions, struct qla27xx_image_status *aux)
7458 {
7459 active_regions->aux.board_config =
7460 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG);
7461
7462 active_regions->aux.vpd_nvram =
7463 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM);
7464
7465 active_regions->aux.npiv_config_0_1 =
7466 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1);
7467
7468 active_regions->aux.npiv_config_2_3 =
7469 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3);
7470 }
7471
7472 static int
7473 qla27xx_compare_image_generation(
7474 struct qla27xx_image_status *pri_image_status,
7475 struct qla27xx_image_status *sec_image_status)
7476 {
7477 /* calculate generation delta as uint16 (this accounts for wrap) */
7478 int16_t delta =
7479 le16_to_cpu(pri_image_status->generation) -
7480 le16_to_cpu(sec_image_status->generation);
7481
7482 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta);
7483
7484 return delta;
7485 }
7486
7487 void
7488 qla28xx_get_aux_images(
7489 struct scsi_qla_host *vha, struct active_regions *active_regions)
7490 {
7491 struct qla_hw_data *ha = vha->hw;
7492 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status;
7493 bool valid_pri_image = false, valid_sec_image = false;
7494 bool active_pri_image = false, active_sec_image = false;
7495
7496 if (!ha->flt_region_aux_img_status_pri) {
7497 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n");
7498 goto check_sec_image;
7499 }
7500
7501 qla24xx_read_flash_data(vha, (void *)&pri_aux_image_status,
7502 ha->flt_region_aux_img_status_pri,
7503 sizeof(pri_aux_image_status) >> 2);
7504 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status);
7505
7506 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) {
7507 ql_dbg(ql_dbg_init, vha, 0x018b,
7508 "Primary aux image signature (%#x) not valid\n",
7509 le32_to_cpu(pri_aux_image_status.signature));
7510 goto check_sec_image;
7511 }
7512
7513 if (qla27xx_image_status_checksum(&pri_aux_image_status)) {
7514 ql_dbg(ql_dbg_init, vha, 0x018c,
7515 "Primary aux image checksum failed\n");
7516 goto check_sec_image;
7517 }
7518
7519 valid_pri_image = true;
7520
7521 if (pri_aux_image_status.image_status_mask & 1) {
7522 ql_dbg(ql_dbg_init, vha, 0x018d,
7523 "Primary aux image is active\n");
7524 active_pri_image = true;
7525 }
7526
7527 check_sec_image:
7528 if (!ha->flt_region_aux_img_status_sec) {
7529 ql_dbg(ql_dbg_init, vha, 0x018a,
7530 "Secondary aux image not addressed\n");
7531 goto check_valid_image;
7532 }
7533
7534 qla24xx_read_flash_data(vha, (void *)&sec_aux_image_status,
7535 ha->flt_region_aux_img_status_sec,
7536 sizeof(sec_aux_image_status) >> 2);
7537 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status);
7538
7539 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) {
7540 ql_dbg(ql_dbg_init, vha, 0x018b,
7541 "Secondary aux image signature (%#x) not valid\n",
7542 le32_to_cpu(sec_aux_image_status.signature));
7543 goto check_valid_image;
7544 }
7545
7546 if (qla27xx_image_status_checksum(&sec_aux_image_status)) {
7547 ql_dbg(ql_dbg_init, vha, 0x018c,
7548 "Secondary aux image checksum failed\n");
7549 goto check_valid_image;
7550 }
7551
7552 valid_sec_image = true;
7553
7554 if (sec_aux_image_status.image_status_mask & 1) {
7555 ql_dbg(ql_dbg_init, vha, 0x018d,
7556 "Secondary aux image is active\n");
7557 active_sec_image = true;
7558 }
7559
7560 check_valid_image:
7561 if (valid_pri_image && active_pri_image &&
7562 valid_sec_image && active_sec_image) {
7563 if (qla27xx_compare_image_generation(&pri_aux_image_status,
7564 &sec_aux_image_status) >= 0) {
7565 qla28xx_component_status(active_regions,
7566 &pri_aux_image_status);
7567 } else {
7568 qla28xx_component_status(active_regions,
7569 &sec_aux_image_status);
7570 }
7571 } else if (valid_pri_image && active_pri_image) {
7572 qla28xx_component_status(active_regions, &pri_aux_image_status);
7573 } else if (valid_sec_image && active_sec_image) {
7574 qla28xx_component_status(active_regions, &sec_aux_image_status);
7575 }
7576
7577 ql_dbg(ql_dbg_init, vha, 0x018f,
7578 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n",
7579 active_regions->aux.board_config,
7580 active_regions->aux.vpd_nvram,
7581 active_regions->aux.npiv_config_0_1,
7582 active_regions->aux.npiv_config_2_3);
7583 }
7584
7585 void
7586 qla27xx_get_active_image(struct scsi_qla_host *vha,
7587 struct active_regions *active_regions)
7588 {
7589 struct qla_hw_data *ha = vha->hw;
7590 struct qla27xx_image_status pri_image_status, sec_image_status;
7591 bool valid_pri_image = false, valid_sec_image = false;
7592 bool active_pri_image = false, active_sec_image = false;
7593
7594 if (!ha->flt_region_img_status_pri) {
7595 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n");
7596 goto check_sec_image;
7597 }
7598
7599 if (qla24xx_read_flash_data(vha, (void *)(&pri_image_status),
7600 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) !=
7601 QLA_SUCCESS) {
7602 WARN_ON_ONCE(true);
7603 goto check_sec_image;
7604 }
7605 qla27xx_print_image(vha, "Primary image", &pri_image_status);
7606
7607 if (qla27xx_check_image_status_signature(&pri_image_status)) {
7608 ql_dbg(ql_dbg_init, vha, 0x018b,
7609 "Primary image signature (%#x) not valid\n",
7610 le32_to_cpu(pri_image_status.signature));
7611 goto check_sec_image;
7612 }
7613
7614 if (qla27xx_image_status_checksum(&pri_image_status)) {
7615 ql_dbg(ql_dbg_init, vha, 0x018c,
7616 "Primary image checksum failed\n");
7617 goto check_sec_image;
7618 }
7619
7620 valid_pri_image = true;
7621
7622 if (pri_image_status.image_status_mask & 1) {
7623 ql_dbg(ql_dbg_init, vha, 0x018d,
7624 "Primary image is active\n");
7625 active_pri_image = true;
7626 }
7627
7628 check_sec_image:
7629 if (!ha->flt_region_img_status_sec) {
7630 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n");
7631 goto check_valid_image;
7632 }
7633
7634 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7635 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2);
7636 qla27xx_print_image(vha, "Secondary image", &sec_image_status);
7637
7638 if (qla27xx_check_image_status_signature(&sec_image_status)) {
7639 ql_dbg(ql_dbg_init, vha, 0x018b,
7640 "Secondary image signature (%#x) not valid\n",
7641 le32_to_cpu(sec_image_status.signature));
7642 goto check_valid_image;
7643 }
7644
7645 if (qla27xx_image_status_checksum(&sec_image_status)) {
7646 ql_dbg(ql_dbg_init, vha, 0x018c,
7647 "Secondary image checksum failed\n");
7648 goto check_valid_image;
7649 }
7650
7651 valid_sec_image = true;
7652
7653 if (sec_image_status.image_status_mask & 1) {
7654 ql_dbg(ql_dbg_init, vha, 0x018d,
7655 "Secondary image is active\n");
7656 active_sec_image = true;
7657 }
7658
7659 check_valid_image:
7660 if (valid_pri_image && active_pri_image)
7661 active_regions->global = QLA27XX_PRIMARY_IMAGE;
7662
7663 if (valid_sec_image && active_sec_image) {
7664 if (!active_regions->global ||
7665 qla27xx_compare_image_generation(
7666 &pri_image_status, &sec_image_status) < 0) {
7667 active_regions->global = QLA27XX_SECONDARY_IMAGE;
7668 }
7669 }
7670
7671 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n",
7672 active_regions->global == QLA27XX_DEFAULT_IMAGE ?
7673 "default (boot/fw)" :
7674 active_regions->global == QLA27XX_PRIMARY_IMAGE ?
7675 "primary" :
7676 active_regions->global == QLA27XX_SECONDARY_IMAGE ?
7677 "secondary" : "invalid",
7678 active_regions->global);
7679 }
7680
7681 bool qla24xx_risc_firmware_invalid(uint32_t *dword)
7682 {
7683 return
7684 !(dword[4] | dword[5] | dword[6] | dword[7]) ||
7685 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]);
7686 }
7687
7688 static int
7689 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7690 uint32_t faddr)
7691 {
7692 int rval;
7693 uint templates, segments, fragment;
7694 ulong i;
7695 uint j;
7696 ulong dlen;
7697 uint32_t *dcode;
7698 uint32_t risc_addr, risc_size, risc_attr = 0;
7699 struct qla_hw_data *ha = vha->hw;
7700 struct req_que *req = ha->req_q_map[0];
7701 struct fwdt *fwdt = ha->fwdt;
7702
7703 ql_dbg(ql_dbg_init, vha, 0x008b,
7704 "FW: Loading firmware from flash (%x).\n", faddr);
7705
7706 dcode = (void *)req->ring;
7707 qla24xx_read_flash_data(vha, dcode, faddr, 8);
7708 if (qla24xx_risc_firmware_invalid(dcode)) {
7709 ql_log(ql_log_fatal, vha, 0x008c,
7710 "Unable to verify the integrity of flash firmware "
7711 "image.\n");
7712 ql_log(ql_log_fatal, vha, 0x008d,
7713 "Firmware data: %08x %08x %08x %08x.\n",
7714 dcode[0], dcode[1], dcode[2], dcode[3]);
7715
7716 return QLA_FUNCTION_FAILED;
7717 }
7718
7719 dcode = (void *)req->ring;
7720 *srisc_addr = 0;
7721 segments = FA_RISC_CODE_SEGMENTS;
7722 for (j = 0; j < segments; j++) {
7723 ql_dbg(ql_dbg_init, vha, 0x008d,
7724 "-> Loading segment %u...\n", j);
7725 qla24xx_read_flash_data(vha, dcode, faddr, 10);
7726 risc_addr = be32_to_cpu(dcode[2]);
7727 risc_size = be32_to_cpu(dcode[3]);
7728 if (!*srisc_addr) {
7729 *srisc_addr = risc_addr;
7730 risc_attr = be32_to_cpu(dcode[9]);
7731 }
7732
7733 dlen = ha->fw_transfer_size >> 2;
7734 for (fragment = 0; risc_size; fragment++) {
7735 if (dlen > risc_size)
7736 dlen = risc_size;
7737
7738 ql_dbg(ql_dbg_init, vha, 0x008e,
7739 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n",
7740 fragment, risc_addr, faddr, dlen);
7741 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7742 for (i = 0; i < dlen; i++)
7743 dcode[i] = swab32(dcode[i]);
7744
7745 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
7746 if (rval) {
7747 ql_log(ql_log_fatal, vha, 0x008f,
7748 "-> Failed load firmware fragment %u.\n",
7749 fragment);
7750 return QLA_FUNCTION_FAILED;
7751 }
7752
7753 faddr += dlen;
7754 risc_addr += dlen;
7755 risc_size -= dlen;
7756 }
7757 }
7758
7759 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
7760 return QLA_SUCCESS;
7761
7762 templates = (risc_attr & BIT_9) ? 2 : 1;
7763 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates);
7764 for (j = 0; j < templates; j++, fwdt++) {
7765 if (fwdt->template)
7766 vfree(fwdt->template);
7767 fwdt->template = NULL;
7768 fwdt->length = 0;
7769
7770 dcode = (void *)req->ring;
7771 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7772 risc_size = be32_to_cpu(dcode[2]);
7773 ql_dbg(ql_dbg_init, vha, 0x0161,
7774 "-> fwdt%u template array at %#x (%#x dwords)\n",
7775 j, faddr, risc_size);
7776 if (!risc_size || !~risc_size) {
7777 ql_dbg(ql_dbg_init, vha, 0x0162,
7778 "-> fwdt%u failed to read array\n", j);
7779 goto failed;
7780 }
7781
7782 /* skip header and ignore checksum */
7783 faddr += 7;
7784 risc_size -= 8;
7785
7786 ql_dbg(ql_dbg_init, vha, 0x0163,
7787 "-> fwdt%u template allocate template %#x words...\n",
7788 j, risc_size);
7789 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
7790 if (!fwdt->template) {
7791 ql_log(ql_log_warn, vha, 0x0164,
7792 "-> fwdt%u failed allocate template.\n", j);
7793 goto failed;
7794 }
7795
7796 dcode = fwdt->template;
7797 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7798
7799 if (!qla27xx_fwdt_template_valid(dcode)) {
7800 ql_log(ql_log_warn, vha, 0x0165,
7801 "-> fwdt%u failed template validate\n", j);
7802 goto failed;
7803 }
7804
7805 dlen = qla27xx_fwdt_template_size(dcode);
7806 ql_dbg(ql_dbg_init, vha, 0x0166,
7807 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
7808 j, dlen, dlen / sizeof(*dcode));
7809 if (dlen > risc_size * sizeof(*dcode)) {
7810 ql_log(ql_log_warn, vha, 0x0167,
7811 "-> fwdt%u template exceeds array (%-lu bytes)\n",
7812 j, dlen - risc_size * sizeof(*dcode));
7813 goto failed;
7814 }
7815
7816 fwdt->length = dlen;
7817 ql_dbg(ql_dbg_init, vha, 0x0168,
7818 "-> fwdt%u loaded template ok\n", j);
7819
7820 faddr += risc_size + 1;
7821 }
7822
7823 return QLA_SUCCESS;
7824
7825 failed:
7826 if (fwdt->template)
7827 vfree(fwdt->template);
7828 fwdt->template = NULL;
7829 fwdt->length = 0;
7830
7831 return QLA_SUCCESS;
7832 }
7833
7834 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7835
7836 int
7837 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7838 {
7839 int rval;
7840 int i, fragment;
7841 uint16_t *wcode, *fwcode;
7842 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7843 struct fw_blob *blob;
7844 struct qla_hw_data *ha = vha->hw;
7845 struct req_que *req = ha->req_q_map[0];
7846
7847 /* Load firmware blob. */
7848 blob = qla2x00_request_firmware(vha);
7849 if (!blob) {
7850 ql_log(ql_log_info, vha, 0x0083,
7851 "Firmware image unavailable.\n");
7852 ql_log(ql_log_info, vha, 0x0084,
7853 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7854 return QLA_FUNCTION_FAILED;
7855 }
7856
7857 rval = QLA_SUCCESS;
7858
7859 wcode = (uint16_t *)req->ring;
7860 *srisc_addr = 0;
7861 fwcode = (uint16_t *)blob->fw->data;
7862 fwclen = 0;
7863
7864 /* Validate firmware image by checking version. */
7865 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7866 ql_log(ql_log_fatal, vha, 0x0085,
7867 "Unable to verify integrity of firmware image (%zd).\n",
7868 blob->fw->size);
7869 goto fail_fw_integrity;
7870 }
7871 for (i = 0; i < 4; i++)
7872 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7873 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7874 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7875 wcode[2] == 0 && wcode[3] == 0)) {
7876 ql_log(ql_log_fatal, vha, 0x0086,
7877 "Unable to verify integrity of firmware image.\n");
7878 ql_log(ql_log_fatal, vha, 0x0087,
7879 "Firmware data: %04x %04x %04x %04x.\n",
7880 wcode[0], wcode[1], wcode[2], wcode[3]);
7881 goto fail_fw_integrity;
7882 }
7883
7884 seg = blob->segs;
7885 while (*seg && rval == QLA_SUCCESS) {
7886 risc_addr = *seg;
7887 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7888 risc_size = be16_to_cpu(fwcode[3]);
7889
7890 /* Validate firmware image size. */
7891 fwclen += risc_size * sizeof(uint16_t);
7892 if (blob->fw->size < fwclen) {
7893 ql_log(ql_log_fatal, vha, 0x0088,
7894 "Unable to verify integrity of firmware image "
7895 "(%zd).\n", blob->fw->size);
7896 goto fail_fw_integrity;
7897 }
7898
7899 fragment = 0;
7900 while (risc_size > 0 && rval == QLA_SUCCESS) {
7901 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7902 if (wlen > risc_size)
7903 wlen = risc_size;
7904 ql_dbg(ql_dbg_init, vha, 0x0089,
7905 "Loading risc segment@ risc addr %x number of "
7906 "words 0x%x.\n", risc_addr, wlen);
7907
7908 for (i = 0; i < wlen; i++)
7909 wcode[i] = swab16(fwcode[i]);
7910
7911 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7912 wlen);
7913 if (rval) {
7914 ql_log(ql_log_fatal, vha, 0x008a,
7915 "Failed to load segment %d of firmware.\n",
7916 fragment);
7917 break;
7918 }
7919
7920 fwcode += wlen;
7921 risc_addr += wlen;
7922 risc_size -= wlen;
7923 fragment++;
7924 }
7925
7926 /* Next segment. */
7927 seg++;
7928 }
7929 return rval;
7930
7931 fail_fw_integrity:
7932 return QLA_FUNCTION_FAILED;
7933 }
7934
7935 static int
7936 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7937 {
7938 int rval;
7939 uint templates, segments, fragment;
7940 uint32_t *dcode;
7941 ulong dlen;
7942 uint32_t risc_addr, risc_size, risc_attr = 0;
7943 ulong i;
7944 uint j;
7945 struct fw_blob *blob;
7946 uint32_t *fwcode;
7947 struct qla_hw_data *ha = vha->hw;
7948 struct req_que *req = ha->req_q_map[0];
7949 struct fwdt *fwdt = ha->fwdt;
7950
7951 ql_dbg(ql_dbg_init, vha, 0x0090,
7952 "-> FW: Loading via request-firmware.\n");
7953
7954 blob = qla2x00_request_firmware(vha);
7955 if (!blob) {
7956 ql_log(ql_log_warn, vha, 0x0092,
7957 "-> Firmware file not found.\n");
7958
7959 return QLA_FUNCTION_FAILED;
7960 }
7961
7962 fwcode = (void *)blob->fw->data;
7963 dcode = fwcode;
7964 if (qla24xx_risc_firmware_invalid(dcode)) {
7965 ql_log(ql_log_fatal, vha, 0x0093,
7966 "Unable to verify integrity of firmware image (%zd).\n",
7967 blob->fw->size);
7968 ql_log(ql_log_fatal, vha, 0x0095,
7969 "Firmware data: %08x %08x %08x %08x.\n",
7970 dcode[0], dcode[1], dcode[2], dcode[3]);
7971 return QLA_FUNCTION_FAILED;
7972 }
7973
7974 dcode = (void *)req->ring;
7975 *srisc_addr = 0;
7976 segments = FA_RISC_CODE_SEGMENTS;
7977 for (j = 0; j < segments; j++) {
7978 ql_dbg(ql_dbg_init, vha, 0x0096,
7979 "-> Loading segment %u...\n", j);
7980 risc_addr = be32_to_cpu(fwcode[2]);
7981 risc_size = be32_to_cpu(fwcode[3]);
7982
7983 if (!*srisc_addr) {
7984 *srisc_addr = risc_addr;
7985 risc_attr = be32_to_cpu(fwcode[9]);
7986 }
7987
7988 dlen = ha->fw_transfer_size >> 2;
7989 for (fragment = 0; risc_size; fragment++) {
7990 if (dlen > risc_size)
7991 dlen = risc_size;
7992
7993 ql_dbg(ql_dbg_init, vha, 0x0097,
7994 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n",
7995 fragment, risc_addr,
7996 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data),
7997 dlen);
7998
7999 for (i = 0; i < dlen; i++)
8000 dcode[i] = swab32(fwcode[i]);
8001
8002 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen);
8003 if (rval) {
8004 ql_log(ql_log_fatal, vha, 0x0098,
8005 "-> Failed load firmware fragment %u.\n",
8006 fragment);
8007 return QLA_FUNCTION_FAILED;
8008 }
8009
8010 fwcode += dlen;
8011 risc_addr += dlen;
8012 risc_size -= dlen;
8013 }
8014 }
8015
8016 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8017 return QLA_SUCCESS;
8018
8019 templates = (risc_attr & BIT_9) ? 2 : 1;
8020 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates);
8021 for (j = 0; j < templates; j++, fwdt++) {
8022 if (fwdt->template)
8023 vfree(fwdt->template);
8024 fwdt->template = NULL;
8025 fwdt->length = 0;
8026
8027 risc_size = be32_to_cpu(fwcode[2]);
8028 ql_dbg(ql_dbg_init, vha, 0x0171,
8029 "-> fwdt%u template array at %#x (%#x dwords)\n",
8030 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data),
8031 risc_size);
8032 if (!risc_size || !~risc_size) {
8033 ql_dbg(ql_dbg_init, vha, 0x0172,
8034 "-> fwdt%u failed to read array\n", j);
8035 goto failed;
8036 }
8037
8038 /* skip header and ignore checksum */
8039 fwcode += 7;
8040 risc_size -= 8;
8041
8042 ql_dbg(ql_dbg_init, vha, 0x0173,
8043 "-> fwdt%u template allocate template %#x words...\n",
8044 j, risc_size);
8045 fwdt->template = vmalloc(risc_size * sizeof(*dcode));
8046 if (!fwdt->template) {
8047 ql_log(ql_log_warn, vha, 0x0174,
8048 "-> fwdt%u failed allocate template.\n", j);
8049 goto failed;
8050 }
8051
8052 dcode = fwdt->template;
8053 for (i = 0; i < risc_size; i++)
8054 dcode[i] = fwcode[i];
8055
8056 if (!qla27xx_fwdt_template_valid(dcode)) {
8057 ql_log(ql_log_warn, vha, 0x0175,
8058 "-> fwdt%u failed template validate\n", j);
8059 goto failed;
8060 }
8061
8062 dlen = qla27xx_fwdt_template_size(dcode);
8063 ql_dbg(ql_dbg_init, vha, 0x0176,
8064 "-> fwdt%u template size %#lx bytes (%#lx words)\n",
8065 j, dlen, dlen / sizeof(*dcode));
8066 if (dlen > risc_size * sizeof(*dcode)) {
8067 ql_log(ql_log_warn, vha, 0x0177,
8068 "-> fwdt%u template exceeds array (%-lu bytes)\n",
8069 j, dlen - risc_size * sizeof(*dcode));
8070 goto failed;
8071 }
8072
8073 fwdt->length = dlen;
8074 ql_dbg(ql_dbg_init, vha, 0x0178,
8075 "-> fwdt%u loaded template ok\n", j);
8076
8077 fwcode += risc_size + 1;
8078 }
8079
8080 return QLA_SUCCESS;
8081
8082 failed:
8083 if (fwdt->template)
8084 vfree(fwdt->template);
8085 fwdt->template = NULL;
8086 fwdt->length = 0;
8087
8088 return QLA_SUCCESS;
8089 }
8090
8091 int
8092 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8093 {
8094 int rval;
8095
8096 if (ql2xfwloadbin == 1)
8097 return qla81xx_load_risc(vha, srisc_addr);
8098
8099 /*
8100 * FW Load priority:
8101 * 1) Firmware via request-firmware interface (.bin file).
8102 * 2) Firmware residing in flash.
8103 */
8104 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8105 if (rval == QLA_SUCCESS)
8106 return rval;
8107
8108 return qla24xx_load_risc_flash(vha, srisc_addr,
8109 vha->hw->flt_region_fw);
8110 }
8111
8112 int
8113 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
8114 {
8115 int rval;
8116 struct qla_hw_data *ha = vha->hw;
8117 struct active_regions active_regions = { };
8118
8119 if (ql2xfwloadbin == 2)
8120 goto try_blob_fw;
8121
8122 /* FW Load priority:
8123 * 1) Firmware residing in flash.
8124 * 2) Firmware via request-firmware interface (.bin file).
8125 * 3) Golden-Firmware residing in flash -- (limited operation).
8126 */
8127
8128 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha))
8129 goto try_primary_fw;
8130
8131 qla27xx_get_active_image(vha, &active_regions);
8132
8133 if (active_regions.global != QLA27XX_SECONDARY_IMAGE)
8134 goto try_primary_fw;
8135
8136 ql_dbg(ql_dbg_init, vha, 0x008b,
8137 "Loading secondary firmware image.\n");
8138 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec);
8139 if (!rval)
8140 return rval;
8141
8142 try_primary_fw:
8143 ql_dbg(ql_dbg_init, vha, 0x008b,
8144 "Loading primary firmware image.\n");
8145 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
8146 if (!rval)
8147 return rval;
8148
8149 try_blob_fw:
8150 rval = qla24xx_load_risc_blob(vha, srisc_addr);
8151 if (!rval || !ha->flt_region_gold_fw)
8152 return rval;
8153
8154 ql_log(ql_log_info, vha, 0x0099,
8155 "Attempting to fallback to golden firmware.\n");
8156 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
8157 if (rval)
8158 return rval;
8159
8160 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n");
8161 ha->flags.running_gold_fw = 1;
8162 return rval;
8163 }
8164
8165 void
8166 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
8167 {
8168 int ret, retries;
8169 struct qla_hw_data *ha = vha->hw;
8170
8171 if (ha->flags.pci_channel_io_perm_failure)
8172 return;
8173 if (!IS_FWI2_CAPABLE(ha))
8174 return;
8175 if (!ha->fw_major_version)
8176 return;
8177 if (!ha->flags.fw_started)
8178 return;
8179
8180 ret = qla2x00_stop_firmware(vha);
8181 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
8182 ret != QLA_INVALID_COMMAND && retries ; retries--) {
8183 ha->isp_ops->reset_chip(vha);
8184 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
8185 continue;
8186 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
8187 continue;
8188 ql_log(ql_log_info, vha, 0x8015,
8189 "Attempting retry of stop-firmware command.\n");
8190 ret = qla2x00_stop_firmware(vha);
8191 }
8192
8193 QLA_FW_STOPPED(ha);
8194 ha->flags.fw_init_done = 0;
8195 }
8196
8197 int
8198 qla24xx_configure_vhba(scsi_qla_host_t *vha)
8199 {
8200 int rval = QLA_SUCCESS;
8201 int rval2;
8202 uint16_t mb[MAILBOX_REGISTER_COUNT];
8203 struct qla_hw_data *ha = vha->hw;
8204 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
8205
8206 if (!vha->vp_idx)
8207 return -EINVAL;
8208
8209 rval = qla2x00_fw_ready(base_vha);
8210
8211 if (rval == QLA_SUCCESS) {
8212 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8213 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8214 }
8215
8216 vha->flags.management_server_logged_in = 0;
8217
8218 /* Login to SNS first */
8219 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
8220 BIT_1);
8221 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
8222 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
8223 ql_dbg(ql_dbg_init, vha, 0x0120,
8224 "Failed SNS login: loop_id=%x, rval2=%d\n",
8225 NPH_SNS, rval2);
8226 else
8227 ql_dbg(ql_dbg_init, vha, 0x0103,
8228 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
8229 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
8230 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
8231 return (QLA_FUNCTION_FAILED);
8232 }
8233
8234 atomic_set(&vha->loop_down_timer, 0);
8235 atomic_set(&vha->loop_state, LOOP_UP);
8236 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8237 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
8238 rval = qla2x00_loop_resync(base_vha);
8239
8240 return rval;
8241 }
8242
8243 /* 84XX Support **************************************************************/
8244
8245 static LIST_HEAD(qla_cs84xx_list);
8246 static DEFINE_MUTEX(qla_cs84xx_mutex);
8247
8248 static struct qla_chip_state_84xx *
8249 qla84xx_get_chip(struct scsi_qla_host *vha)
8250 {
8251 struct qla_chip_state_84xx *cs84xx;
8252 struct qla_hw_data *ha = vha->hw;
8253
8254 mutex_lock(&qla_cs84xx_mutex);
8255
8256 /* Find any shared 84xx chip. */
8257 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
8258 if (cs84xx->bus == ha->pdev->bus) {
8259 kref_get(&cs84xx->kref);
8260 goto done;
8261 }
8262 }
8263
8264 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
8265 if (!cs84xx)
8266 goto done;
8267
8268 kref_init(&cs84xx->kref);
8269 spin_lock_init(&cs84xx->access_lock);
8270 mutex_init(&cs84xx->fw_update_mutex);
8271 cs84xx->bus = ha->pdev->bus;
8272
8273 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8274 done:
8275 mutex_unlock(&qla_cs84xx_mutex);
8276 return cs84xx;
8277 }
8278
8279 static void
8280 __qla84xx_chip_release(struct kref *kref)
8281 {
8282 struct qla_chip_state_84xx *cs84xx =
8283 container_of(kref, struct qla_chip_state_84xx, kref);
8284
8285 mutex_lock(&qla_cs84xx_mutex);
8286 list_del(&cs84xx->list);
8287 mutex_unlock(&qla_cs84xx_mutex);
8288 kfree(cs84xx);
8289 }
8290
8291 void
8292 qla84xx_put_chip(struct scsi_qla_host *vha)
8293 {
8294 struct qla_hw_data *ha = vha->hw;
8295
8296 if (ha->cs84xx)
8297 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8298 }
8299
8300 static int
8301 qla84xx_init_chip(scsi_qla_host_t *vha)
8302 {
8303 int rval;
8304 uint16_t status[2];
8305 struct qla_hw_data *ha = vha->hw;
8306
8307 mutex_lock(&ha->cs84xx->fw_update_mutex);
8308
8309 rval = qla84xx_verify_chip(vha, status);
8310
8311 mutex_unlock(&ha->cs84xx->fw_update_mutex);
8312
8313 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED :
8314 QLA_SUCCESS;
8315 }
8316
8317 /* 81XX Support **************************************************************/
8318
8319 int
8320 qla81xx_nvram_config(scsi_qla_host_t *vha)
8321 {
8322 int rval;
8323 struct init_cb_81xx *icb;
8324 struct nvram_81xx *nv;
8325 uint32_t *dptr;
8326 uint8_t *dptr1, *dptr2;
8327 uint32_t chksum;
8328 uint16_t cnt;
8329 struct qla_hw_data *ha = vha->hw;
8330 uint32_t faddr;
8331 struct active_regions active_regions = { };
8332
8333 rval = QLA_SUCCESS;
8334 icb = (struct init_cb_81xx *)ha->init_cb;
8335 nv = ha->nvram;
8336
8337 /* Determine NVRAM starting address. */
8338 ha->nvram_size = sizeof(*nv);
8339 ha->vpd_size = FA_NVRAM_VPD_SIZE;
8340 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8341 ha->vpd_size = FA_VPD_SIZE_82XX;
8342
8343 if (IS_QLA28XX(ha) || IS_QLA27XX(ha))
8344 qla28xx_get_aux_images(vha, &active_regions);
8345
8346 /* Get VPD data into cache */
8347 ha->vpd = ha->nvram + VPD_OFFSET;
8348
8349 faddr = ha->flt_region_vpd;
8350 if (IS_QLA28XX(ha)) {
8351 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8352 faddr = ha->flt_region_vpd_sec;
8353 ql_dbg(ql_dbg_init, vha, 0x0110,
8354 "Loading %s nvram image.\n",
8355 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8356 "primary" : "secondary");
8357 }
8358 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size);
8359
8360 /* Get NVRAM data into cache and calculate checksum. */
8361 faddr = ha->flt_region_nvram;
8362 if (IS_QLA28XX(ha)) {
8363 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE)
8364 faddr = ha->flt_region_nvram_sec;
8365 }
8366 ql_dbg(ql_dbg_init, vha, 0x0110,
8367 "Loading %s nvram image.\n",
8368 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ?
8369 "primary" : "secondary");
8370 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size);
8371
8372 dptr = (uint32_t *)nv;
8373 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8374 chksum += le32_to_cpu(*dptr);
8375
8376 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8377 "Contents of NVRAM:\n");
8378 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8379 nv, ha->nvram_size);
8380
8381 /* Bad NVRAM data, set defaults parameters. */
8382 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) ||
8383 le16_to_cpu(nv->nvram_version) < ICB_VERSION) {
8384 /* Reset NVRAM data. */
8385 ql_log(ql_log_info, vha, 0x0073,
8386 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n",
8387 chksum, nv->id, le16_to_cpu(nv->nvram_version));
8388 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv));
8389 ql_log(ql_log_info, vha, 0x0074,
8390 "Falling back to functioning (yet invalid -- WWPN) "
8391 "defaults.\n");
8392
8393 /*
8394 * Set default initialization control block.
8395 */
8396 memset(nv, 0, ha->nvram_size);
8397 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8398 nv->version = cpu_to_le16(ICB_VERSION);
8399 nv->frame_payload_size = 2048;
8400 nv->execution_throttle = cpu_to_le16(0xFFFF);
8401 nv->exchange_count = cpu_to_le16(0);
8402 nv->port_name[0] = 0x21;
8403 nv->port_name[1] = 0x00 + ha->port_no + 1;
8404 nv->port_name[2] = 0x00;
8405 nv->port_name[3] = 0xe0;
8406 nv->port_name[4] = 0x8b;
8407 nv->port_name[5] = 0x1c;
8408 nv->port_name[6] = 0x55;
8409 nv->port_name[7] = 0x86;
8410 nv->node_name[0] = 0x20;
8411 nv->node_name[1] = 0x00;
8412 nv->node_name[2] = 0x00;
8413 nv->node_name[3] = 0xe0;
8414 nv->node_name[4] = 0x8b;
8415 nv->node_name[5] = 0x1c;
8416 nv->node_name[6] = 0x55;
8417 nv->node_name[7] = 0x86;
8418 nv->login_retry_count = cpu_to_le16(8);
8419 nv->interrupt_delay_timer = cpu_to_le16(0);
8420 nv->login_timeout = cpu_to_le16(0);
8421 nv->firmware_options_1 =
8422 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8423 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8424 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8425 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8426 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8427 nv->efi_parameters = cpu_to_le32(0);
8428 nv->reset_delay = 5;
8429 nv->max_luns_per_target = cpu_to_le16(128);
8430 nv->port_down_retry_count = cpu_to_le16(30);
8431 nv->link_down_timeout = cpu_to_le16(180);
8432 nv->enode_mac[0] = 0x00;
8433 nv->enode_mac[1] = 0xC0;
8434 nv->enode_mac[2] = 0xDD;
8435 nv->enode_mac[3] = 0x04;
8436 nv->enode_mac[4] = 0x05;
8437 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8438
8439 rval = 1;
8440 }
8441
8442 if (IS_T10_PI_CAPABLE(ha))
8443 nv->frame_payload_size &= ~7;
8444
8445 qlt_81xx_config_nvram_stage1(vha, nv);
8446
8447 /* Reset Initialization control block */
8448 memset(icb, 0, ha->init_cb_size);
8449
8450 /* Copy 1st segment. */
8451 dptr1 = (uint8_t *)icb;
8452 dptr2 = (uint8_t *)&nv->version;
8453 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8454 while (cnt--)
8455 *dptr1++ = *dptr2++;
8456
8457 icb->login_retry_count = nv->login_retry_count;
8458
8459 /* Copy 2nd segment. */
8460 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8461 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8462 cnt = (uint8_t *)&icb->reserved_5 -
8463 (uint8_t *)&icb->interrupt_delay_timer;
8464 while (cnt--)
8465 *dptr1++ = *dptr2++;
8466
8467 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8468 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8469 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8470 icb->enode_mac[0] = 0x00;
8471 icb->enode_mac[1] = 0xC0;
8472 icb->enode_mac[2] = 0xDD;
8473 icb->enode_mac[3] = 0x04;
8474 icb->enode_mac[4] = 0x05;
8475 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8476 }
8477
8478 /* Use extended-initialization control block. */
8479 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8480 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8481 /*
8482 * Setup driver NVRAM options.
8483 */
8484 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8485 "QLE8XXX");
8486
8487 qlt_81xx_config_nvram_stage2(vha, icb);
8488
8489 /* Use alternate WWN? */
8490 if (nv->host_p & cpu_to_le32(BIT_15)) {
8491 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8492 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8493 }
8494
8495 /* Prepare nodename */
8496 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8497 /*
8498 * Firmware will apply the following mask if the nodename was
8499 * not provided.
8500 */
8501 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8502 icb->node_name[0] &= 0xF0;
8503 }
8504
8505 /* Set host adapter parameters. */
8506 ha->flags.disable_risc_code_load = 0;
8507 ha->flags.enable_lip_reset = 0;
8508 ha->flags.enable_lip_full_login =
8509 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0;
8510 ha->flags.enable_target_reset =
8511 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0;
8512 ha->flags.enable_led_scheme = 0;
8513 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0;
8514
8515 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8516 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8517
8518 /* save HBA serial number */
8519 ha->serial0 = icb->port_name[5];
8520 ha->serial1 = icb->port_name[6];
8521 ha->serial2 = icb->port_name[7];
8522 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8523 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8524
8525 icb->execution_throttle = cpu_to_le16(0xFFFF);
8526
8527 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8528
8529 /* Set minimum login_timeout to 4 seconds. */
8530 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8531 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8532 if (le16_to_cpu(nv->login_timeout) < 4)
8533 nv->login_timeout = cpu_to_le16(4);
8534 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8535
8536 /* Set minimum RATOV to 100 tenths of a second. */
8537 ha->r_a_tov = 100;
8538
8539 ha->loop_reset_delay = nv->reset_delay;
8540
8541 /* Link Down Timeout = 0:
8542 *
8543 * When Port Down timer expires we will start returning
8544 * I/O's to OS with "DID_NO_CONNECT".
8545 *
8546 * Link Down Timeout != 0:
8547 *
8548 * The driver waits for the link to come up after link down
8549 * before returning I/Os to OS with "DID_NO_CONNECT".
8550 */
8551 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8552 ha->loop_down_abort_time =
8553 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8554 } else {
8555 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8556 ha->loop_down_abort_time =
8557 (LOOP_DOWN_TIME - ha->link_down_timeout);
8558 }
8559
8560 /* Need enough time to try and get the port back. */
8561 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8562 if (qlport_down_retry)
8563 ha->port_down_retry_count = qlport_down_retry;
8564
8565 /* Set login_retry_count */
8566 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8567 if (ha->port_down_retry_count ==
8568 le16_to_cpu(nv->port_down_retry_count) &&
8569 ha->port_down_retry_count > 3)
8570 ha->login_retry_count = ha->port_down_retry_count;
8571 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8572 ha->login_retry_count = ha->port_down_retry_count;
8573 if (ql2xloginretrycount)
8574 ha->login_retry_count = ql2xloginretrycount;
8575
8576 /* if not running MSI-X we need handshaking on interrupts */
8577 if (!vha->hw->flags.msix_enabled &&
8578 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)))
8579 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8580
8581 /* Enable ZIO. */
8582 if (!vha->flags.init_done) {
8583 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8584 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8585 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8586 le16_to_cpu(icb->interrupt_delay_timer) : 2;
8587 }
8588 icb->firmware_options_2 &= cpu_to_le32(
8589 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8590 vha->flags.process_response_queue = 0;
8591 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8592 ha->zio_mode = QLA_ZIO_MODE_6;
8593
8594 ql_log(ql_log_info, vha, 0x0075,
8595 "ZIO mode %d enabled; timer delay (%d us).\n",
8596 ha->zio_mode,
8597 ha->zio_timer * 100);
8598
8599 icb->firmware_options_2 |= cpu_to_le32(
8600 (uint32_t)ha->zio_mode);
8601 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8602 vha->flags.process_response_queue = 1;
8603 }
8604
8605 /* enable RIDA Format2 */
8606 icb->firmware_options_3 |= BIT_0;
8607
8608 /* N2N: driver will initiate Login instead of FW */
8609 icb->firmware_options_3 |= BIT_8;
8610
8611 /* Determine NVMe/FCP priority for target ports */
8612 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha);
8613
8614 if (rval) {
8615 ql_log(ql_log_warn, vha, 0x0076,
8616 "NVRAM configuration failed.\n");
8617 }
8618 return (rval);
8619 }
8620
8621 int
8622 qla82xx_restart_isp(scsi_qla_host_t *vha)
8623 {
8624 int status, rval;
8625 struct qla_hw_data *ha = vha->hw;
8626 struct scsi_qla_host *vp;
8627 unsigned long flags;
8628
8629 status = qla2x00_init_rings(vha);
8630 if (!status) {
8631 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8632 ha->flags.chip_reset_done = 1;
8633
8634 status = qla2x00_fw_ready(vha);
8635 if (!status) {
8636 /* Issue a marker after FW becomes ready. */
8637 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL);
8638 vha->flags.online = 1;
8639 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8640 }
8641
8642 /* if no cable then assume it's good */
8643 if ((vha->device_flags & DFLG_NO_CABLE))
8644 status = 0;
8645 }
8646
8647 if (!status) {
8648 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8649
8650 if (!atomic_read(&vha->loop_down_timer)) {
8651 /*
8652 * Issue marker command only when we are going
8653 * to start the I/O .
8654 */
8655 vha->marker_needed = 1;
8656 }
8657
8658 ha->isp_ops->enable_intrs(ha);
8659
8660 ha->isp_abort_cnt = 0;
8661 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8662
8663 /* Update the firmware version */
8664 status = qla82xx_check_md_needed(vha);
8665
8666 if (ha->fce) {
8667 ha->flags.fce_enabled = 1;
8668 memset(ha->fce, 0,
8669 fce_calc_size(ha->fce_bufs));
8670 rval = qla2x00_enable_fce_trace(vha,
8671 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8672 &ha->fce_bufs);
8673 if (rval) {
8674 ql_log(ql_log_warn, vha, 0x8001,
8675 "Unable to reinitialize FCE (%d).\n",
8676 rval);
8677 ha->flags.fce_enabled = 0;
8678 }
8679 }
8680
8681 if (ha->eft) {
8682 memset(ha->eft, 0, EFT_SIZE);
8683 rval = qla2x00_enable_eft_trace(vha,
8684 ha->eft_dma, EFT_NUM_BUFFERS);
8685 if (rval) {
8686 ql_log(ql_log_warn, vha, 0x8010,
8687 "Unable to reinitialize EFT (%d).\n",
8688 rval);
8689 }
8690 }
8691 }
8692
8693 if (!status) {
8694 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8695 "qla82xx_restart_isp succeeded.\n");
8696
8697 spin_lock_irqsave(&ha->vport_slock, flags);
8698 list_for_each_entry(vp, &ha->vp_list, list) {
8699 if (vp->vp_idx) {
8700 atomic_inc(&vp->vref_count);
8701 spin_unlock_irqrestore(&ha->vport_slock, flags);
8702
8703 qla2x00_vp_abort_isp(vp);
8704
8705 spin_lock_irqsave(&ha->vport_slock, flags);
8706 atomic_dec(&vp->vref_count);
8707 }
8708 }
8709 spin_unlock_irqrestore(&ha->vport_slock, flags);
8710
8711 } else {
8712 ql_log(ql_log_warn, vha, 0x8016,
8713 "qla82xx_restart_isp **** FAILED ****.\n");
8714 }
8715
8716 return status;
8717 }
8718
8719 /*
8720 * qla24xx_get_fcp_prio
8721 * Gets the fcp cmd priority value for the logged in port.
8722 * Looks for a match of the port descriptors within
8723 * each of the fcp prio config entries. If a match is found,
8724 * the tag (priority) value is returned.
8725 *
8726 * Input:
8727 * vha = scsi host structure pointer.
8728 * fcport = port structure pointer.
8729 *
8730 * Return:
8731 * non-zero (if found)
8732 * -1 (if not found)
8733 *
8734 * Context:
8735 * Kernel context
8736 */
8737 static int
8738 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8739 {
8740 int i, entries;
8741 uint8_t pid_match, wwn_match;
8742 int priority;
8743 uint32_t pid1, pid2;
8744 uint64_t wwn1, wwn2;
8745 struct qla_fcp_prio_entry *pri_entry;
8746 struct qla_hw_data *ha = vha->hw;
8747
8748 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8749 return -1;
8750
8751 priority = -1;
8752 entries = ha->fcp_prio_cfg->num_entries;
8753 pri_entry = &ha->fcp_prio_cfg->entry[0];
8754
8755 for (i = 0; i < entries; i++) {
8756 pid_match = wwn_match = 0;
8757
8758 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8759 pri_entry++;
8760 continue;
8761 }
8762
8763 /* check source pid for a match */
8764 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8765 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8766 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8767 if (pid1 == INVALID_PORT_ID)
8768 pid_match++;
8769 else if (pid1 == pid2)
8770 pid_match++;
8771 }
8772
8773 /* check destination pid for a match */
8774 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8775 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8776 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8777 if (pid1 == INVALID_PORT_ID)
8778 pid_match++;
8779 else if (pid1 == pid2)
8780 pid_match++;
8781 }
8782
8783 /* check source WWN for a match */
8784 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8785 wwn1 = wwn_to_u64(vha->port_name);
8786 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8787 if (wwn2 == (uint64_t)-1)
8788 wwn_match++;
8789 else if (wwn1 == wwn2)
8790 wwn_match++;
8791 }
8792
8793 /* check destination WWN for a match */
8794 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8795 wwn1 = wwn_to_u64(fcport->port_name);
8796 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8797 if (wwn2 == (uint64_t)-1)
8798 wwn_match++;
8799 else if (wwn1 == wwn2)
8800 wwn_match++;
8801 }
8802
8803 if (pid_match == 2 || wwn_match == 2) {
8804 /* Found a matching entry */
8805 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8806 priority = pri_entry->tag;
8807 break;
8808 }
8809
8810 pri_entry++;
8811 }
8812
8813 return priority;
8814 }
8815
8816 /*
8817 * qla24xx_update_fcport_fcp_prio
8818 * Activates fcp priority for the logged in fc port
8819 *
8820 * Input:
8821 * vha = scsi host structure pointer.
8822 * fcp = port structure pointer.
8823 *
8824 * Return:
8825 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8826 *
8827 * Context:
8828 * Kernel context.
8829 */
8830 int
8831 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8832 {
8833 int ret;
8834 int priority;
8835 uint16_t mb[5];
8836
8837 if (fcport->port_type != FCT_TARGET ||
8838 fcport->loop_id == FC_NO_LOOP_ID)
8839 return QLA_FUNCTION_FAILED;
8840
8841 priority = qla24xx_get_fcp_prio(vha, fcport);
8842 if (priority < 0)
8843 return QLA_FUNCTION_FAILED;
8844
8845 if (IS_P3P_TYPE(vha->hw)) {
8846 fcport->fcp_prio = priority & 0xf;
8847 return QLA_SUCCESS;
8848 }
8849
8850 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8851 if (ret == QLA_SUCCESS) {
8852 if (fcport->fcp_prio != priority)
8853 ql_dbg(ql_dbg_user, vha, 0x709e,
8854 "Updated FCP_CMND priority - value=%d loop_id=%d "
8855 "port_id=%02x%02x%02x.\n", priority,
8856 fcport->loop_id, fcport->d_id.b.domain,
8857 fcport->d_id.b.area, fcport->d_id.b.al_pa);
8858 fcport->fcp_prio = priority & 0xf;
8859 } else
8860 ql_dbg(ql_dbg_user, vha, 0x704f,
8861 "Unable to update FCP_CMND priority - ret=0x%x for "
8862 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8863 fcport->d_id.b.domain, fcport->d_id.b.area,
8864 fcport->d_id.b.al_pa);
8865 return ret;
8866 }
8867
8868 /*
8869 * qla24xx_update_all_fcp_prio
8870 * Activates fcp priority for all the logged in ports
8871 *
8872 * Input:
8873 * ha = adapter block pointer.
8874 *
8875 * Return:
8876 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8877 *
8878 * Context:
8879 * Kernel context.
8880 */
8881 int
8882 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8883 {
8884 int ret;
8885 fc_port_t *fcport;
8886
8887 ret = QLA_FUNCTION_FAILED;
8888 /* We need to set priority for all logged in ports */
8889 list_for_each_entry(fcport, &vha->vp_fcports, list)
8890 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8891
8892 return ret;
8893 }
8894
8895 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8896 int vp_idx, bool startqp)
8897 {
8898 int rsp_id = 0;
8899 int req_id = 0;
8900 int i;
8901 struct qla_hw_data *ha = vha->hw;
8902 uint16_t qpair_id = 0;
8903 struct qla_qpair *qpair = NULL;
8904 struct qla_msix_entry *msix;
8905
8906 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8907 ql_log(ql_log_warn, vha, 0x00181,
8908 "FW/Driver is not multi-queue capable.\n");
8909 return NULL;
8910 }
8911
8912 if (ql2xmqsupport || ql2xnvmeenable) {
8913 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8914 if (qpair == NULL) {
8915 ql_log(ql_log_warn, vha, 0x0182,
8916 "Failed to allocate memory for queue pair.\n");
8917 return NULL;
8918 }
8919
8920 qpair->hw = vha->hw;
8921 qpair->vha = vha;
8922 qpair->qp_lock_ptr = &qpair->qp_lock;
8923 spin_lock_init(&qpair->qp_lock);
8924 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
8925
8926 /* Assign available que pair id */
8927 mutex_lock(&ha->mq_lock);
8928 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
8929 if (ha->num_qpairs >= ha->max_qpairs) {
8930 mutex_unlock(&ha->mq_lock);
8931 ql_log(ql_log_warn, vha, 0x0183,
8932 "No resources to create additional q pair.\n");
8933 goto fail_qid_map;
8934 }
8935 ha->num_qpairs++;
8936 set_bit(qpair_id, ha->qpair_qid_map);
8937 ha->queue_pair_map[qpair_id] = qpair;
8938 qpair->id = qpair_id;
8939 qpair->vp_idx = vp_idx;
8940 qpair->fw_started = ha->flags.fw_started;
8941 INIT_LIST_HEAD(&qpair->hints_list);
8942 qpair->chip_reset = ha->base_qpair->chip_reset;
8943 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8944 qpair->enable_explicit_conf =
8945 ha->base_qpair->enable_explicit_conf;
8946
8947 for (i = 0; i < ha->msix_count; i++) {
8948 msix = &ha->msix_entries[i];
8949 if (msix->in_use)
8950 continue;
8951 qpair->msix = msix;
8952 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
8953 "Vector %x selected for qpair\n", msix->vector);
8954 break;
8955 }
8956 if (!qpair->msix) {
8957 ql_log(ql_log_warn, vha, 0x0184,
8958 "Out of MSI-X vectors!.\n");
8959 goto fail_msix;
8960 }
8961
8962 qpair->msix->in_use = 1;
8963 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8964 qpair->pdev = ha->pdev;
8965 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
8966 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
8967
8968 mutex_unlock(&ha->mq_lock);
8969
8970 /* Create response queue first */
8971 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
8972 if (!rsp_id) {
8973 ql_log(ql_log_warn, vha, 0x0185,
8974 "Failed to create response queue.\n");
8975 goto fail_rsp;
8976 }
8977
8978 qpair->rsp = ha->rsp_q_map[rsp_id];
8979
8980 /* Create request queue */
8981 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8982 startqp);
8983 if (!req_id) {
8984 ql_log(ql_log_warn, vha, 0x0186,
8985 "Failed to create request queue.\n");
8986 goto fail_req;
8987 }
8988
8989 qpair->req = ha->req_q_map[req_id];
8990 qpair->rsp->req = qpair->req;
8991 qpair->rsp->qpair = qpair;
8992 /* init qpair to this cpu. Will adjust at run time. */
8993 qla_cpu_update(qpair, smp_processor_id());
8994
8995 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8996 if (ha->fw_attributes & BIT_4)
8997 qpair->difdix_supported = 1;
8998 }
8999
9000 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
9001 if (!qpair->srb_mempool) {
9002 ql_log(ql_log_warn, vha, 0xd036,
9003 "Failed to create srb mempool for qpair %d\n",
9004 qpair->id);
9005 goto fail_mempool;
9006 }
9007
9008 /* Mark as online */
9009 qpair->online = 1;
9010
9011 if (!vha->flags.qpairs_available)
9012 vha->flags.qpairs_available = 1;
9013
9014 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
9015 "Request/Response queue pair created, id %d\n",
9016 qpair->id);
9017 ql_dbg(ql_dbg_init, vha, 0x0187,
9018 "Request/Response queue pair created, id %d\n",
9019 qpair->id);
9020 }
9021 return qpair;
9022
9023 fail_mempool:
9024 fail_req:
9025 qla25xx_delete_rsp_que(vha, qpair->rsp);
9026 fail_rsp:
9027 mutex_lock(&ha->mq_lock);
9028 qpair->msix->in_use = 0;
9029 list_del(&qpair->qp_list_elem);
9030 if (list_empty(&vha->qp_list))
9031 vha->flags.qpairs_available = 0;
9032 fail_msix:
9033 ha->queue_pair_map[qpair_id] = NULL;
9034 clear_bit(qpair_id, ha->qpair_qid_map);
9035 ha->num_qpairs--;
9036 mutex_unlock(&ha->mq_lock);
9037 fail_qid_map:
9038 kfree(qpair);
9039 return NULL;
9040 }
9041
9042 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
9043 {
9044 int ret = QLA_FUNCTION_FAILED;
9045 struct qla_hw_data *ha = qpair->hw;
9046
9047 qpair->delete_in_progress = 1;
9048
9049 ret = qla25xx_delete_req_que(vha, qpair->req);
9050 if (ret != QLA_SUCCESS)
9051 goto fail;
9052
9053 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
9054 if (ret != QLA_SUCCESS)
9055 goto fail;
9056
9057 mutex_lock(&ha->mq_lock);
9058 ha->queue_pair_map[qpair->id] = NULL;
9059 clear_bit(qpair->id, ha->qpair_qid_map);
9060 ha->num_qpairs--;
9061 list_del(&qpair->qp_list_elem);
9062 if (list_empty(&vha->qp_list)) {
9063 vha->flags.qpairs_available = 0;
9064 vha->flags.qpairs_req_created = 0;
9065 vha->flags.qpairs_rsp_created = 0;
9066 }
9067 mempool_destroy(qpair->srb_mempool);
9068 kfree(qpair);
9069 mutex_unlock(&ha->mq_lock);
9070
9071 return QLA_SUCCESS;
9072 fail:
9073 return ret;
9074 }
Linux with added FPC-III support