1 // SPDX-License-Identifier: GPL-2.0+
3 * st-asc.c: ST Asynchronous serial controller (ASC) driver
5 * Copyright (C) 2003-2013 STMicroelectronics (R&D) Limited
8 #include <linux/module.h>
9 #include <linux/serial.h>
10 #include <linux/console.h>
11 #include <linux/sysrq.h>
12 #include <linux/pinctrl/consumer.h>
13 #include <linux/platform_device.h>
15 #include <linux/irq.h>
16 #include <linux/tty.h>
17 #include <linux/tty_flip.h>
18 #include <linux/delay.h>
19 #include <linux/spinlock.h>
20 #include <linux/pm_runtime.h>
22 #include <linux/of_platform.h>
23 #include <linux/serial_core.h>
24 #include <linux/clk.h>
25 #include <linux/gpio/consumer.h>
27 #define DRIVER_NAME "st-asc"
28 #define ASC_SERIAL_NAME "ttyAS"
29 #define ASC_FIFO_SIZE 16
30 #define ASC_MAX_PORTS 8
34 #define NO_HW_FLOWCTRL 1
37 struct uart_port port
;
38 struct gpio_desc
*rts
;
40 struct pinctrl
*pinctrl
;
41 struct pinctrl_state
*states
[2];
42 unsigned int hw_flow_control
:1;
43 unsigned int force_m1
:1;
46 static struct asc_port asc_ports
[ASC_MAX_PORTS
];
47 static struct uart_driver asc_uart_driver
;
49 /*---- UART Register definitions ------------------------------*/
51 /* Register offsets */
53 #define ASC_BAUDRATE 0x00
54 #define ASC_TXBUF 0x04
55 #define ASC_RXBUF 0x08
57 #define ASC_INTEN 0x10
59 #define ASC_GUARDTIME 0x18
60 #define ASC_TIMEOUT 0x1C
61 #define ASC_TXRESET 0x20
62 #define ASC_RXRESET 0x24
63 #define ASC_RETRIES 0x28
66 #define ASC_RXBUF_PE 0x100
67 #define ASC_RXBUF_FE 0x200
69 * Some of status comes from higher bits of the character and some come from
70 * the status register. Combining both of them in to single status using dummy
73 #define ASC_RXBUF_DUMMY_RX 0x10000
74 #define ASC_RXBUF_DUMMY_BE 0x20000
75 #define ASC_RXBUF_DUMMY_OE 0x40000
79 #define ASC_CTL_MODE_MSK 0x0007
80 #define ASC_CTL_MODE_8BIT 0x0001
81 #define ASC_CTL_MODE_7BIT_PAR 0x0003
82 #define ASC_CTL_MODE_9BIT 0x0004
83 #define ASC_CTL_MODE_8BIT_WKUP 0x0005
84 #define ASC_CTL_MODE_8BIT_PAR 0x0007
85 #define ASC_CTL_STOP_MSK 0x0018
86 #define ASC_CTL_STOP_HALFBIT 0x0000
87 #define ASC_CTL_STOP_1BIT 0x0008
88 #define ASC_CTL_STOP_1_HALFBIT 0x0010
89 #define ASC_CTL_STOP_2BIT 0x0018
90 #define ASC_CTL_PARITYODD 0x0020
91 #define ASC_CTL_LOOPBACK 0x0040
92 #define ASC_CTL_RUN 0x0080
93 #define ASC_CTL_RXENABLE 0x0100
94 #define ASC_CTL_SCENABLE 0x0200
95 #define ASC_CTL_FIFOENABLE 0x0400
96 #define ASC_CTL_CTSENABLE 0x0800
97 #define ASC_CTL_BAUDMODE 0x1000
101 #define ASC_GUARDTIME_MSK 0x00FF
105 #define ASC_INTEN_RBE 0x0001
106 #define ASC_INTEN_TE 0x0002
107 #define ASC_INTEN_THE 0x0004
108 #define ASC_INTEN_PE 0x0008
109 #define ASC_INTEN_FE 0x0010
110 #define ASC_INTEN_OE 0x0020
111 #define ASC_INTEN_TNE 0x0040
112 #define ASC_INTEN_TOI 0x0080
113 #define ASC_INTEN_RHF 0x0100
117 #define ASC_RETRIES_MSK 0x00FF
121 #define ASC_RXBUF_MSK 0x03FF
125 #define ASC_STA_RBF 0x0001
126 #define ASC_STA_TE 0x0002
127 #define ASC_STA_THE 0x0004
128 #define ASC_STA_PE 0x0008
129 #define ASC_STA_FE 0x0010
130 #define ASC_STA_OE 0x0020
131 #define ASC_STA_TNE 0x0040
132 #define ASC_STA_TOI 0x0080
133 #define ASC_STA_RHF 0x0100
134 #define ASC_STA_TF 0x0200
135 #define ASC_STA_NKD 0x0400
139 #define ASC_TIMEOUT_MSK 0x00FF
143 #define ASC_TXBUF_MSK 0x01FF
145 /*---- Inline function definitions ---------------------------*/
147 static inline struct asc_port
*to_asc_port(struct uart_port
*port
)
149 return container_of(port
, struct asc_port
, port
);
152 static inline u32
asc_in(struct uart_port
*port
, u32 offset
)
155 return readl_relaxed(port
->membase
+ offset
);
157 return readl(port
->membase
+ offset
);
161 static inline void asc_out(struct uart_port
*port
, u32 offset
, u32 value
)
163 #ifdef writel_relaxed
164 writel_relaxed(value
, port
->membase
+ offset
);
166 writel(value
, port
->membase
+ offset
);
171 * Some simple utility functions to enable and disable interrupts.
172 * Note that these need to be called with interrupts disabled.
174 static inline void asc_disable_tx_interrupts(struct uart_port
*port
)
176 u32 intenable
= asc_in(port
, ASC_INTEN
) & ~ASC_INTEN_THE
;
177 asc_out(port
, ASC_INTEN
, intenable
);
178 (void)asc_in(port
, ASC_INTEN
); /* Defeat bus write posting */
181 static inline void asc_enable_tx_interrupts(struct uart_port
*port
)
183 u32 intenable
= asc_in(port
, ASC_INTEN
) | ASC_INTEN_THE
;
184 asc_out(port
, ASC_INTEN
, intenable
);
187 static inline void asc_disable_rx_interrupts(struct uart_port
*port
)
189 u32 intenable
= asc_in(port
, ASC_INTEN
) & ~ASC_INTEN_RBE
;
190 asc_out(port
, ASC_INTEN
, intenable
);
191 (void)asc_in(port
, ASC_INTEN
); /* Defeat bus write posting */
194 static inline void asc_enable_rx_interrupts(struct uart_port
*port
)
196 u32 intenable
= asc_in(port
, ASC_INTEN
) | ASC_INTEN_RBE
;
197 asc_out(port
, ASC_INTEN
, intenable
);
200 static inline u32
asc_txfifo_is_empty(struct uart_port
*port
)
202 return asc_in(port
, ASC_STA
) & ASC_STA_TE
;
205 static inline u32
asc_txfifo_is_half_empty(struct uart_port
*port
)
207 return asc_in(port
, ASC_STA
) & ASC_STA_THE
;
210 static inline const char *asc_port_name(struct uart_port
*port
)
212 return to_platform_device(port
->dev
)->name
;
215 /*----------------------------------------------------------------------*/
218 * This section contains code to support the use of the ASC as a
219 * generic serial port.
222 static inline unsigned asc_hw_txroom(struct uart_port
*port
)
224 u32 status
= asc_in(port
, ASC_STA
);
226 if (status
& ASC_STA_THE
)
227 return port
->fifosize
/ 2;
228 else if (!(status
& ASC_STA_TF
))
235 * Start transmitting chars.
236 * This is called from both interrupt and task level.
237 * Either way interrupts are disabled.
239 static void asc_transmit_chars(struct uart_port
*port
)
241 struct circ_buf
*xmit
= &port
->state
->xmit
;
245 txroom
= asc_hw_txroom(port
);
247 if ((txroom
!= 0) && port
->x_char
) {
250 asc_out(port
, ASC_TXBUF
, c
);
252 txroom
= asc_hw_txroom(port
);
255 if (uart_tx_stopped(port
)) {
257 * We should try and stop the hardware here, but I
258 * don't think the ASC has any way to do that.
260 asc_disable_tx_interrupts(port
);
264 if (uart_circ_empty(xmit
)) {
265 asc_disable_tx_interrupts(port
);
273 c
= xmit
->buf
[xmit
->tail
];
274 xmit
->tail
= (xmit
->tail
+ 1) & (UART_XMIT_SIZE
- 1);
275 asc_out(port
, ASC_TXBUF
, c
);
278 } while ((txroom
> 0) && (!uart_circ_empty(xmit
)));
280 if (uart_circ_chars_pending(xmit
) < WAKEUP_CHARS
)
281 uart_write_wakeup(port
);
283 if (uart_circ_empty(xmit
))
284 asc_disable_tx_interrupts(port
);
287 static void asc_receive_chars(struct uart_port
*port
)
289 struct tty_port
*tport
= &port
->state
->port
;
290 unsigned long status
, mode
;
293 bool ignore_pe
= false;
296 * Datasheet states: If the MODE field selects an 8-bit frame then
297 * this [parity error] bit is undefined. Software should ignore this
298 * bit when reading 8-bit frames.
300 mode
= asc_in(port
, ASC_CTL
) & ASC_CTL_MODE_MSK
;
301 if (mode
== ASC_CTL_MODE_8BIT
|| mode
== ASC_CTL_MODE_8BIT_PAR
)
304 if (irqd_is_wakeup_set(irq_get_irq_data(port
->irq
)))
305 pm_wakeup_event(tport
->tty
->dev
, 0);
307 while ((status
= asc_in(port
, ASC_STA
)) & ASC_STA_RBF
) {
308 c
= asc_in(port
, ASC_RXBUF
) | ASC_RXBUF_DUMMY_RX
;
312 if (status
& ASC_STA_OE
|| c
& ASC_RXBUF_FE
||
313 (c
& ASC_RXBUF_PE
&& !ignore_pe
)) {
315 if (c
& ASC_RXBUF_FE
) {
316 if (c
== (ASC_RXBUF_FE
| ASC_RXBUF_DUMMY_RX
)) {
318 if (uart_handle_break(port
))
320 c
|= ASC_RXBUF_DUMMY_BE
;
322 port
->icount
.frame
++;
324 } else if (c
& ASC_RXBUF_PE
) {
325 port
->icount
.parity
++;
328 * Reading any data from the RX FIFO clears the
329 * overflow error condition.
331 if (status
& ASC_STA_OE
) {
332 port
->icount
.overrun
++;
333 c
|= ASC_RXBUF_DUMMY_OE
;
336 c
&= port
->read_status_mask
;
338 if (c
& ASC_RXBUF_DUMMY_BE
)
340 else if (c
& ASC_RXBUF_PE
)
342 else if (c
& ASC_RXBUF_FE
)
346 if (uart_handle_sysrq_char(port
, c
& 0xff))
349 uart_insert_char(port
, c
, ASC_RXBUF_DUMMY_OE
, c
& 0xff, flag
);
352 /* Tell the rest of the system the news. New characters! */
353 tty_flip_buffer_push(tport
);
356 static irqreturn_t
asc_interrupt(int irq
, void *ptr
)
358 struct uart_port
*port
= ptr
;
361 spin_lock(&port
->lock
);
363 status
= asc_in(port
, ASC_STA
);
365 if (status
& ASC_STA_RBF
) {
366 /* Receive FIFO not empty */
367 asc_receive_chars(port
);
370 if ((status
& ASC_STA_THE
) &&
371 (asc_in(port
, ASC_INTEN
) & ASC_INTEN_THE
)) {
372 /* Transmitter FIFO at least half empty */
373 asc_transmit_chars(port
);
376 spin_unlock(&port
->lock
);
381 /*----------------------------------------------------------------------*/
387 static unsigned int asc_tx_empty(struct uart_port
*port
)
389 return asc_txfifo_is_empty(port
) ? TIOCSER_TEMT
: 0;
392 static void asc_set_mctrl(struct uart_port
*port
, unsigned int mctrl
)
394 struct asc_port
*ascport
= to_asc_port(port
);
397 * This routine is used for seting signals of: DTR, DCD, CTS and RTS.
398 * We use ASC's hardware for CTS/RTS when hardware flow-control is
399 * enabled, however if the RTS line is required for another purpose,
400 * commonly controlled using HUP from userspace, then we need to toggle
401 * it manually, using GPIO.
403 * Some boards also have DTR and DCD implemented using PIO pins, code to
404 * do this should be hooked in here.
410 /* If HW flow-control is enabled, we can't fiddle with the RTS line */
411 if (asc_in(port
, ASC_CTL
) & ASC_CTL_CTSENABLE
)
414 gpiod_set_value(ascport
->rts
, mctrl
& TIOCM_RTS
);
417 static unsigned int asc_get_mctrl(struct uart_port
*port
)
420 * This routine is used for geting signals of: DTR, DCD, DSR, RI,
423 return TIOCM_CAR
| TIOCM_DSR
| TIOCM_CTS
;
426 /* There are probably characters waiting to be transmitted. */
427 static void asc_start_tx(struct uart_port
*port
)
429 struct circ_buf
*xmit
= &port
->state
->xmit
;
431 if (!uart_circ_empty(xmit
))
432 asc_enable_tx_interrupts(port
);
436 static void asc_stop_tx(struct uart_port
*port
)
438 asc_disable_tx_interrupts(port
);
442 static void asc_stop_rx(struct uart_port
*port
)
444 asc_disable_rx_interrupts(port
);
447 /* Handle breaks - ignored by us */
448 static void asc_break_ctl(struct uart_port
*port
, int break_state
)
450 /* Nothing here yet .. */
454 * Enable port for reception.
456 static int asc_startup(struct uart_port
*port
)
458 if (request_irq(port
->irq
, asc_interrupt
, 0,
459 asc_port_name(port
), port
)) {
460 dev_err(port
->dev
, "cannot allocate irq.\n");
464 asc_transmit_chars(port
);
465 asc_enable_rx_interrupts(port
);
470 static void asc_shutdown(struct uart_port
*port
)
472 asc_disable_tx_interrupts(port
);
473 asc_disable_rx_interrupts(port
);
474 free_irq(port
->irq
, port
);
477 static void asc_pm(struct uart_port
*port
, unsigned int state
,
478 unsigned int oldstate
)
480 struct asc_port
*ascport
= to_asc_port(port
);
481 unsigned long flags
= 0;
485 case UART_PM_STATE_ON
:
486 clk_prepare_enable(ascport
->clk
);
488 case UART_PM_STATE_OFF
:
490 * Disable the ASC baud rate generator, which is as close as
491 * we can come to turning it off. Note this is not called with
492 * the port spinlock held.
494 spin_lock_irqsave(&port
->lock
, flags
);
495 ctl
= asc_in(port
, ASC_CTL
) & ~ASC_CTL_RUN
;
496 asc_out(port
, ASC_CTL
, ctl
);
497 spin_unlock_irqrestore(&port
->lock
, flags
);
498 clk_disable_unprepare(ascport
->clk
);
503 static void asc_set_termios(struct uart_port
*port
, struct ktermios
*termios
,
504 struct ktermios
*old
)
506 struct asc_port
*ascport
= to_asc_port(port
);
507 struct gpio_desc
*gpiod
;
513 /* Update termios to reflect hardware capabilities */
514 termios
->c_cflag
&= ~(CMSPAR
|
515 (ascport
->hw_flow_control
? 0 : CRTSCTS
));
517 port
->uartclk
= clk_get_rate(ascport
->clk
);
519 baud
= uart_get_baud_rate(port
, termios
, old
, 0, port
->uartclk
/16);
520 cflag
= termios
->c_cflag
;
522 spin_lock_irqsave(&port
->lock
, flags
);
524 /* read control register */
525 ctrl_val
= asc_in(port
, ASC_CTL
);
527 /* stop serial port and reset value */
528 asc_out(port
, ASC_CTL
, (ctrl_val
& ~ASC_CTL_RUN
));
529 ctrl_val
= ASC_CTL_RXENABLE
| ASC_CTL_FIFOENABLE
;
531 /* reset fifo rx & tx */
532 asc_out(port
, ASC_TXRESET
, 1);
533 asc_out(port
, ASC_RXRESET
, 1);
535 /* set character length */
536 if ((cflag
& CSIZE
) == CS7
) {
537 ctrl_val
|= ASC_CTL_MODE_7BIT_PAR
;
539 ctrl_val
|= (cflag
& PARENB
) ? ASC_CTL_MODE_8BIT_PAR
:
544 ctrl_val
|= (cflag
& CSTOPB
) ? ASC_CTL_STOP_2BIT
: ASC_CTL_STOP_1BIT
;
548 ctrl_val
|= ASC_CTL_PARITYODD
;
550 /* hardware flow control */
551 if ((cflag
& CRTSCTS
)) {
552 ctrl_val
|= ASC_CTL_CTSENABLE
;
554 /* If flow-control selected, stop handling RTS manually */
556 devm_gpiod_put(port
->dev
, ascport
->rts
);
559 pinctrl_select_state(ascport
->pinctrl
,
560 ascport
->states
[DEFAULT
]);
563 /* If flow-control disabled, it's safe to handle RTS manually */
564 if (!ascport
->rts
&& ascport
->states
[NO_HW_FLOWCTRL
]) {
565 pinctrl_select_state(ascport
->pinctrl
,
566 ascport
->states
[NO_HW_FLOWCTRL
]);
568 gpiod
= devm_gpiod_get(port
->dev
, "rts", GPIOD_OUT_LOW
);
569 if (!IS_ERR(gpiod
)) {
570 gpiod_set_consumer_name(gpiod
,
571 port
->dev
->of_node
->name
);
572 ascport
->rts
= gpiod
;
577 if ((baud
< 19200) && !ascport
->force_m1
) {
578 asc_out(port
, ASC_BAUDRATE
, (port
->uartclk
/ (16 * baud
)));
581 * MODE 1: recommended for high bit rates (above 19.2K)
583 * baudrate * 16 * 2^16
584 * ASCBaudRate = ------------------------
587 * To keep maths inside 64bits, we divide inputclock by 16.
589 u64 dividend
= (u64
)baud
* (1 << 16);
591 do_div(dividend
, port
->uartclk
/ 16);
592 asc_out(port
, ASC_BAUDRATE
, dividend
);
593 ctrl_val
|= ASC_CTL_BAUDMODE
;
596 uart_update_timeout(port
, cflag
, baud
);
598 ascport
->port
.read_status_mask
= ASC_RXBUF_DUMMY_OE
;
599 if (termios
->c_iflag
& INPCK
)
600 ascport
->port
.read_status_mask
|= ASC_RXBUF_FE
| ASC_RXBUF_PE
;
601 if (termios
->c_iflag
& (IGNBRK
| BRKINT
| PARMRK
))
602 ascport
->port
.read_status_mask
|= ASC_RXBUF_DUMMY_BE
;
605 * Characters to ignore
607 ascport
->port
.ignore_status_mask
= 0;
608 if (termios
->c_iflag
& IGNPAR
)
609 ascport
->port
.ignore_status_mask
|= ASC_RXBUF_FE
| ASC_RXBUF_PE
;
610 if (termios
->c_iflag
& IGNBRK
) {
611 ascport
->port
.ignore_status_mask
|= ASC_RXBUF_DUMMY_BE
;
613 * If we're ignoring parity and break indicators,
614 * ignore overruns too (for real raw support).
616 if (termios
->c_iflag
& IGNPAR
)
617 ascport
->port
.ignore_status_mask
|= ASC_RXBUF_DUMMY_OE
;
621 * Ignore all characters if CREAD is not set.
623 if (!(termios
->c_cflag
& CREAD
))
624 ascport
->port
.ignore_status_mask
|= ASC_RXBUF_DUMMY_RX
;
626 /* Set the timeout */
627 asc_out(port
, ASC_TIMEOUT
, 20);
629 /* write final value and enable port */
630 asc_out(port
, ASC_CTL
, (ctrl_val
| ASC_CTL_RUN
));
632 spin_unlock_irqrestore(&port
->lock
, flags
);
635 static const char *asc_type(struct uart_port
*port
)
637 return (port
->type
== PORT_ASC
) ? DRIVER_NAME
: NULL
;
640 static void asc_release_port(struct uart_port
*port
)
644 static int asc_request_port(struct uart_port
*port
)
650 * Called when the port is opened, and UPF_BOOT_AUTOCONF flag is set
651 * Set type field if successful
653 static void asc_config_port(struct uart_port
*port
, int flags
)
655 if ((flags
& UART_CONFIG_TYPE
))
656 port
->type
= PORT_ASC
;
660 asc_verify_port(struct uart_port
*port
, struct serial_struct
*ser
)
662 /* No user changeable parameters */
666 #ifdef CONFIG_CONSOLE_POLL
668 * Console polling routines for writing and reading from the uart while
669 * in an interrupt or debug context (i.e. kgdb).
672 static int asc_get_poll_char(struct uart_port
*port
)
674 if (!(asc_in(port
, ASC_STA
) & ASC_STA_RBF
))
677 return asc_in(port
, ASC_RXBUF
);
680 static void asc_put_poll_char(struct uart_port
*port
, unsigned char c
)
682 while (!asc_txfifo_is_half_empty(port
))
684 asc_out(port
, ASC_TXBUF
, c
);
687 #endif /* CONFIG_CONSOLE_POLL */
689 /*---------------------------------------------------------------------*/
691 static const struct uart_ops asc_uart_ops
= {
692 .tx_empty
= asc_tx_empty
,
693 .set_mctrl
= asc_set_mctrl
,
694 .get_mctrl
= asc_get_mctrl
,
695 .start_tx
= asc_start_tx
,
696 .stop_tx
= asc_stop_tx
,
697 .stop_rx
= asc_stop_rx
,
698 .break_ctl
= asc_break_ctl
,
699 .startup
= asc_startup
,
700 .shutdown
= asc_shutdown
,
701 .set_termios
= asc_set_termios
,
703 .release_port
= asc_release_port
,
704 .request_port
= asc_request_port
,
705 .config_port
= asc_config_port
,
706 .verify_port
= asc_verify_port
,
708 #ifdef CONFIG_CONSOLE_POLL
709 .poll_get_char
= asc_get_poll_char
,
710 .poll_put_char
= asc_put_poll_char
,
711 #endif /* CONFIG_CONSOLE_POLL */
714 static int asc_init_port(struct asc_port
*ascport
,
715 struct platform_device
*pdev
)
717 struct uart_port
*port
= &ascport
->port
;
718 struct resource
*res
;
721 port
->iotype
= UPIO_MEM
;
722 port
->flags
= UPF_BOOT_AUTOCONF
;
723 port
->ops
= &asc_uart_ops
;
724 port
->fifosize
= ASC_FIFO_SIZE
;
725 port
->dev
= &pdev
->dev
;
726 port
->irq
= platform_get_irq(pdev
, 0);
727 port
->has_sysrq
= IS_ENABLED(CONFIG_SERIAL_ST_ASC_CONSOLE
);
729 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
730 port
->membase
= devm_ioremap_resource(&pdev
->dev
, res
);
731 if (IS_ERR(port
->membase
))
732 return PTR_ERR(port
->membase
);
733 port
->mapbase
= res
->start
;
735 spin_lock_init(&port
->lock
);
737 ascport
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
739 if (WARN_ON(IS_ERR(ascport
->clk
)))
741 /* ensure that clk rate is correct by enabling the clk */
742 clk_prepare_enable(ascport
->clk
);
743 ascport
->port
.uartclk
= clk_get_rate(ascport
->clk
);
744 WARN_ON(ascport
->port
.uartclk
== 0);
745 clk_disable_unprepare(ascport
->clk
);
747 ascport
->pinctrl
= devm_pinctrl_get(&pdev
->dev
);
748 if (IS_ERR(ascport
->pinctrl
)) {
749 ret
= PTR_ERR(ascport
->pinctrl
);
750 dev_err(&pdev
->dev
, "Failed to get Pinctrl: %d\n", ret
);
754 ascport
->states
[DEFAULT
] =
755 pinctrl_lookup_state(ascport
->pinctrl
, "default");
756 if (IS_ERR(ascport
->states
[DEFAULT
])) {
757 ret
= PTR_ERR(ascport
->states
[DEFAULT
]);
759 "Failed to look up Pinctrl state 'default': %d\n", ret
);
763 /* "no-hw-flowctrl" state is optional */
764 ascport
->states
[NO_HW_FLOWCTRL
] =
765 pinctrl_lookup_state(ascport
->pinctrl
, "no-hw-flowctrl");
766 if (IS_ERR(ascport
->states
[NO_HW_FLOWCTRL
]))
767 ascport
->states
[NO_HW_FLOWCTRL
] = NULL
;
772 static struct asc_port
*asc_of_get_asc_port(struct platform_device
*pdev
)
774 struct device_node
*np
= pdev
->dev
.of_node
;
780 id
= of_alias_get_id(np
, "serial");
782 id
= of_alias_get_id(np
, ASC_SERIAL_NAME
);
787 if (WARN_ON(id
>= ASC_MAX_PORTS
))
790 asc_ports
[id
].hw_flow_control
= of_property_read_bool(np
,
792 asc_ports
[id
].force_m1
= of_property_read_bool(np
, "st,force_m1");
793 asc_ports
[id
].port
.line
= id
;
794 asc_ports
[id
].rts
= NULL
;
796 return &asc_ports
[id
];
800 static const struct of_device_id asc_match
[] = {
801 { .compatible
= "st,asc", },
805 MODULE_DEVICE_TABLE(of
, asc_match
);
808 static int asc_serial_probe(struct platform_device
*pdev
)
811 struct asc_port
*ascport
;
813 ascport
= asc_of_get_asc_port(pdev
);
817 ret
= asc_init_port(ascport
, pdev
);
821 ret
= uart_add_one_port(&asc_uart_driver
, &ascport
->port
);
825 platform_set_drvdata(pdev
, &ascport
->port
);
830 static int asc_serial_remove(struct platform_device
*pdev
)
832 struct uart_port
*port
= platform_get_drvdata(pdev
);
834 return uart_remove_one_port(&asc_uart_driver
, port
);
837 #ifdef CONFIG_PM_SLEEP
838 static int asc_serial_suspend(struct device
*dev
)
840 struct uart_port
*port
= dev_get_drvdata(dev
);
842 return uart_suspend_port(&asc_uart_driver
, port
);
845 static int asc_serial_resume(struct device
*dev
)
847 struct uart_port
*port
= dev_get_drvdata(dev
);
849 return uart_resume_port(&asc_uart_driver
, port
);
852 #endif /* CONFIG_PM_SLEEP */
854 /*----------------------------------------------------------------------*/
856 #ifdef CONFIG_SERIAL_ST_ASC_CONSOLE
857 static void asc_console_putchar(struct uart_port
*port
, int ch
)
859 unsigned int timeout
= 1000000;
861 /* Wait for upto 1 second in case flow control is stopping us. */
862 while (--timeout
&& !asc_txfifo_is_half_empty(port
))
865 asc_out(port
, ASC_TXBUF
, ch
);
869 * Print a string to the serial port trying not to disturb
870 * any possible real use of the port...
873 static void asc_console_write(struct console
*co
, const char *s
, unsigned count
)
875 struct uart_port
*port
= &asc_ports
[co
->index
].port
;
877 unsigned long timeout
= 1000000;
882 locked
= 0; /* asc_interrupt has already claimed the lock */
883 else if (oops_in_progress
)
884 locked
= spin_trylock_irqsave(&port
->lock
, flags
);
886 spin_lock_irqsave(&port
->lock
, flags
);
889 * Disable interrupts so we don't get the IRQ line bouncing
890 * up and down while interrupts are disabled.
892 intenable
= asc_in(port
, ASC_INTEN
);
893 asc_out(port
, ASC_INTEN
, 0);
894 (void)asc_in(port
, ASC_INTEN
); /* Defeat bus write posting */
896 uart_console_write(port
, s
, count
, asc_console_putchar
);
898 while (--timeout
&& !asc_txfifo_is_empty(port
))
901 asc_out(port
, ASC_INTEN
, intenable
);
904 spin_unlock_irqrestore(&port
->lock
, flags
);
907 static int asc_console_setup(struct console
*co
, char *options
)
909 struct asc_port
*ascport
;
915 if (co
->index
>= ASC_MAX_PORTS
)
918 ascport
= &asc_ports
[co
->index
];
921 * This driver does not support early console initialization
922 * (use ARM early printk support instead), so we only expect
923 * this to be called during the uart port registration when the
924 * driver gets probed and the port should be mapped at that point.
926 if (ascport
->port
.mapbase
== 0 || ascport
->port
.membase
== NULL
)
930 uart_parse_options(options
, &baud
, &parity
, &bits
, &flow
);
932 return uart_set_options(&ascport
->port
, co
, baud
, parity
, bits
, flow
);
935 static struct console asc_console
= {
936 .name
= ASC_SERIAL_NAME
,
937 .device
= uart_console_device
,
938 .write
= asc_console_write
,
939 .setup
= asc_console_setup
,
940 .flags
= CON_PRINTBUFFER
,
942 .data
= &asc_uart_driver
,
945 #define ASC_SERIAL_CONSOLE (&asc_console)
948 #define ASC_SERIAL_CONSOLE NULL
949 #endif /* CONFIG_SERIAL_ST_ASC_CONSOLE */
951 static struct uart_driver asc_uart_driver
= {
952 .owner
= THIS_MODULE
,
953 .driver_name
= DRIVER_NAME
,
954 .dev_name
= ASC_SERIAL_NAME
,
958 .cons
= ASC_SERIAL_CONSOLE
,
961 static const struct dev_pm_ops asc_serial_pm_ops
= {
962 SET_SYSTEM_SLEEP_PM_OPS(asc_serial_suspend
, asc_serial_resume
)
965 static struct platform_driver asc_serial_driver
= {
966 .probe
= asc_serial_probe
,
967 .remove
= asc_serial_remove
,
970 .pm
= &asc_serial_pm_ops
,
971 .of_match_table
= of_match_ptr(asc_match
),
975 static int __init
asc_init(void)
978 static const char banner
[] __initconst
=
979 KERN_INFO
"STMicroelectronics ASC driver initialized\n";
983 ret
= uart_register_driver(&asc_uart_driver
);
987 ret
= platform_driver_register(&asc_serial_driver
);
989 uart_unregister_driver(&asc_uart_driver
);
994 static void __exit
asc_exit(void)
996 platform_driver_unregister(&asc_serial_driver
);
997 uart_unregister_driver(&asc_uart_driver
);
1000 module_init(asc_init
);
1001 module_exit(asc_exit
);
1003 MODULE_ALIAS("platform:" DRIVER_NAME
);
1004 MODULE_AUTHOR("STMicroelectronics (R&D) Limited");
1005 MODULE_DESCRIPTION("STMicroelectronics ASC serial port driver");
1006 MODULE_LICENSE("GPL");