include/asm-h8300/system.h

   1 #ifndef _H8300_SYSTEM_H
   2 #define _H8300_SYSTEM_H
   3
   4 #include <linux/config.h> /* get configuration macros */
   5 #include <linux/linkage.h>
   6
   7 /*
   8  * switch_to(n) should switch tasks to task ptr, first checking that
   9  * ptr isn't the current task, in which case it does nothing.  This
  10  * also clears the TS-flag if the task we switched to has used the
  11  * math co-processor latest.
  12  */
  13 /*
  14  * switch_to() saves the extra registers, that are not saved
  15  * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
  16  * a0-a1. Some of these are used by schedule() and its predecessors
  17  * and so we might get see unexpected behaviors when a task returns
  18  * with unexpected register values.
  19  *
  20  * syscall stores these registers itself and none of them are used
  21  * by syscall after the function in the syscall has been called.
  22  *
  23  * Beware that resume now expects *next to be in d1 and the offset of
  24  * tss to be in a1. This saves a few instructions as we no longer have
  25  * to push them onto the stack and read them back right after.
  26  *
  27  * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
  28  *
  29  * Changed 96/09/19 by Andreas Schwab
  30  * pass prev in a0, next in a1, offset of tss in d1, and whether
  31  * the mm structures are shared in d2 (to avoid atc flushing).
  32  *
  33  * H8/300 Porting 2002/09/04 Yoshinori Sato
  34  */
  35
  36 asmlinkage void resume(void);
  37 #define switch_to(prev,next,last) {                         \
  38   void *_last;                                              \
  39   __asm__ __volatile__(                                     \
  40                         "mov.l  %1, er0\n\t"                \
  41                         "mov.l  %2, er1\n\t"                \
  42                         "mov.l  %3, er2\n\t"                \
  43                         "jsr @_resume\n\t"                  \
  44                         "mov.l  er2,%0\n\t"                 \
  45                        : "=r" (_last)                       \
  46                        : "r" (&(prev->thread)),             \
  47                          "r" (&(next->thread)),             \
  48                          "g" (prev)                         \
  49                        : "cc", "er0", "er1", "er2", "er3"); \
  50   (last) = _last;                                           \
  51 }
  52
  53 #define __sti() asm volatile ("andc #0x7f,ccr")
  54 #define __cli() asm volatile ("orc  #0x80,ccr")
  55
  56 #define __save_flags(x) \
  57        asm volatile ("stc ccr,%w0":"=r" (x))
  58
  59 #define __restore_flags(x) \
  60        asm volatile ("ldc %w0,ccr": :"r" (x))
  61
  62 #define irqs_disabled()                 \
  63 ({                                      \
  64         unsigned char flags;            \
  65         __save_flags(flags);            \
  66         ((flags & 0x80) == 0x80);       \
  67 })
  68
  69 #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
  70
  71 /* For spinlocks etc */
  72 #define local_irq_disable()     __cli()
  73 #define local_irq_enable()      __sti()
  74 #define local_irq_save(x)       ({ __save_flags(x); local_irq_disable(); })
  75 #define local_irq_restore(x)    __restore_flags(x)
  76 #define local_save_flags(x)     __save_flags(x)
  77
  78 /*
  79  * Force strict CPU ordering.
  80  * Not really required on H8...
  81  */
  82 #define nop()  asm volatile ("nop"::)
  83 #define mb()   asm volatile (""   : : :"memory")
  84 #define rmb()  asm volatile (""   : : :"memory")
  85 #define wmb()  asm volatile (""   : : :"memory")
  86 #define set_rmb(var, value)    do { xchg(&var, value); } while (0)
  87 #define set_mb(var, value)     set_rmb(var, value)
  88 #define set_wmb(var, value)    do { var = value; wmb(); } while (0)
  89
  90 #ifdef CONFIG_SMP
  91 #define smp_mb()        mb()
  92 #define smp_rmb()       rmb()
  93 #define smp_wmb()       wmb()
  94 #define smp_read_barrier_depends()      read_barrier_depends()
  95 #else
  96 #define smp_mb()        barrier()
  97 #define smp_rmb()       barrier()
  98 #define smp_wmb()       barrier()
  99 #define smp_read_barrier_depends()      do { } while(0)
 100 #endif
 101
 102 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
 103 #define tas(ptr) (xchg((ptr),1))
 104
 105 struct __xchg_dummy { unsigned long a[100]; };
 106 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
 107
 108 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
 109 {
 110   unsigned long tmp, flags;
 111
 112   local_irq_save(flags);
 113
 114   switch (size) {
 115   case 1:
 116     __asm__ __volatile__
 117     ("mov.b %2,%0\n\t"
 118      "mov.b %1,%2"
 119     : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
 120     break;
 121   case 2:
 122     __asm__ __volatile__
 123     ("mov.w %2,%0\n\t"
 124      "mov.w %1,%2"
 125     : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
 126     break;
 127   case 4:
 128     __asm__ __volatile__
 129     ("mov.l %2,%0\n\t"
 130      "mov.l %1,%2"
 131     : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
 132     break;
 133   default:
 134     tmp = 0;
 135   }
 136   local_irq_restore(flags);
 137   return tmp;
 138 }
 139
 140 #define HARD_RESET_NOW() ({             \
 141         local_irq_disable();            \
 142         asm("jmp @@0");                 \
 143 })
 144
 145 #define arch_align_stack(x) (x)
 146
 147 #endif /* _H8300_SYSTEM_H */