[PATCH] uml: add -ffreestanding to CFLAGS
[linux/fpc-iii.git] / include / asm-powerpc / bitops.h
blobd1c2a4405660dbecbcaa859c4abbc7b0fea2bba3
1 /*
2 * PowerPC atomic bit operations.
4 * Merged version by David Gibson <david@gibson.dropbear.id.au>.
5 * Based on ppc64 versions by: Dave Engebretsen, Todd Inglett, Don
6 * Reed, Pat McCarthy, Peter Bergner, Anton Blanchard. They
7 * originally took it from the ppc32 code.
9 * Within a word, bits are numbered LSB first. Lot's of places make
10 * this assumption by directly testing bits with (val & (1<<nr)).
11 * This can cause confusion for large (> 1 word) bitmaps on a
12 * big-endian system because, unlike little endian, the number of each
13 * bit depends on the word size.
15 * The bitop functions are defined to work on unsigned longs, so for a
16 * ppc64 system the bits end up numbered:
17 * |63..............0|127............64|191...........128|255...........196|
18 * and on ppc32:
19 * |31.....0|63....31|95....64|127...96|159..128|191..160|223..192|255..224|
21 * There are a few little-endian macros used mostly for filesystem
22 * bitmaps, these work on similar bit arrays layouts, but
23 * byte-oriented:
24 * |7...0|15...8|23...16|31...24|39...32|47...40|55...48|63...56|
26 * The main difference is that bit 3-5 (64b) or 3-4 (32b) in the bit
27 * number field needs to be reversed compared to the big-endian bit
28 * fields. This can be achieved by XOR with 0x38 (64b) or 0x18 (32b).
30 * This program is free software; you can redistribute it and/or
31 * modify it under the terms of the GNU General Public License
32 * as published by the Free Software Foundation; either version
33 * 2 of the License, or (at your option) any later version.
36 #ifndef _ASM_POWERPC_BITOPS_H
37 #define _ASM_POWERPC_BITOPS_H
39 #ifdef __KERNEL__
41 #include <linux/compiler.h>
42 #include <asm/atomic.h>
43 #include <asm/asm-compat.h>
44 #include <asm/synch.h>
47 * clear_bit doesn't imply a memory barrier
49 #define smp_mb__before_clear_bit() smp_mb()
50 #define smp_mb__after_clear_bit() smp_mb()
52 #define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
53 #define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
54 #define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
56 static __inline__ void set_bit(int nr, volatile unsigned long *addr)
58 unsigned long old;
59 unsigned long mask = BITOP_MASK(nr);
60 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
62 __asm__ __volatile__(
63 "1:" PPC_LLARX "%0,0,%3 # set_bit\n"
64 "or %0,%0,%2\n"
65 PPC405_ERR77(0,%3)
66 PPC_STLCX "%0,0,%3\n"
67 "bne- 1b"
68 : "=&r"(old), "=m"(*p)
69 : "r"(mask), "r"(p), "m"(*p)
70 : "cc" );
73 static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
75 unsigned long old;
76 unsigned long mask = BITOP_MASK(nr);
77 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
79 __asm__ __volatile__(
80 "1:" PPC_LLARX "%0,0,%3 # clear_bit\n"
81 "andc %0,%0,%2\n"
82 PPC405_ERR77(0,%3)
83 PPC_STLCX "%0,0,%3\n"
84 "bne- 1b"
85 : "=&r"(old), "=m"(*p)
86 : "r"(mask), "r"(p), "m"(*p)
87 : "cc" );
90 static __inline__ void change_bit(int nr, volatile unsigned long *addr)
92 unsigned long old;
93 unsigned long mask = BITOP_MASK(nr);
94 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
96 __asm__ __volatile__(
97 "1:" PPC_LLARX "%0,0,%3 # change_bit\n"
98 "xor %0,%0,%2\n"
99 PPC405_ERR77(0,%3)
100 PPC_STLCX "%0,0,%3\n"
101 "bne- 1b"
102 : "=&r"(old), "=m"(*p)
103 : "r"(mask), "r"(p), "m"(*p)
104 : "cc" );
107 static __inline__ int test_and_set_bit(unsigned long nr,
108 volatile unsigned long *addr)
110 unsigned long old, t;
111 unsigned long mask = BITOP_MASK(nr);
112 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
114 __asm__ __volatile__(
115 LWSYNC_ON_SMP
116 "1:" PPC_LLARX "%0,0,%3 # test_and_set_bit\n"
117 "or %1,%0,%2 \n"
118 PPC405_ERR77(0,%3)
119 PPC_STLCX "%1,0,%3 \n"
120 "bne- 1b"
121 ISYNC_ON_SMP
122 : "=&r" (old), "=&r" (t)
123 : "r" (mask), "r" (p)
124 : "cc", "memory");
126 return (old & mask) != 0;
129 static __inline__ int test_and_clear_bit(unsigned long nr,
130 volatile unsigned long *addr)
132 unsigned long old, t;
133 unsigned long mask = BITOP_MASK(nr);
134 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
136 __asm__ __volatile__(
137 LWSYNC_ON_SMP
138 "1:" PPC_LLARX "%0,0,%3 # test_and_clear_bit\n"
139 "andc %1,%0,%2 \n"
140 PPC405_ERR77(0,%3)
141 PPC_STLCX "%1,0,%3 \n"
142 "bne- 1b"
143 ISYNC_ON_SMP
144 : "=&r" (old), "=&r" (t)
145 : "r" (mask), "r" (p)
146 : "cc", "memory");
148 return (old & mask) != 0;
151 static __inline__ int test_and_change_bit(unsigned long nr,
152 volatile unsigned long *addr)
154 unsigned long old, t;
155 unsigned long mask = BITOP_MASK(nr);
156 unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
158 __asm__ __volatile__(
159 LWSYNC_ON_SMP
160 "1:" PPC_LLARX "%0,0,%3 # test_and_change_bit\n"
161 "xor %1,%0,%2 \n"
162 PPC405_ERR77(0,%3)
163 PPC_STLCX "%1,0,%3 \n"
164 "bne- 1b"
165 ISYNC_ON_SMP
166 : "=&r" (old), "=&r" (t)
167 : "r" (mask), "r" (p)
168 : "cc", "memory");
170 return (old & mask) != 0;
173 static __inline__ void set_bits(unsigned long mask, unsigned long *addr)
175 unsigned long old;
177 __asm__ __volatile__(
178 "1:" PPC_LLARX "%0,0,%3 # set_bits\n"
179 "or %0,%0,%2\n"
180 PPC_STLCX "%0,0,%3\n"
181 "bne- 1b"
182 : "=&r" (old), "=m" (*addr)
183 : "r" (mask), "r" (addr), "m" (*addr)
184 : "cc");
187 #include <asm-generic/bitops/non-atomic.h>
190 * Return the zero-based bit position (LE, not IBM bit numbering) of
191 * the most significant 1-bit in a double word.
193 static __inline__ int __ilog2(unsigned long x)
195 int lz;
197 asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x));
198 return BITS_PER_LONG - 1 - lz;
202 * Determines the bit position of the least significant 0 bit in the
203 * specified double word. The returned bit position will be
204 * zero-based, starting from the right side (63/31 - 0).
206 static __inline__ unsigned long ffz(unsigned long x)
208 /* no zero exists anywhere in the 8 byte area. */
209 if ((x = ~x) == 0)
210 return BITS_PER_LONG;
213 * Calculate the bit position of the least signficant '1' bit in x
214 * (since x has been changed this will actually be the least signficant
215 * '0' bit in * the original x). Note: (x & -x) gives us a mask that
216 * is the least significant * (RIGHT-most) 1-bit of the value in x.
218 return __ilog2(x & -x);
221 static __inline__ int __ffs(unsigned long x)
223 return __ilog2(x & -x);
227 * ffs: find first bit set. This is defined the same way as
228 * the libc and compiler builtin ffs routines, therefore
229 * differs in spirit from the above ffz (man ffs).
231 static __inline__ int ffs(int x)
233 unsigned long i = (unsigned long)x;
234 return __ilog2(i & -i) + 1;
238 * fls: find last (most-significant) bit set.
239 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
241 static __inline__ int fls(unsigned int x)
243 int lz;
245 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
246 return 32 - lz;
248 #include <asm-generic/bitops/fls64.h>
250 #include <asm-generic/bitops/hweight.h>
252 #define find_first_zero_bit(addr, size) find_next_zero_bit((addr), (size), 0)
253 unsigned long find_next_zero_bit(const unsigned long *addr,
254 unsigned long size, unsigned long offset);
256 * find_first_bit - find the first set bit in a memory region
257 * @addr: The address to start the search at
258 * @size: The maximum size to search
260 * Returns the bit-number of the first set bit, not the number of the byte
261 * containing a bit.
263 #define find_first_bit(addr, size) find_next_bit((addr), (size), 0)
264 unsigned long find_next_bit(const unsigned long *addr,
265 unsigned long size, unsigned long offset);
267 /* Little-endian versions */
269 static __inline__ int test_le_bit(unsigned long nr,
270 __const__ unsigned long *addr)
272 __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
273 return (tmp[nr >> 3] >> (nr & 7)) & 1;
276 #define __set_le_bit(nr, addr) \
277 __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
278 #define __clear_le_bit(nr, addr) \
279 __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
281 #define test_and_set_le_bit(nr, addr) \
282 test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
283 #define test_and_clear_le_bit(nr, addr) \
284 test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
286 #define __test_and_set_le_bit(nr, addr) \
287 __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
288 #define __test_and_clear_le_bit(nr, addr) \
289 __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
291 #define find_first_zero_le_bit(addr, size) find_next_zero_le_bit((addr), (size), 0)
292 unsigned long find_next_zero_le_bit(const unsigned long *addr,
293 unsigned long size, unsigned long offset);
295 /* Bitmap functions for the ext2 filesystem */
297 #define ext2_set_bit(nr,addr) \
298 __test_and_set_le_bit((nr), (unsigned long*)addr)
299 #define ext2_clear_bit(nr, addr) \
300 __test_and_clear_le_bit((nr), (unsigned long*)addr)
302 #define ext2_set_bit_atomic(lock, nr, addr) \
303 test_and_set_le_bit((nr), (unsigned long*)addr)
304 #define ext2_clear_bit_atomic(lock, nr, addr) \
305 test_and_clear_le_bit((nr), (unsigned long*)addr)
307 #define ext2_test_bit(nr, addr) test_le_bit((nr),(unsigned long*)addr)
309 #define ext2_find_first_zero_bit(addr, size) \
310 find_first_zero_le_bit((unsigned long*)addr, size)
311 #define ext2_find_next_zero_bit(addr, size, off) \
312 find_next_zero_le_bit((unsigned long*)addr, size, off)
314 /* Bitmap functions for the minix filesystem. */
316 #define minix_test_and_set_bit(nr,addr) \
317 __test_and_set_le_bit(nr, (unsigned long *)addr)
318 #define minix_set_bit(nr,addr) \
319 __set_le_bit(nr, (unsigned long *)addr)
320 #define minix_test_and_clear_bit(nr,addr) \
321 __test_and_clear_le_bit(nr, (unsigned long *)addr)
322 #define minix_test_bit(nr,addr) \
323 test_le_bit(nr, (unsigned long *)addr)
325 #define minix_find_first_zero_bit(addr,size) \
326 find_first_zero_le_bit((unsigned long *)addr, size)
328 #include <asm-generic/bitops/sched.h>
330 #endif /* __KERNEL__ */
332 #endif /* _ASM_POWERPC_BITOPS_H */