2 * i.MX IPUv3 DP Overlay Planes
4 * Copyright (C) 2013 Philipp Zabel, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #include <drm/drm_atomic.h>
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_fb_cma_helper.h>
20 #include <drm/drm_gem_cma_helper.h>
21 #include <drm/drm_plane_helper.h>
23 #include "video/imx-ipu-v3.h"
24 #include "ipuv3-plane.h"
26 static inline struct ipu_plane
*to_ipu_plane(struct drm_plane
*p
)
28 return container_of(p
, struct ipu_plane
, base
);
31 static const uint32_t ipu_plane_formats
[] = {
56 int ipu_plane_irq(struct ipu_plane
*ipu_plane
)
58 return ipu_idmac_channel_irq(ipu_plane
->ipu
, ipu_plane
->ipu_ch
,
62 static inline unsigned long
63 drm_plane_state_to_eba(struct drm_plane_state
*state
)
65 struct drm_framebuffer
*fb
= state
->fb
;
66 struct drm_gem_cma_object
*cma_obj
;
68 cma_obj
= drm_fb_cma_get_gem_obj(fb
, 0);
71 return cma_obj
->paddr
+ fb
->offsets
[0] +
72 fb
->pitches
[0] * (state
->src_y
>> 16) +
73 (fb
->bits_per_pixel
>> 3) * (state
->src_x
>> 16);
76 static inline unsigned long
77 drm_plane_state_to_ubo(struct drm_plane_state
*state
)
79 struct drm_framebuffer
*fb
= state
->fb
;
80 struct drm_gem_cma_object
*cma_obj
;
81 unsigned long eba
= drm_plane_state_to_eba(state
);
83 cma_obj
= drm_fb_cma_get_gem_obj(fb
, 1);
86 return cma_obj
->paddr
+ fb
->offsets
[1] +
87 fb
->pitches
[1] * (state
->src_y
>> 16) / 2 +
88 (state
->src_x
>> 16) / 2 - eba
;
91 static inline unsigned long
92 drm_plane_state_to_vbo(struct drm_plane_state
*state
)
94 struct drm_framebuffer
*fb
= state
->fb
;
95 struct drm_gem_cma_object
*cma_obj
;
96 unsigned long eba
= drm_plane_state_to_eba(state
);
98 cma_obj
= drm_fb_cma_get_gem_obj(fb
, 2);
101 return cma_obj
->paddr
+ fb
->offsets
[2] +
102 fb
->pitches
[2] * (state
->src_y
>> 16) / 2 +
103 (state
->src_x
>> 16) / 2 - eba
;
106 static void ipu_plane_atomic_set_base(struct ipu_plane
*ipu_plane
,
107 struct drm_plane_state
*old_state
)
109 struct drm_plane
*plane
= &ipu_plane
->base
;
110 struct drm_plane_state
*state
= plane
->state
;
111 struct drm_framebuffer
*fb
= state
->fb
;
112 unsigned long eba
, ubo
, vbo
;
115 eba
= drm_plane_state_to_eba(state
);
117 switch (fb
->pixel_format
) {
118 case DRM_FORMAT_YUV420
:
119 case DRM_FORMAT_YVU420
:
124 * Multiplanar formats have to meet the following restrictions:
125 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
126 * - EBA, UBO and VBO are a multiple of 8
127 * - UBO and VBO are unsigned and not larger than 0xfffff8
128 * - Only EBA may be changed while scanout is active
129 * - The strides of U and V planes must be identical.
131 ubo
= drm_plane_state_to_ubo(state
);
132 vbo
= drm_plane_state_to_vbo(state
);
134 if (fb
->pixel_format
== DRM_FORMAT_YUV420
)
135 ipu_cpmem_set_yuv_planar_full(ipu_plane
->ipu_ch
,
136 fb
->pitches
[1], ubo
, vbo
);
138 ipu_cpmem_set_yuv_planar_full(ipu_plane
->ipu_ch
,
139 fb
->pitches
[1], vbo
, ubo
);
141 dev_dbg(ipu_plane
->base
.dev
->dev
,
142 "phy = %lu %lu %lu, x = %d, y = %d", eba
, ubo
, vbo
,
143 state
->src_x
>> 16, state
->src_y
>> 16);
146 dev_dbg(ipu_plane
->base
.dev
->dev
, "phys = %lu, x = %d, y = %d",
147 eba
, state
->src_x
>> 16, state
->src_y
>> 16);
153 active
= ipu_idmac_get_current_buffer(ipu_plane
->ipu_ch
);
154 ipu_cpmem_set_buffer(ipu_plane
->ipu_ch
, !active
, eba
);
155 ipu_idmac_select_buffer(ipu_plane
->ipu_ch
, !active
);
157 ipu_cpmem_set_buffer(ipu_plane
->ipu_ch
, 0, eba
);
158 ipu_cpmem_set_buffer(ipu_plane
->ipu_ch
, 1, eba
);
162 void ipu_plane_put_resources(struct ipu_plane
*ipu_plane
)
164 if (!IS_ERR_OR_NULL(ipu_plane
->dp
))
165 ipu_dp_put(ipu_plane
->dp
);
166 if (!IS_ERR_OR_NULL(ipu_plane
->dmfc
))
167 ipu_dmfc_put(ipu_plane
->dmfc
);
168 if (!IS_ERR_OR_NULL(ipu_plane
->ipu_ch
))
169 ipu_idmac_put(ipu_plane
->ipu_ch
);
172 int ipu_plane_get_resources(struct ipu_plane
*ipu_plane
)
176 ipu_plane
->ipu_ch
= ipu_idmac_get(ipu_plane
->ipu
, ipu_plane
->dma
);
177 if (IS_ERR(ipu_plane
->ipu_ch
)) {
178 ret
= PTR_ERR(ipu_plane
->ipu_ch
);
179 DRM_ERROR("failed to get idmac channel: %d\n", ret
);
183 ipu_plane
->dmfc
= ipu_dmfc_get(ipu_plane
->ipu
, ipu_plane
->dma
);
184 if (IS_ERR(ipu_plane
->dmfc
)) {
185 ret
= PTR_ERR(ipu_plane
->dmfc
);
186 DRM_ERROR("failed to get dmfc: ret %d\n", ret
);
190 if (ipu_plane
->dp_flow
>= 0) {
191 ipu_plane
->dp
= ipu_dp_get(ipu_plane
->ipu
, ipu_plane
->dp_flow
);
192 if (IS_ERR(ipu_plane
->dp
)) {
193 ret
= PTR_ERR(ipu_plane
->dp
);
194 DRM_ERROR("failed to get dp flow: %d\n", ret
);
201 ipu_plane_put_resources(ipu_plane
);
206 static void ipu_plane_enable(struct ipu_plane
*ipu_plane
)
209 ipu_dp_enable(ipu_plane
->ipu
);
210 ipu_dmfc_enable_channel(ipu_plane
->dmfc
);
211 ipu_idmac_enable_channel(ipu_plane
->ipu_ch
);
213 ipu_dp_enable_channel(ipu_plane
->dp
);
216 static void ipu_plane_disable(struct ipu_plane
*ipu_plane
)
218 ipu_idmac_wait_busy(ipu_plane
->ipu_ch
, 50);
221 ipu_dp_disable_channel(ipu_plane
->dp
);
222 ipu_idmac_disable_channel(ipu_plane
->ipu_ch
);
223 ipu_dmfc_disable_channel(ipu_plane
->dmfc
);
225 ipu_dp_disable(ipu_plane
->ipu
);
228 static int ipu_disable_plane(struct drm_plane
*plane
)
230 struct ipu_plane
*ipu_plane
= to_ipu_plane(plane
);
232 DRM_DEBUG_KMS("[%d] %s\n", __LINE__
, __func__
);
234 ipu_plane_disable(ipu_plane
);
239 static void ipu_plane_destroy(struct drm_plane
*plane
)
241 struct ipu_plane
*ipu_plane
= to_ipu_plane(plane
);
243 DRM_DEBUG_KMS("[%d] %s\n", __LINE__
, __func__
);
245 ipu_disable_plane(plane
);
246 drm_plane_cleanup(plane
);
250 static const struct drm_plane_funcs ipu_plane_funcs
= {
251 .update_plane
= drm_atomic_helper_update_plane
,
252 .disable_plane
= drm_atomic_helper_disable_plane
,
253 .destroy
= ipu_plane_destroy
,
254 .reset
= drm_atomic_helper_plane_reset
,
255 .atomic_duplicate_state
= drm_atomic_helper_plane_duplicate_state
,
256 .atomic_destroy_state
= drm_atomic_helper_plane_destroy_state
,
259 static int ipu_plane_atomic_check(struct drm_plane
*plane
,
260 struct drm_plane_state
*state
)
262 struct drm_plane_state
*old_state
= plane
->state
;
263 struct drm_crtc_state
*crtc_state
;
264 struct device
*dev
= plane
->dev
->dev
;
265 struct drm_framebuffer
*fb
= state
->fb
;
266 struct drm_framebuffer
*old_fb
= old_state
->fb
;
267 unsigned long eba
, ubo
, vbo
, old_ubo
, old_vbo
;
277 drm_atomic_get_existing_crtc_state(state
->state
, state
->crtc
);
278 if (WARN_ON(!crtc_state
))
281 /* CRTC should be enabled */
282 if (!crtc_state
->enable
)
286 if (state
->src_w
>> 16 != state
->crtc_w
||
287 state
->src_h
>> 16 != state
->crtc_h
)
290 switch (plane
->type
) {
291 case DRM_PLANE_TYPE_PRIMARY
:
292 /* full plane doesn't support partial off screen */
293 if (state
->crtc_x
|| state
->crtc_y
||
294 state
->crtc_w
!= crtc_state
->adjusted_mode
.hdisplay
||
295 state
->crtc_h
!= crtc_state
->adjusted_mode
.vdisplay
)
298 /* full plane minimum width is 13 pixels */
299 if (state
->crtc_w
< 13)
302 case DRM_PLANE_TYPE_OVERLAY
:
303 if (state
->crtc_x
< 0 || state
->crtc_y
< 0)
306 if (state
->crtc_x
+ state
->crtc_w
>
307 crtc_state
->adjusted_mode
.hdisplay
)
309 if (state
->crtc_y
+ state
->crtc_h
>
310 crtc_state
->adjusted_mode
.vdisplay
)
314 dev_warn(dev
, "Unsupported plane type\n");
318 if (state
->crtc_h
< 2)
322 * We support resizing active plane or changing its format by
323 * forcing CRTC mode change and disabling-enabling plane in plane's
324 * ->atomic_update callback.
326 if (old_fb
&& (state
->src_w
!= old_state
->src_w
||
327 state
->src_h
!= old_state
->src_h
||
328 fb
->pixel_format
!= old_fb
->pixel_format
))
329 crtc_state
->mode_changed
= true;
331 eba
= drm_plane_state_to_eba(state
);
336 if (fb
->pitches
[0] < 1 || fb
->pitches
[0] > 16384)
339 if (old_fb
&& fb
->pitches
[0] != old_fb
->pitches
[0])
340 crtc_state
->mode_changed
= true;
342 switch (fb
->pixel_format
) {
343 case DRM_FORMAT_YUV420
:
344 case DRM_FORMAT_YVU420
:
346 * Multiplanar formats have to meet the following restrictions:
347 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
348 * - EBA, UBO and VBO are a multiple of 8
349 * - UBO and VBO are unsigned and not larger than 0xfffff8
350 * - Only EBA may be changed while scanout is active
351 * - The strides of U and V planes must be identical.
353 ubo
= drm_plane_state_to_ubo(state
);
354 vbo
= drm_plane_state_to_vbo(state
);
356 if ((ubo
& 0x7) || (vbo
& 0x7))
359 if ((ubo
> 0xfffff8) || (vbo
> 0xfffff8))
363 old_ubo
= drm_plane_state_to_ubo(old_state
);
364 old_vbo
= drm_plane_state_to_vbo(old_state
);
365 if (ubo
!= old_ubo
|| vbo
!= old_vbo
)
369 if (fb
->pitches
[1] != fb
->pitches
[2])
372 if (fb
->pitches
[1] < 1 || fb
->pitches
[1] > 16384)
375 if (old_fb
&& old_fb
->pitches
[1] != fb
->pitches
[1])
376 crtc_state
->mode_changed
= true;
382 static void ipu_plane_atomic_disable(struct drm_plane
*plane
,
383 struct drm_plane_state
*old_state
)
385 ipu_disable_plane(plane
);
388 static void ipu_plane_atomic_update(struct drm_plane
*plane
,
389 struct drm_plane_state
*old_state
)
391 struct ipu_plane
*ipu_plane
= to_ipu_plane(plane
);
392 struct drm_plane_state
*state
= plane
->state
;
393 enum ipu_color_space ics
;
396 struct drm_crtc_state
*crtc_state
= state
->crtc
->state
;
398 if (!crtc_state
->mode_changed
) {
399 ipu_plane_atomic_set_base(ipu_plane
, old_state
);
403 ipu_disable_plane(plane
);
406 switch (ipu_plane
->dp_flow
) {
407 case IPU_DP_FLOW_SYNC_BG
:
408 ipu_dp_setup_channel(ipu_plane
->dp
,
409 IPUV3_COLORSPACE_RGB
,
410 IPUV3_COLORSPACE_RGB
);
411 ipu_dp_set_global_alpha(ipu_plane
->dp
, true, 0, true);
413 case IPU_DP_FLOW_SYNC_FG
:
414 ics
= ipu_drm_fourcc_to_colorspace(state
->fb
->pixel_format
);
415 ipu_dp_setup_channel(ipu_plane
->dp
, ics
,
416 IPUV3_COLORSPACE_UNKNOWN
);
417 ipu_dp_set_window_pos(ipu_plane
->dp
, state
->crtc_x
,
419 /* Enable local alpha on partial plane */
420 switch (state
->fb
->pixel_format
) {
421 case DRM_FORMAT_ARGB1555
:
422 case DRM_FORMAT_ABGR1555
:
423 case DRM_FORMAT_RGBA5551
:
424 case DRM_FORMAT_BGRA5551
:
425 case DRM_FORMAT_ARGB4444
:
426 case DRM_FORMAT_ARGB8888
:
427 case DRM_FORMAT_ABGR8888
:
428 case DRM_FORMAT_RGBA8888
:
429 case DRM_FORMAT_BGRA8888
:
430 ipu_dp_set_global_alpha(ipu_plane
->dp
, false, 0, false);
437 ipu_dmfc_config_wait4eot(ipu_plane
->dmfc
, state
->crtc_w
);
439 ipu_cpmem_zero(ipu_plane
->ipu_ch
);
440 ipu_cpmem_set_resolution(ipu_plane
->ipu_ch
, state
->src_w
>> 16,
442 ipu_cpmem_set_fmt(ipu_plane
->ipu_ch
, state
->fb
->pixel_format
);
443 ipu_cpmem_set_high_priority(ipu_plane
->ipu_ch
);
444 ipu_idmac_set_double_buffer(ipu_plane
->ipu_ch
, 1);
445 ipu_cpmem_set_stride(ipu_plane
->ipu_ch
, state
->fb
->pitches
[0]);
446 ipu_plane_atomic_set_base(ipu_plane
, old_state
);
447 ipu_plane_enable(ipu_plane
);
450 static const struct drm_plane_helper_funcs ipu_plane_helper_funcs
= {
451 .atomic_check
= ipu_plane_atomic_check
,
452 .atomic_disable
= ipu_plane_atomic_disable
,
453 .atomic_update
= ipu_plane_atomic_update
,
456 struct ipu_plane
*ipu_plane_init(struct drm_device
*dev
, struct ipu_soc
*ipu
,
457 int dma
, int dp
, unsigned int possible_crtcs
,
458 enum drm_plane_type type
)
460 struct ipu_plane
*ipu_plane
;
463 DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
464 dma
, dp
, possible_crtcs
);
466 ipu_plane
= kzalloc(sizeof(*ipu_plane
), GFP_KERNEL
);
468 DRM_ERROR("failed to allocate plane\n");
469 return ERR_PTR(-ENOMEM
);
472 ipu_plane
->ipu
= ipu
;
473 ipu_plane
->dma
= dma
;
474 ipu_plane
->dp_flow
= dp
;
476 ret
= drm_universal_plane_init(dev
, &ipu_plane
->base
, possible_crtcs
,
477 &ipu_plane_funcs
, ipu_plane_formats
,
478 ARRAY_SIZE(ipu_plane_formats
), type
,
481 DRM_ERROR("failed to initialize plane\n");
486 drm_plane_helper_add(&ipu_plane
->base
, &ipu_plane_helper_funcs
);