mmc: host: sh_mobile_sdhi: don't populate unneeded functions
[linux/fpc-iii.git] / drivers / mmc / host / sh_mobile_sdhi.c
blobd679c8a533b6e5a13851d013f6e44764271e1d51
1 /*
2 * SuperH Mobile SDHI
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
6 * Copyright (C) 2009 Magnus Damm
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Based on "Compaq ASIC3 support":
14 * Copyright 2001 Compaq Computer Corporation.
15 * Copyright 2004-2005 Phil Blundell
16 * Copyright 2007-2008 OpenedHand Ltd.
18 * Authors: Phil Blundell <pb@handhelds.org>,
19 * Samuel Ortiz <sameo@openedhand.com>
23 #include <linux/kernel.h>
24 #include <linux/clk.h>
25 #include <linux/slab.h>
26 #include <linux/mod_devicetable.h>
27 #include <linux/module.h>
28 #include <linux/of_device.h>
29 #include <linux/platform_device.h>
30 #include <linux/mmc/host.h>
31 #include <linux/mfd/tmio.h>
32 #include <linux/sh_dma.h>
33 #include <linux/delay.h>
34 #include <linux/pinctrl/consumer.h>
35 #include <linux/pinctrl/pinctrl-state.h>
36 #include <linux/regulator/consumer.h>
38 #include "tmio_mmc.h"
40 #define EXT_ACC 0xe4
42 #define SDHI_VER_GEN2_SDR50 0x490c
43 /* very old datasheets said 0x490c for SDR104, too. They are wrong! */
44 #define SDHI_VER_GEN2_SDR104 0xcb0d
45 #define SDHI_VER_GEN3_SD 0xcc10
46 #define SDHI_VER_GEN3_SDMMC 0xcd10
48 #define host_to_priv(host) container_of((host)->pdata, struct sh_mobile_sdhi, mmc_data)
50 struct sh_mobile_sdhi_of_data {
51 unsigned long tmio_flags;
52 unsigned long capabilities;
53 unsigned long capabilities2;
54 enum dma_slave_buswidth dma_buswidth;
55 dma_addr_t dma_rx_offset;
56 unsigned bus_shift;
59 static const struct sh_mobile_sdhi_of_data of_default_cfg = {
60 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
63 static const struct sh_mobile_sdhi_of_data of_rcar_gen1_compatible = {
64 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
65 TMIO_MMC_CLK_ACTUAL,
66 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
69 static const struct sh_mobile_sdhi_of_data of_rcar_gen2_compatible = {
70 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
71 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
72 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
73 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
74 .dma_rx_offset = 0x2000,
77 static const struct sh_mobile_sdhi_of_data of_rcar_gen3_compatible = {
78 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
79 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
80 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
81 .bus_shift = 2,
84 static const struct of_device_id sh_mobile_sdhi_of_match[] = {
85 { .compatible = "renesas,sdhi-shmobile" },
86 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
87 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
88 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
89 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
90 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
91 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
92 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
93 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
94 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
95 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
96 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
97 {},
99 MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
101 struct sh_mobile_sdhi {
102 struct clk *clk;
103 struct tmio_mmc_data mmc_data;
104 struct tmio_mmc_dma dma_priv;
105 struct pinctrl *pinctrl;
106 struct pinctrl_state *pins_default, *pins_uhs;
109 static void sh_mobile_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width)
111 u32 val;
114 * see also
115 * sh_mobile_sdhi_of_data :: dma_buswidth
117 switch (sd_ctrl_read16(host, CTL_VERSION)) {
118 case SDHI_VER_GEN2_SDR50:
119 val = (width == 32) ? 0x0001 : 0x0000;
120 break;
121 case SDHI_VER_GEN2_SDR104:
122 val = (width == 32) ? 0x0000 : 0x0001;
123 break;
124 case SDHI_VER_GEN3_SD:
125 case SDHI_VER_GEN3_SDMMC:
126 if (width == 64)
127 val = 0x0000;
128 else if (width == 32)
129 val = 0x0101;
130 else
131 val = 0x0001;
132 break;
133 default:
134 /* nothing to do */
135 return;
138 sd_ctrl_write16(host, EXT_ACC, val);
141 static int sh_mobile_sdhi_clk_enable(struct tmio_mmc_host *host)
143 struct mmc_host *mmc = host->mmc;
144 struct sh_mobile_sdhi *priv = host_to_priv(host);
145 int ret = clk_prepare_enable(priv->clk);
146 if (ret < 0)
147 return ret;
150 * The clock driver may not know what maximum frequency
151 * actually works, so it should be set with the max-frequency
152 * property which will already have been read to f_max. If it
153 * was missing, assume the current frequency is the maximum.
155 if (!mmc->f_max)
156 mmc->f_max = clk_get_rate(priv->clk);
159 * Minimum frequency is the minimum input clock frequency
160 * divided by our maximum divider.
162 mmc->f_min = max(clk_round_rate(priv->clk, 1) / 512, 1L);
164 /* enable 16bit data access on SDBUF as default */
165 sh_mobile_sdhi_sdbuf_width(host, 16);
167 return 0;
170 static unsigned int sh_mobile_sdhi_clk_update(struct tmio_mmc_host *host,
171 unsigned int new_clock)
173 struct sh_mobile_sdhi *priv = host_to_priv(host);
174 unsigned int freq, diff, best_freq = 0, diff_min = ~0;
175 int i, ret;
177 /* tested only on RCar Gen2+ currently; may work for others */
178 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
179 return clk_get_rate(priv->clk);
182 * We want the bus clock to be as close as possible to, but no
183 * greater than, new_clock. As we can divide by 1 << i for
184 * any i in [0, 9] we want the input clock to be as close as
185 * possible, but no greater than, new_clock << i.
187 for (i = min(9, ilog2(UINT_MAX / new_clock)); i >= 0; i--) {
188 freq = clk_round_rate(priv->clk, new_clock << i);
189 if (freq > (new_clock << i)) {
190 /* Too fast; look for a slightly slower option */
191 freq = clk_round_rate(priv->clk,
192 (new_clock << i) / 4 * 3);
193 if (freq > (new_clock << i))
194 continue;
197 diff = new_clock - (freq >> i);
198 if (diff <= diff_min) {
199 best_freq = freq;
200 diff_min = diff;
204 ret = clk_set_rate(priv->clk, best_freq);
206 return ret == 0 ? best_freq : clk_get_rate(priv->clk);
209 static void sh_mobile_sdhi_clk_disable(struct tmio_mmc_host *host)
211 struct sh_mobile_sdhi *priv = host_to_priv(host);
213 clk_disable_unprepare(priv->clk);
216 static int sh_mobile_sdhi_card_busy(struct mmc_host *mmc)
218 struct tmio_mmc_host *host = mmc_priv(mmc);
220 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_DAT0);
223 static int sh_mobile_sdhi_start_signal_voltage_switch(struct mmc_host *mmc,
224 struct mmc_ios *ios)
226 struct tmio_mmc_host *host = mmc_priv(mmc);
227 struct sh_mobile_sdhi *priv = host_to_priv(host);
228 struct pinctrl_state *pin_state;
229 int ret;
231 switch (ios->signal_voltage) {
232 case MMC_SIGNAL_VOLTAGE_330:
233 pin_state = priv->pins_default;
234 break;
235 case MMC_SIGNAL_VOLTAGE_180:
236 pin_state = priv->pins_uhs;
237 break;
238 default:
239 return -EINVAL;
243 * If anything is missing, assume signal voltage is fixed at
244 * 3.3V and succeed/fail accordingly.
246 if (IS_ERR(priv->pinctrl) || IS_ERR(pin_state))
247 return ios->signal_voltage ==
248 MMC_SIGNAL_VOLTAGE_330 ? 0 : -EINVAL;
250 ret = mmc_regulator_set_vqmmc(host->mmc, ios);
251 if (ret)
252 return ret;
254 return pinctrl_select_state(priv->pinctrl, pin_state);
257 static int sh_mobile_sdhi_wait_idle(struct tmio_mmc_host *host)
259 int timeout = 1000;
261 while (--timeout && !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS)
262 & TMIO_STAT_SCLKDIVEN))
263 udelay(1);
265 if (!timeout) {
266 dev_warn(&host->pdev->dev, "timeout waiting for SD bus idle\n");
267 return -EBUSY;
270 return 0;
273 static int sh_mobile_sdhi_write16_hook(struct tmio_mmc_host *host, int addr)
275 switch (addr)
277 case CTL_SD_CMD:
278 case CTL_STOP_INTERNAL_ACTION:
279 case CTL_XFER_BLK_COUNT:
280 case CTL_SD_CARD_CLK_CTL:
281 case CTL_SD_XFER_LEN:
282 case CTL_SD_MEM_CARD_OPT:
283 case CTL_TRANSACTION_CTL:
284 case CTL_DMA_ENABLE:
285 case EXT_ACC:
286 return sh_mobile_sdhi_wait_idle(host);
289 return 0;
292 static int sh_mobile_sdhi_multi_io_quirk(struct mmc_card *card,
293 unsigned int direction, int blk_size)
296 * In Renesas controllers, when performing a
297 * multiple block read of one or two blocks,
298 * depending on the timing with which the
299 * response register is read, the response
300 * value may not be read properly.
301 * Use single block read for this HW bug
303 if ((direction == MMC_DATA_READ) &&
304 blk_size == 2)
305 return 1;
307 return blk_size;
310 static void sh_mobile_sdhi_enable_dma(struct tmio_mmc_host *host, bool enable)
312 sd_ctrl_write16(host, CTL_DMA_ENABLE, enable ? 2 : 0);
314 /* enable 32bit access if DMA mode if possibile */
315 sh_mobile_sdhi_sdbuf_width(host, enable ? 32 : 16);
318 static int sh_mobile_sdhi_probe(struct platform_device *pdev)
320 const struct of_device_id *of_id =
321 of_match_device(sh_mobile_sdhi_of_match, &pdev->dev);
322 struct sh_mobile_sdhi *priv;
323 struct tmio_mmc_data *mmc_data;
324 struct tmio_mmc_data *mmd = pdev->dev.platform_data;
325 struct tmio_mmc_host *host;
326 struct resource *res;
327 int irq, ret, i = 0;
328 struct tmio_mmc_dma *dma_priv;
330 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
331 if (!res)
332 return -EINVAL;
334 priv = devm_kzalloc(&pdev->dev, sizeof(struct sh_mobile_sdhi), GFP_KERNEL);
335 if (!priv)
336 return -ENOMEM;
338 mmc_data = &priv->mmc_data;
339 dma_priv = &priv->dma_priv;
341 priv->clk = devm_clk_get(&pdev->dev, NULL);
342 if (IS_ERR(priv->clk)) {
343 ret = PTR_ERR(priv->clk);
344 dev_err(&pdev->dev, "cannot get clock: %d\n", ret);
345 goto eprobe;
348 priv->pinctrl = devm_pinctrl_get(&pdev->dev);
349 if (!IS_ERR(priv->pinctrl)) {
350 priv->pins_default = pinctrl_lookup_state(priv->pinctrl,
351 PINCTRL_STATE_DEFAULT);
352 priv->pins_uhs = pinctrl_lookup_state(priv->pinctrl,
353 "state_uhs");
356 host = tmio_mmc_host_alloc(pdev);
357 if (!host) {
358 ret = -ENOMEM;
359 goto eprobe;
362 if (of_id && of_id->data) {
363 const struct sh_mobile_sdhi_of_data *of_data = of_id->data;
365 mmc_data->flags |= of_data->tmio_flags;
366 mmc_data->capabilities |= of_data->capabilities;
367 mmc_data->capabilities2 |= of_data->capabilities2;
368 mmc_data->dma_rx_offset = of_data->dma_rx_offset;
369 dma_priv->dma_buswidth = of_data->dma_buswidth;
370 host->bus_shift = of_data->bus_shift;
373 host->dma = dma_priv;
374 host->write16_hook = sh_mobile_sdhi_write16_hook;
375 host->clk_enable = sh_mobile_sdhi_clk_enable;
376 host->clk_update = sh_mobile_sdhi_clk_update;
377 host->clk_disable = sh_mobile_sdhi_clk_disable;
378 host->multi_io_quirk = sh_mobile_sdhi_multi_io_quirk;
380 /* SDR speeds are only available on Gen2+ */
381 if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) {
382 /* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */
383 host->card_busy = sh_mobile_sdhi_card_busy;
384 host->start_signal_voltage_switch =
385 sh_mobile_sdhi_start_signal_voltage_switch;
388 /* Orginally registers were 16 bit apart, could be 32 or 64 nowadays */
389 if (!host->bus_shift && resource_size(res) > 0x100) /* old way to determine the shift */
390 host->bus_shift = 1;
392 if (mmd)
393 *mmc_data = *mmd;
395 dma_priv->filter = shdma_chan_filter;
396 dma_priv->enable = sh_mobile_sdhi_enable_dma;
398 mmc_data->alignment_shift = 1; /* 2-byte alignment */
399 mmc_data->capabilities |= MMC_CAP_MMC_HIGHSPEED;
402 * All SDHI blocks support 2-byte and larger block sizes in 4-bit
403 * bus width mode.
405 mmc_data->flags |= TMIO_MMC_BLKSZ_2BYTES;
408 * All SDHI blocks support SDIO IRQ signalling.
410 mmc_data->flags |= TMIO_MMC_SDIO_IRQ;
413 * All SDHI have CMD12 controll bit
415 mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
418 * All SDHI need SDIO_INFO1 reserved bit
420 mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
422 ret = tmio_mmc_host_probe(host, mmc_data);
423 if (ret < 0)
424 goto efree;
426 while (1) {
427 irq = platform_get_irq(pdev, i);
428 if (irq < 0)
429 break;
430 i++;
431 ret = devm_request_irq(&pdev->dev, irq, tmio_mmc_irq, 0,
432 dev_name(&pdev->dev), host);
433 if (ret)
434 goto eirq;
437 /* There must be at least one IRQ source */
438 if (!i) {
439 ret = irq;
440 goto eirq;
443 dev_info(&pdev->dev, "%s base at 0x%08lx max clock rate %u MHz\n",
444 mmc_hostname(host->mmc), (unsigned long)
445 (platform_get_resource(pdev, IORESOURCE_MEM, 0)->start),
446 host->mmc->f_max / 1000000);
448 return ret;
450 eirq:
451 tmio_mmc_host_remove(host);
452 efree:
453 tmio_mmc_host_free(host);
454 eprobe:
455 return ret;
458 static int sh_mobile_sdhi_remove(struct platform_device *pdev)
460 struct mmc_host *mmc = platform_get_drvdata(pdev);
461 struct tmio_mmc_host *host = mmc_priv(mmc);
463 tmio_mmc_host_remove(host);
465 return 0;
468 static const struct dev_pm_ops tmio_mmc_dev_pm_ops = {
469 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
470 pm_runtime_force_resume)
471 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
472 tmio_mmc_host_runtime_resume,
473 NULL)
476 static struct platform_driver sh_mobile_sdhi_driver = {
477 .driver = {
478 .name = "sh_mobile_sdhi",
479 .pm = &tmio_mmc_dev_pm_ops,
480 .of_match_table = sh_mobile_sdhi_of_match,
482 .probe = sh_mobile_sdhi_probe,
483 .remove = sh_mobile_sdhi_remove,
486 module_platform_driver(sh_mobile_sdhi_driver);
488 MODULE_DESCRIPTION("SuperH Mobile SDHI driver");
489 MODULE_AUTHOR("Magnus Damm");
490 MODULE_LICENSE("GPL v2");
491 MODULE_ALIAS("platform:sh_mobile_sdhi");