include/asm-sh/io.h

   1 #ifndef __ASM_SH_IO_H
   2 #define __ASM_SH_IO_H
   3
   4 /*
   5  * Convention:
   6  *    read{b,w,l}/write{b,w,l} are for PCI,
   7  *    while in{b,w,l}/out{b,w,l} are for ISA
   8  * These may (will) be platform specific function.
   9  * In addition we have 'pausing' versions: in{b,w,l}_p/out{b,w,l}_p
  10  * and 'string' versions: ins{b,w,l}/outs{b,w,l}
  11  * For read{b,w,l} and write{b,w,l} there are also __raw versions, which
  12  * do not have a memory barrier after them.
  13  *
  14  * In addition, we have
  15  *   ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
  16  *   which are processor specific.
  17  */
  18
  19 /*
  20  * We follow the Alpha convention here:
  21  *  __inb expands to an inline function call (which calls via the mv)
  22  *  _inb  is a real function call (note ___raw fns are _ version of __raw)
  23  *  inb   by default expands to _inb, but the machine specific code may
  24  *        define it to __inb if it chooses.
  25  */
  26
  27 #include <asm/cache.h>
  28 #include <asm/system.h>
  29 #include <asm/addrspace.h>
  30 #include <asm/machvec.h>
  31 #include <linux/config.h>
  32
  33 /*
  34  * Depending on which platform we are running on, we need different
  35  * I/O functions.
  36  */
  37
  38 #ifdef __KERNEL__
  39 /*
  40  * Since boards are able to define their own set of I/O routines through
  41  * their respective machine vector, we always wrap through the mv.
  42  *
  43  * Also, in the event that a board hasn't provided its own definition for
  44  * a given routine, it will be wrapped to generic code at run-time.
  45  */
  46
  47 # define __inb(p)       sh_mv.mv_inb((p))
  48 # define __inw(p)       sh_mv.mv_inw((p))
  49 # define __inl(p)       sh_mv.mv_inl((p))
  50 # define __outb(x,p)    sh_mv.mv_outb((x),(p))
  51 # define __outw(x,p)    sh_mv.mv_outw((x),(p))
  52 # define __outl(x,p)    sh_mv.mv_outl((x),(p))
  53
  54 # define __inb_p(p)     sh_mv.mv_inb_p((p))
  55 # define __inw_p(p)     sh_mv.mv_inw_p((p))
  56 # define __inl_p(p)     sh_mv.mv_inl_p((p))
  57 # define __outb_p(x,p)  sh_mv.mv_outb_p((x),(p))
  58 # define __outw_p(x,p)  sh_mv.mv_outw_p((x),(p))
  59 # define __outl_p(x,p)  sh_mv.mv_outl_p((x),(p))
  60
  61 # define __insb(p,b,c)  sh_mv.mv_insb((p), (b), (c))
  62 # define __insw(p,b,c)  sh_mv.mv_insw((p), (b), (c))
  63 # define __insl(p,b,c)  sh_mv.mv_insl((p), (b), (c))
  64 # define __outsb(p,b,c) sh_mv.mv_outsb((p), (b), (c))
  65 # define __outsw(p,b,c) sh_mv.mv_outsw((p), (b), (c))
  66 # define __outsl(p,b,c) sh_mv.mv_outsl((p), (b), (c))
  67
  68 # define __readb(a)     sh_mv.mv_readb((a))
  69 # define __readw(a)     sh_mv.mv_readw((a))
  70 # define __readl(a)     sh_mv.mv_readl((a))
  71 # define __writeb(v,a)  sh_mv.mv_writeb((v),(a))
  72 # define __writew(v,a)  sh_mv.mv_writew((v),(a))
  73 # define __writel(v,a)  sh_mv.mv_writel((v),(a))
  74
  75 # define __ioremap(a,s) sh_mv.mv_ioremap((a), (s))
  76 # define __iounmap(a)   sh_mv.mv_iounmap((a))
  77
  78 # define __isa_port2addr(a)     sh_mv.mv_isa_port2addr(a)
  79
  80 # define inb            __inb
  81 # define inw            __inw
  82 # define inl            __inl
  83 # define outb           __outb
  84 # define outw           __outw
  85 # define outl           __outl
  86
  87 # define inb_p          __inb_p
  88 # define inw_p          __inw_p
  89 # define inl_p          __inl_p
  90 # define outb_p         __outb_p
  91 # define outw_p         __outw_p
  92 # define outl_p         __outl_p
  93
  94 # define insb           __insb
  95 # define insw           __insw
  96 # define insl           __insl
  97 # define outsb          __outsb
  98 # define outsw          __outsw
  99 # define outsl          __outsl
 100
 101 # define __raw_readb    __readb
 102 # define __raw_readw    __readw
 103 # define __raw_readl    __readl
 104 # define __raw_writeb   __writeb
 105 # define __raw_writew   __writew
 106 # define __raw_writel   __writel
 107
 108 /*
 109  * The platform header files may define some of these macros to use
 110  * the inlined versions where appropriate.  These macros may also be
 111  * redefined by userlevel programs.
 112  */
 113 #ifdef __raw_readb
 114 # define readb(a)       ({ unsigned long r_ = __raw_readb((unsigned long)a); mb(); r_; })
 115 #endif
 116 #ifdef __raw_readw
 117 # define readw(a)       ({ unsigned long r_ = __raw_readw((unsigned long)a); mb(); r_; })
 118 #endif
 119 #ifdef __raw_readl
 120 # define readl(a)       ({ unsigned long r_ = __raw_readl((unsigned long)a); mb(); r_; })
 121 #endif
 122
 123 #ifdef __raw_writeb
 124 # define writeb(v,a)    ({ __raw_writeb((v),(unsigned long)(a)); mb(); })
 125 #endif
 126 #ifdef __raw_writew
 127 # define writew(v,a)    ({ __raw_writew((v),(unsigned long)(a)); mb(); })
 128 #endif
 129 #ifdef __raw_writel
 130 # define writel(v,a)    ({ __raw_writel((v),(unsigned long)(a)); mb(); })
 131 #endif
 132
 133 #define readb_relaxed(a) readb(a)
 134 #define readw_relaxed(a) readw(a)
 135 #define readl_relaxed(a) readl(a)
 136
 137 #define mmiowb()
 138
 139 /*
 140  * If the platform has PC-like I/O, this function converts the offset into
 141  * an address.
 142  */
 143 static __inline__ unsigned long isa_port2addr(unsigned long offset)
 144 {
 145         return __isa_port2addr(offset);
 146 }
 147
 148 /*
 149  * This function provides a method for the generic case where a board-specific
 150  * isa_port2addr simply needs to return the port + some arbitrary port base.
 151  *
 152  * We use this at board setup time to implicitly set the port base, and
 153  * as a result, we can use the generic isa_port2addr.
 154  */
 155 static inline void __set_io_port_base(unsigned long pbase)
 156 {
 157         extern unsigned long generic_io_base;
 158
 159         generic_io_base = pbase;
 160 }
 161
 162 #define isa_readb(a) readb(isa_port2addr(a))
 163 #define isa_readw(a) readw(isa_port2addr(a))
 164 #define isa_readl(a) readl(isa_port2addr(a))
 165 #define isa_writeb(b,a) writeb(b,isa_port2addr(a))
 166 #define isa_writew(w,a) writew(w,isa_port2addr(a))
 167 #define isa_writel(l,a) writel(l,isa_port2addr(a))
 168 #define isa_memset_io(a,b,c) \
 169   memset((void *)(isa_port2addr((unsigned long)a)),(b),(c))
 170 #define isa_memcpy_fromio(a,b,c) \
 171   memcpy((a),(void *)(isa_port2addr((unsigned long)(b))),(c))
 172 #define isa_memcpy_toio(a,b,c) \
 173   memcpy((void *)(isa_port2addr((unsigned long)(a))),(b),(c))
 174
 175 /* We really want to try and get these to memcpy etc */
 176 extern void memcpy_fromio(void *, unsigned long, unsigned long);
 177 extern void memcpy_toio(unsigned long, const void *, unsigned long);
 178 extern void memset_io(unsigned long, int, unsigned long);
 179
 180 /* SuperH on-chip I/O functions */
 181 static __inline__ unsigned char ctrl_inb(unsigned long addr)
 182 {
 183         return *(volatile unsigned char*)addr;
 184 }
 185
 186 static __inline__ unsigned short ctrl_inw(unsigned long addr)
 187 {
 188         return *(volatile unsigned short*)addr;
 189 }
 190
 191 static __inline__ unsigned int ctrl_inl(unsigned long addr)
 192 {
 193         return *(volatile unsigned long*)addr;
 194 }
 195
 196 static __inline__ void ctrl_outb(unsigned char b, unsigned long addr)
 197 {
 198         *(volatile unsigned char*)addr = b;
 199 }
 200
 201 static __inline__ void ctrl_outw(unsigned short b, unsigned long addr)
 202 {
 203         *(volatile unsigned short*)addr = b;
 204 }
 205
 206 static __inline__ void ctrl_outl(unsigned int b, unsigned long addr)
 207 {
 208         *(volatile unsigned long*)addr = b;
 209 }
 210
 211 #define IO_SPACE_LIMIT 0xffffffff
 212
 213 /*
 214  * Change virtual addresses to physical addresses and vv.
 215  * These are trivial on the 1:1 Linux/SuperH mapping
 216  */
 217 static __inline__ unsigned long virt_to_phys(volatile void * address)
 218 {
 219         return PHYSADDR(address);
 220 }
 221
 222 static __inline__ void * phys_to_virt(unsigned long address)
 223 {
 224         return (void *)P1SEGADDR(address);
 225 }
 226
 227 #define virt_to_bus virt_to_phys
 228 #define bus_to_virt phys_to_virt
 229 #define page_to_bus page_to_phys
 230
 231 /*
 232  * readX/writeX() are used to access memory mapped devices. On some
 233  * architectures the memory mapped IO stuff needs to be accessed
 234  * differently. On the x86 architecture, we just read/write the
 235  * memory location directly.
 236  *
 237  * On SH, we have the whole physical address space mapped at all times
 238  * (as MIPS does), so "ioremap()" and "iounmap()" do not need to do
 239  * anything.  (This isn't true for all machines but we still handle
 240  * these cases with wired TLB entries anyway ...)
 241  *
 242  * We cheat a bit and always return uncachable areas until we've fixed
 243  * the drivers to handle caching properly.
 244  */
 245 static __inline__ void * ioremap(unsigned long offset, unsigned long size)
 246 {
 247         return __ioremap(offset, size);
 248 }
 249
 250 static __inline__ void iounmap(void *addr)
 251 {
 252         return __iounmap(addr);
 253 }
 254
 255 #define ioremap_nocache(off,size) ioremap(off,size)
 256
 257 static __inline__ int check_signature(unsigned long io_addr,
 258                         const unsigned char *signature, int length)
 259 {
 260         int retval = 0;
 261         do {
 262                 if (readb(io_addr) != *signature)
 263                         goto out;
 264                 io_addr++;
 265                 signature++;
 266                 length--;
 267         } while (length);
 268         retval = 1;
 269 out:
 270         return retval;
 271 }
 272
 273 /*
 274  * The caches on some architectures aren't dma-coherent and have need to
 275  * handle this in software.  There are three types of operations that
 276  * can be applied to dma buffers.
 277  *
 278  *  - dma_cache_wback_inv(start, size) makes caches and RAM coherent by
 279  *    writing the content of the caches back to memory, if necessary.
 280  *    The function also invalidates the affected part of the caches as
 281  *    necessary before DMA transfers from outside to memory.
 282  *  - dma_cache_inv(start, size) invalidates the affected parts of the
 283  *    caches.  Dirty lines of the caches may be written back or simply
 284  *    be discarded.  This operation is necessary before dma operations
 285  *    to the memory.
 286  *  - dma_cache_wback(start, size) writes back any dirty lines but does
 287  *    not invalidate the cache.  This can be used before DMA reads from
 288  *    memory,
 289  */
 290
 291 #define dma_cache_wback_inv(_start,_size) \
 292     __flush_purge_region(_start,_size)
 293 #define dma_cache_inv(_start,_size) \
 294     __flush_invalidate_region(_start,_size)
 295 #define dma_cache_wback(_start,_size) \
 296     __flush_wback_region(_start,_size)
 297
 298 /*
 299  * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 300  * access
 301  */
 302 #define xlate_dev_mem_ptr(p)    __va(p)
 303
 304 /*
 305  * Convert a virtual cached pointer to an uncached pointer
 306  */
 307 #define xlate_dev_kmem_ptr(p)   p
 308
 309 #endif /* __KERNEL__ */
 310
 311 #endif /* __ASM_SH_IO_H */