lib/Target/AMDGPU/CMakeLists.txt

   1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
   2
   3 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
   4 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
   5 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
   6 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
   7 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
   8 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
   9 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
  10 tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
  11 tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
  12 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
  13 tablegen(LLVM AMDGPUGenSearchableTables.inc -gen-searchable-tables)
  14 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
  15
  16 set(LLVM_TARGET_DEFINITIONS AMDGPUGISel.td)
  17 tablegen(LLVM AMDGPUGenGlobalISel.inc -gen-global-isel)
  18
  19 set(LLVM_TARGET_DEFINITIONS R600.td)
  20 tablegen(LLVM R600GenAsmWriter.inc -gen-asm-writer)
  21 tablegen(LLVM R600GenCallingConv.inc -gen-callingconv)
  22 tablegen(LLVM R600GenDAGISel.inc -gen-dag-isel)
  23 tablegen(LLVM R600GenDFAPacketizer.inc -gen-dfa-packetizer)
  24 tablegen(LLVM R600GenInstrInfo.inc -gen-instr-info)
  25 tablegen(LLVM R600GenMCCodeEmitter.inc -gen-emitter)
  26 tablegen(LLVM R600GenRegisterInfo.inc -gen-register-info)
  27 tablegen(LLVM R600GenSubtargetInfo.inc -gen-subtarget)
  28
  29 add_public_tablegen_target(AMDGPUCommonTableGen)
  30
  31 add_llvm_target(AMDGPUCodeGen
  32   AMDGPUAliasAnalysis.cpp
  33   AMDGPUAlwaysInlinePass.cpp
  34   AMDGPUAnnotateKernelFeatures.cpp
  35   AMDGPUAnnotateUniformValues.cpp
  36   AMDGPUArgumentUsageInfo.cpp
  37   AMDGPUAsmPrinter.cpp
  38   AMDGPUAtomicOptimizer.cpp
  39   AMDGPUCallLowering.cpp
  40   AMDGPUCodeGenPrepare.cpp
  41   AMDGPUFixFunctionBitcasts.cpp
  42   AMDGPUFrameLowering.cpp
  43   AMDGPUHSAMetadataStreamer.cpp
  44   AMDGPUInstrInfo.cpp
  45   AMDGPUInstructionSelector.cpp
  46   AMDGPUISelDAGToDAG.cpp
  47   AMDGPUISelLowering.cpp
  48   AMDGPULegalizerInfo.cpp
  49   AMDGPULibCalls.cpp
  50   AMDGPULibFunc.cpp
  51   AMDGPULowerIntrinsics.cpp
  52   AMDGPULowerKernelArguments.cpp
  53   AMDGPULowerKernelAttributes.cpp
  54   AMDGPUMachineCFGStructurizer.cpp
  55   AMDGPUMachineFunction.cpp
  56   AMDGPUMachineModuleInfo.cpp
  57   AMDGPUMacroFusion.cpp
  58   AMDGPUMCInstLower.cpp
  59   AMDGPUOpenCLEnqueuedBlockLowering.cpp
  60   AMDGPUPromoteAlloca.cpp
  61   AMDGPUPropagateAttributes.cpp
  62   AMDGPURegisterBankInfo.cpp
  63   AMDGPURegisterInfo.cpp
  64   AMDGPURewriteOutArguments.cpp
  65   AMDGPUSubtarget.cpp
  66   AMDGPUTargetMachine.cpp
  67   AMDGPUTargetObjectFile.cpp
  68   AMDGPUTargetTransformInfo.cpp
  69   AMDGPUUnifyDivergentExitNodes.cpp
  70   AMDGPUUnifyMetadata.cpp
  71   AMDGPUInline.cpp
  72   AMDGPUPerfHintAnalysis.cpp
  73   AMDILCFGStructurizer.cpp
  74   GCNHazardRecognizer.cpp
  75   GCNIterativeScheduler.cpp
  76   GCNMinRegStrategy.cpp
  77   GCNRegPressure.cpp
  78   GCNSchedStrategy.cpp
  79   R600AsmPrinter.cpp
  80   R600ClauseMergePass.cpp
  81   R600ControlFlowFinalizer.cpp
  82   R600EmitClauseMarkers.cpp
  83   R600ExpandSpecialInstrs.cpp
  84   R600FrameLowering.cpp
  85   R600InstrInfo.cpp
  86   R600ISelLowering.cpp
  87   R600MachineFunctionInfo.cpp
  88   R600MachineScheduler.cpp
  89   R600OpenCLImageTypeLoweringPass.cpp
  90   R600OptimizeVectorRegisters.cpp
  91   R600Packetizer.cpp
  92   R600RegisterInfo.cpp
  93   SIAddIMGInit.cpp
  94   SIAnnotateControlFlow.cpp
  95   SIFixSGPRCopies.cpp
  96   SIFixupVectorISel.cpp
  97   SIFixVGPRCopies.cpp
  98   SIPreAllocateWWMRegs.cpp
  99   SIFoldOperands.cpp
 100   SIFormMemoryClauses.cpp
 101   SIFrameLowering.cpp
 102   SIInsertSkips.cpp
 103   SIInsertWaitcnts.cpp
 104   SIInstrInfo.cpp
 105   SIISelLowering.cpp
 106   SILoadStoreOptimizer.cpp
 107   SILowerControlFlow.cpp
 108   SILowerI1Copies.cpp
 109   SILowerSGPRSpills.cpp
 110   SIMachineFunctionInfo.cpp
 111   SIMachineScheduler.cpp
 112   SIMemoryLegalizer.cpp
 113   SIOptimizeExecMasking.cpp
 114   SIOptimizeExecMaskingPreRA.cpp
 115   SIPeepholeSDWA.cpp
 116   SIRegisterInfo.cpp
 117   SIShrinkInstructions.cpp
 118   SIWholeQuadMode.cpp
 119   GCNILPSched.cpp
 120   GCNRegBankReassign.cpp
 121   GCNNSAReassign.cpp
 122   GCNDPPCombine.cpp
 123   SIModeRegister.cpp
 124   )
 125
 126 add_subdirectory(AsmParser)
 127 add_subdirectory(Disassembler)
 128 add_subdirectory(MCTargetDesc)
 129 add_subdirectory(TargetInfo)
 130 add_subdirectory(Utils)