unittests/tools/llvm-exegesis/X86/AssemblerTest.cpp

   1 //===-- AssemblerTest.cpp ---------------------------------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #include "../Common/AssemblerUtils.h"
  10 #include "X86InstrInfo.h"
  11
  12 namespace llvm {
  13 namespace exegesis {
  14
  15 void InitializeX86ExegesisTarget();
  16
  17 namespace {
  18
  19 using X86::EAX;
  20 using X86::MOV32ri;
  21 using X86::MOV64ri32;
  22 using X86::RAX;
  23 using X86::XOR32rr;
  24
  25 class X86MachineFunctionGeneratorTest
  26     : public MachineFunctionGeneratorBaseTest {
  27 protected:
  28   X86MachineFunctionGeneratorTest()
  29       : MachineFunctionGeneratorBaseTest("x86_64-unknown-linux", "haswell") {}
  30
  31   static void SetUpTestCase() {
  32     LLVMInitializeX86TargetInfo();
  33     LLVMInitializeX86TargetMC();
  34     LLVMInitializeX86Target();
  35     LLVMInitializeX86AsmPrinter();
  36     InitializeX86ExegesisTarget();
  37   }
  38 };
  39
  40 TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunction) {
  41   Check({}, MCInst(), 0xc3);
  42 }
  43
  44 TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionXOR32rr_X86) {
  45   Check({{EAX, APInt(32, 1)}},
  46         MCInstBuilder(XOR32rr).addReg(EAX).addReg(EAX).addReg(EAX),
  47         // mov eax, 1
  48         0xb8, 0x01, 0x00, 0x00, 0x00,
  49         // xor eax, eax
  50         0x31, 0xc0, 0xc3);
  51 }
  52
  53 TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionMOV64ri) {
  54   Check({}, MCInstBuilder(MOV64ri32).addReg(RAX).addImm(42), 0x48, 0xc7, 0xc0,
  55         0x2a, 0x00, 0x00, 0x00, 0xc3);
  56 }
  57
  58 TEST_F(X86MachineFunctionGeneratorTest, DISABLED_JitFunctionMOV32ri) {
  59   Check({}, MCInstBuilder(MOV32ri).addReg(EAX).addImm(42), 0xb8, 0x2a, 0x00,
  60         0x00, 0x00, 0xc3);
  61 }
  62
  63 } // namespace
  64 } // namespace exegesis
  65 } // namespace llvm