[llvm-objcopy] - Reimplement strip-dwo-groups.test to stop using the precompiled...
[llvm-complete.git] / lib / MC / MCRegisterInfo.cpp
blob4273b876b7bb0cbfe60f95102807ad71e56f1ec0
1 //===- MC/MCRegisterInfo.cpp - Target Register Description ----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements MCRegisterInfo functions.
11 //===----------------------------------------------------------------------===//
13 #include "llvm/MC/MCRegisterInfo.h"
14 #include "llvm/ADT/DenseMap.h"
15 #include "llvm/ADT/Twine.h"
16 #include "llvm/Support/ErrorHandling.h"
17 #include <algorithm>
18 #include <cassert>
19 #include <cstdint>
21 using namespace llvm;
23 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
24 const MCRegisterClass *RC) const {
25 for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers)
26 if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx))
27 return *Supers;
28 return 0;
31 unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
32 assert(Idx && Idx < getNumSubRegIndices() &&
33 "This is not a subregister index");
34 // Get a pointer to the corresponding SubRegIndices list. This list has the
35 // name of each sub-register in the same order as MCSubRegIterator.
36 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
37 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
38 if (*SRI == Idx)
39 return *Subs;
40 return 0;
43 unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
44 assert(SubReg && SubReg < getNumRegs() && "This is not a register");
45 // Get a pointer to the corresponding SubRegIndices list. This list has the
46 // name of each sub-register in the same order as MCSubRegIterator.
47 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
48 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
49 if (*Subs == SubReg)
50 return *SRI;
51 return 0;
54 unsigned MCRegisterInfo::getSubRegIdxSize(unsigned Idx) const {
55 assert(Idx && Idx < getNumSubRegIndices() &&
56 "This is not a subregister index");
57 return SubRegIdxRanges[Idx].Size;
60 unsigned MCRegisterInfo::getSubRegIdxOffset(unsigned Idx) const {
61 assert(Idx && Idx < getNumSubRegIndices() &&
62 "This is not a subregister index");
63 return SubRegIdxRanges[Idx].Offset;
66 int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
67 const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs;
68 unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize;
70 if (!M)
71 return -1;
72 DwarfLLVMRegPair Key = { RegNum, 0 };
73 const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
74 if (I == M+Size || I->FromReg != RegNum)
75 return -1;
76 return I->ToReg;
79 int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const {
80 const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs;
81 unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize;
83 if (!M)
84 return -1;
85 DwarfLLVMRegPair Key = { RegNum, 0 };
86 const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
87 assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum");
88 return I->ToReg;
91 int MCRegisterInfo::getLLVMRegNumFromEH(unsigned RegNum) const {
92 const DwarfLLVMRegPair *M = EHDwarf2LRegs;
93 unsigned Size = EHDwarf2LRegsSize;
95 if (!M)
96 return -1;
97 DwarfLLVMRegPair Key = { RegNum, 0 };
98 const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
99 if (I == M+Size || I->FromReg != RegNum)
100 return -1;
101 return I->ToReg;
104 int MCRegisterInfo::getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const {
105 // On ELF platforms, DWARF EH register numbers are the same as DWARF
106 // other register numbers. On Darwin x86, they differ and so need to be
107 // mapped. The .cfi_* directives accept integer literals as well as
108 // register names and should generate exactly what the assembly code
109 // asked for, so there might be DWARF/EH register numbers that don't have
110 // a corresponding LLVM register number at all. So if we can't map the
111 // EH register number to an LLVM register number, assume it's just a
112 // valid DWARF register number as is.
113 int LRegNum = getLLVMRegNumFromEH(RegNum);
114 if (LRegNum != -1)
115 return getDwarfRegNum(LRegNum, false);
116 return RegNum;
119 int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const {
120 const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum);
121 if (I == L2SEHRegs.end()) return (int)RegNum;
122 return I->second;
125 int MCRegisterInfo::getCodeViewRegNum(unsigned RegNum) const {
126 if (L2CVRegs.empty())
127 report_fatal_error("target does not implement codeview register mapping");
128 const DenseMap<unsigned, int>::const_iterator I = L2CVRegs.find(RegNum);
129 if (I == L2CVRegs.end())
130 report_fatal_error("unknown codeview register " + (RegNum < getNumRegs()
131 ? getName(RegNum)
132 : Twine(RegNum)));
133 return I->second;