lib/CodeGen/CallingConvLower.cpp

   1 //===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file implements the CCState class, used for lowering and implementing
  10 // calling conventions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "llvm/CodeGen/CallingConvLower.h"
  15 #include "llvm/CodeGen/MachineFrameInfo.h"
  16 #include "llvm/CodeGen/MachineRegisterInfo.h"
  17 #include "llvm/CodeGen/TargetLowering.h"
  18 #include "llvm/CodeGen/TargetRegisterInfo.h"
  19 #include "llvm/CodeGen/TargetSubtargetInfo.h"
  20 #include "llvm/IR/DataLayout.h"
  21 #include "llvm/Support/Debug.h"
  22 #include "llvm/Support/ErrorHandling.h"
  23 #include "llvm/Support/SaveAndRestore.h"
  24 #include "llvm/Support/raw_ostream.h"
  25 #include <algorithm>
  26
  27 using namespace llvm;
  28
  29 CCState::CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &mf,
  30                  SmallVectorImpl<CCValAssign> &locs, LLVMContext &C)
  31     : CallingConv(CC), IsVarArg(isVarArg), MF(mf),
  32       TRI(*MF.getSubtarget().getRegisterInfo()), Locs(locs), Context(C) {
  33   // No stack is used.
  34   StackOffset = 0;
  35
  36   clearByValRegsInfo();
  37   UsedRegs.resize((TRI.getNumRegs()+31)/32);
  38 }
  39
  40 /// Allocate space on the stack large enough to pass an argument by value.
  41 /// The size and alignment information of the argument is encoded in
  42 /// its parameter attribute.
  43 void CCState::HandleByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
  44                           CCValAssign::LocInfo LocInfo, int MinSize,
  45                           int MinAlignment, ISD::ArgFlagsTy ArgFlags) {
  46   llvm::Align MinAlign(MinAlignment);
  47   llvm::Align Align(ArgFlags.getByValAlign());
  48   unsigned Size  = ArgFlags.getByValSize();
  49   if (MinSize > (int)Size)
  50     Size = MinSize;
  51   if (MinAlign > Align)
  52     Align = MinAlign;
  53   ensureMaxAlignment(Align);
  54   MF.getSubtarget().getTargetLowering()->HandleByVal(this, Size, Align.value());
  55   Size = unsigned(alignTo(Size, MinAlign));
  56   unsigned Offset = AllocateStack(Size, Align.value());
  57   addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
  58 }
  59
  60 /// Mark a register and all of its aliases as allocated.
  61 void CCState::MarkAllocated(unsigned Reg) {
  62   for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
  63     UsedRegs[*AI/32] |= 1 << (*AI&31);
  64 }
  65
  66 bool CCState::IsShadowAllocatedReg(unsigned Reg) const {
  67   if (!isAllocated(Reg))
  68     return false;
  69
  70   for (auto const &ValAssign : Locs) {
  71     if (ValAssign.isRegLoc()) {
  72       for (MCRegAliasIterator AI(ValAssign.getLocReg(), &TRI, true);
  73            AI.isValid(); ++AI) {
  74         if (*AI == Reg)
  75           return false;
  76       }
  77     }
  78   }
  79   return true;
  80 }
  81
  82 /// Analyze an array of argument values,
  83 /// incorporating info about the formals into this state.
  84 void
  85 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
  86                                 CCAssignFn Fn) {
  87   unsigned NumArgs = Ins.size();
  88
  89   for (unsigned i = 0; i != NumArgs; ++i) {
  90     MVT ArgVT = Ins[i].VT;
  91     ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
  92     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this))
  93       report_fatal_error("unable to allocate function argument #" + Twine(i));
  94   }
  95 }
  96
  97 /// Analyze the return values of a function, returning true if the return can
  98 /// be performed without sret-demotion and false otherwise.
  99 bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
 100                           CCAssignFn Fn) {
 101   // Determine which register each value should be copied into.
 102   for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
 103     MVT VT = Outs[i].VT;
 104     ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
 105     if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
 106       return false;
 107   }
 108   return true;
 109 }
 110
 111 /// Analyze the returned values of a return,
 112 /// incorporating info about the result values into this state.
 113 void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
 114                             CCAssignFn Fn) {
 115   // Determine which register each value should be copied into.
 116   for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
 117     MVT VT = Outs[i].VT;
 118     ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
 119     if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
 120       report_fatal_error("unable to allocate function return #" + Twine(i));
 121   }
 122 }
 123
 124 /// Analyze the outgoing arguments to a call,
 125 /// incorporating info about the passed values into this state.
 126 void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
 127                                   CCAssignFn Fn) {
 128   unsigned NumOps = Outs.size();
 129   for (unsigned i = 0; i != NumOps; ++i) {
 130     MVT ArgVT = Outs[i].VT;
 131     ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
 132     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
 133 #ifndef NDEBUG
 134       dbgs() << "Call operand #" << i << " has unhandled type "
 135              << EVT(ArgVT).getEVTString() << '\n';
 136 #endif
 137       llvm_unreachable(nullptr);
 138     }
 139   }
 140 }
 141
 142 /// Same as above except it takes vectors of types and argument flags.
 143 void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
 144                                   SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
 145                                   CCAssignFn Fn) {
 146   unsigned NumOps = ArgVTs.size();
 147   for (unsigned i = 0; i != NumOps; ++i) {
 148     MVT ArgVT = ArgVTs[i];
 149     ISD::ArgFlagsTy ArgFlags = Flags[i];
 150     if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
 151 #ifndef NDEBUG
 152       dbgs() << "Call operand #" << i << " has unhandled type "
 153              << EVT(ArgVT).getEVTString() << '\n';
 154 #endif
 155       llvm_unreachable(nullptr);
 156     }
 157   }
 158 }
 159
 160 /// Analyze the return values of a call, incorporating info about the passed
 161 /// values into this state.
 162 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
 163                                 CCAssignFn Fn) {
 164   for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
 165     MVT VT = Ins[i].VT;
 166     ISD::ArgFlagsTy Flags = Ins[i].Flags;
 167     if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
 168 #ifndef NDEBUG
 169       dbgs() << "Call result #" << i << " has unhandled type "
 170              << EVT(VT).getEVTString() << '\n';
 171 #endif
 172       llvm_unreachable(nullptr);
 173     }
 174   }
 175 }
 176
 177 /// Same as above except it's specialized for calls that produce a single value.
 178 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) {
 179   if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
 180 #ifndef NDEBUG
 181     dbgs() << "Call result has unhandled type "
 182            << EVT(VT).getEVTString() << '\n';
 183 #endif
 184     llvm_unreachable(nullptr);
 185   }
 186 }
 187
 188 static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) {
 189   if (VT.isVector())
 190     return true; // Assume -msse-regparm might be in effect.
 191   if (!VT.isInteger())
 192     return false;
 193   if (CC == CallingConv::X86_VectorCall || CC == CallingConv::X86_FastCall)
 194     return true;
 195   return false;
 196 }
 197
 198 void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs,
 199                                           MVT VT, CCAssignFn Fn) {
 200   unsigned SavedStackOffset = StackOffset;
 201   llvm::Align SavedMaxStackArgAlign = MaxStackArgAlign;
 202   unsigned NumLocs = Locs.size();
 203
 204   // Set the 'inreg' flag if it is used for this calling convention.
 205   ISD::ArgFlagsTy Flags;
 206   if (isValueTypeInRegForCC(CallingConv, VT))
 207     Flags.setInReg();
 208
 209   // Allocate something of this value type repeatedly until we get assigned a
 210   // location in memory.
 211   bool HaveRegParm = true;
 212   while (HaveRegParm) {
 213     if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
 214 #ifndef NDEBUG
 215       dbgs() << "Call has unhandled type " << EVT(VT).getEVTString()
 216              << " while computing remaining regparms\n";
 217 #endif
 218       llvm_unreachable(nullptr);
 219     }
 220     HaveRegParm = Locs.back().isRegLoc();
 221   }
 222
 223   // Copy all the registers from the value locations we added.
 224   assert(NumLocs < Locs.size() && "CC assignment failed to add location");
 225   for (unsigned I = NumLocs, E = Locs.size(); I != E; ++I)
 226     if (Locs[I].isRegLoc())
 227       Regs.push_back(MCPhysReg(Locs[I].getLocReg()));
 228
 229   // Clear the assigned values and stack memory. We leave the registers marked
 230   // as allocated so that future queries don't return the same registers, i.e.
 231   // when i64 and f64 are both passed in GPRs.
 232   StackOffset = SavedStackOffset;
 233   MaxStackArgAlign = SavedMaxStackArgAlign;
 234   Locs.resize(NumLocs);
 235 }
 236
 237 void CCState::analyzeMustTailForwardedRegisters(
 238     SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
 239     CCAssignFn Fn) {
 240   // Oftentimes calling conventions will not user register parameters for
 241   // variadic functions, so we need to assume we're not variadic so that we get
 242   // all the registers that might be used in a non-variadic call.
 243   SaveAndRestore<bool> SavedVarArg(IsVarArg, false);
 244   SaveAndRestore<bool> SavedMustTail(AnalyzingMustTailForwardedRegs, true);
 245
 246   for (MVT RegVT : RegParmTypes) {
 247     SmallVector<MCPhysReg, 8> RemainingRegs;
 248     getRemainingRegParmsForType(RemainingRegs, RegVT, Fn);
 249     const TargetLowering *TL = MF.getSubtarget().getTargetLowering();
 250     const TargetRegisterClass *RC = TL->getRegClassFor(RegVT);
 251     for (MCPhysReg PReg : RemainingRegs) {
 252       unsigned VReg = MF.addLiveIn(PReg, RC);
 253       Forwards.push_back(ForwardedRegister(VReg, PReg, RegVT));
 254     }
 255   }
 256 }
 257
 258 bool CCState::resultsCompatible(CallingConv::ID CalleeCC,
 259                                 CallingConv::ID CallerCC, MachineFunction &MF,
 260                                 LLVMContext &C,
 261                                 const SmallVectorImpl<ISD::InputArg> &Ins,
 262                                 CCAssignFn CalleeFn, CCAssignFn CallerFn) {
 263   if (CalleeCC == CallerCC)
 264     return true;
 265   SmallVector<CCValAssign, 4> RVLocs1;
 266   CCState CCInfo1(CalleeCC, false, MF, RVLocs1, C);
 267   CCInfo1.AnalyzeCallResult(Ins, CalleeFn);
 268
 269   SmallVector<CCValAssign, 4> RVLocs2;
 270   CCState CCInfo2(CallerCC, false, MF, RVLocs2, C);
 271   CCInfo2.AnalyzeCallResult(Ins, CallerFn);
 272
 273   if (RVLocs1.size() != RVLocs2.size())
 274     return false;
 275   for (unsigned I = 0, E = RVLocs1.size(); I != E; ++I) {
 276     const CCValAssign &Loc1 = RVLocs1[I];
 277     const CCValAssign &Loc2 = RVLocs2[I];
 278     if (Loc1.getLocInfo() != Loc2.getLocInfo())
 279       return false;
 280     bool RegLoc1 = Loc1.isRegLoc();
 281     if (RegLoc1 != Loc2.isRegLoc())
 282       return false;
 283     if (RegLoc1) {
 284       if (Loc1.getLocReg() != Loc2.getLocReg())
 285         return false;
 286     } else {
 287       if (Loc1.getLocMemOffset() != Loc2.getLocMemOffset())
 288         return false;
 289     }
 290   }
 291   return true;
 292 }