1 //===- DemandedBits.cpp - Determine demanded bits -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass implements a demanded bits analysis. A demanded bit is one that
11 // contributes to a result; bits that are not demanded can be either zero or
12 // one without affecting control or data flow. For example in this sequence:
14 // %1 = add i32 %x, %y
15 // %2 = trunc i32 %1 to i16
17 // Only the lowest 16 bits of %1 are demanded; the rest are removed by the
20 //===----------------------------------------------------------------------===//
22 #include "llvm/Analysis/DemandedBits.h"
23 #include "llvm/ADT/APInt.h"
24 #include "llvm/ADT/SmallPtrSet.h"
25 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/ADT/StringExtras.h"
27 #include "llvm/Analysis/AssumptionCache.h"
28 #include "llvm/Analysis/ValueTracking.h"
29 #include "llvm/IR/BasicBlock.h"
30 #include "llvm/IR/Constants.h"
31 #include "llvm/IR/DataLayout.h"
32 #include "llvm/IR/DerivedTypes.h"
33 #include "llvm/IR/Dominators.h"
34 #include "llvm/IR/InstIterator.h"
35 #include "llvm/IR/InstrTypes.h"
36 #include "llvm/IR/Instruction.h"
37 #include "llvm/IR/IntrinsicInst.h"
38 #include "llvm/IR/Intrinsics.h"
39 #include "llvm/IR/Module.h"
40 #include "llvm/IR/Operator.h"
41 #include "llvm/IR/PassManager.h"
42 #include "llvm/IR/Type.h"
43 #include "llvm/IR/Use.h"
44 #include "llvm/Pass.h"
45 #include "llvm/Support/Casting.h"
46 #include "llvm/Support/Debug.h"
47 #include "llvm/Support/KnownBits.h"
48 #include "llvm/Support/raw_ostream.h"
54 #define DEBUG_TYPE "demanded-bits"
56 char DemandedBitsWrapperPass::ID
= 0;
58 INITIALIZE_PASS_BEGIN(DemandedBitsWrapperPass
, "demanded-bits",
59 "Demanded bits analysis", false, false)
60 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker
)
61 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass
)
62 INITIALIZE_PASS_END(DemandedBitsWrapperPass
, "demanded-bits",
63 "Demanded bits analysis", false, false)
65 DemandedBitsWrapperPass::DemandedBitsWrapperPass() : FunctionPass(ID
) {
66 initializeDemandedBitsWrapperPassPass(*PassRegistry::getPassRegistry());
69 void DemandedBitsWrapperPass::getAnalysisUsage(AnalysisUsage
&AU
) const {
71 AU
.addRequired
<AssumptionCacheTracker
>();
72 AU
.addRequired
<DominatorTreeWrapperPass
>();
76 void DemandedBitsWrapperPass::print(raw_ostream
&OS
, const Module
*M
) const {
80 static bool isAlwaysLive(Instruction
*I
) {
81 return I
->isTerminator() || isa
<DbgInfoIntrinsic
>(I
) || I
->isEHPad() ||
82 I
->mayHaveSideEffects();
85 void DemandedBits::determineLiveOperandBits(
86 const Instruction
*UserI
, const Instruction
*I
, unsigned OperandNo
,
87 const APInt
&AOut
, APInt
&AB
, KnownBits
&Known
, KnownBits
&Known2
) {
88 unsigned BitWidth
= AB
.getBitWidth();
90 // We're called once per operand, but for some instructions, we need to
91 // compute known bits of both operands in order to determine the live bits of
92 // either (when both operands are instructions themselves). We don't,
93 // however, want to do this twice, so we cache the result in APInts that live
94 // in the caller. For the two-relevant-operands case, both operand values are
96 auto ComputeKnownBits
=
97 [&](unsigned BitWidth
, const Value
*V1
, const Value
*V2
) {
98 const DataLayout
&DL
= I
->getModule()->getDataLayout();
99 Known
= KnownBits(BitWidth
);
100 computeKnownBits(V1
, Known
, DL
, 0, &AC
, UserI
, &DT
);
103 Known2
= KnownBits(BitWidth
);
104 computeKnownBits(V2
, Known2
, DL
, 0, &AC
, UserI
, &DT
);
108 switch (UserI
->getOpcode()) {
110 case Instruction::Call
:
111 case Instruction::Invoke
:
112 if (const IntrinsicInst
*II
= dyn_cast
<IntrinsicInst
>(UserI
))
113 switch (II
->getIntrinsicID()) {
115 case Intrinsic::bswap
:
116 // The alive bits of the input are the swapped alive bits of
118 AB
= AOut
.byteSwap();
120 case Intrinsic::bitreverse
:
121 // The alive bits of the input are the reversed alive bits of
123 AB
= AOut
.reverseBits();
125 case Intrinsic::ctlz
:
126 if (OperandNo
== 0) {
127 // We need some output bits, so we need all bits of the
128 // input to the left of, and including, the leftmost bit
130 ComputeKnownBits(BitWidth
, I
, nullptr);
131 AB
= APInt::getHighBitsSet(BitWidth
,
132 std::min(BitWidth
, Known
.countMaxLeadingZeros()+1));
135 case Intrinsic::cttz
:
136 if (OperandNo
== 0) {
137 // We need some output bits, so we need all bits of the
138 // input to the right of, and including, the rightmost bit
140 ComputeKnownBits(BitWidth
, I
, nullptr);
141 AB
= APInt::getLowBitsSet(BitWidth
,
142 std::min(BitWidth
, Known
.countMaxTrailingZeros()+1));
147 case Instruction::Add
:
148 case Instruction::Sub
:
149 case Instruction::Mul
:
150 // Find the highest live output bit. We don't need any more input
151 // bits than that (adds, and thus subtracts, ripple only to the
153 AB
= APInt::getLowBitsSet(BitWidth
, AOut
.getActiveBits());
155 case Instruction::Shl
:
157 if (auto *ShiftAmtC
= dyn_cast
<ConstantInt
>(UserI
->getOperand(1))) {
158 uint64_t ShiftAmt
= ShiftAmtC
->getLimitedValue(BitWidth
- 1);
159 AB
= AOut
.lshr(ShiftAmt
);
161 // If the shift is nuw/nsw, then the high bits are not dead
162 // (because we've promised that they *must* be zero).
163 const ShlOperator
*S
= cast
<ShlOperator
>(UserI
);
164 if (S
->hasNoSignedWrap())
165 AB
|= APInt::getHighBitsSet(BitWidth
, ShiftAmt
+1);
166 else if (S
->hasNoUnsignedWrap())
167 AB
|= APInt::getHighBitsSet(BitWidth
, ShiftAmt
);
170 case Instruction::LShr
:
172 if (auto *ShiftAmtC
= dyn_cast
<ConstantInt
>(UserI
->getOperand(1))) {
173 uint64_t ShiftAmt
= ShiftAmtC
->getLimitedValue(BitWidth
- 1);
174 AB
= AOut
.shl(ShiftAmt
);
176 // If the shift is exact, then the low bits are not dead
177 // (they must be zero).
178 if (cast
<LShrOperator
>(UserI
)->isExact())
179 AB
|= APInt::getLowBitsSet(BitWidth
, ShiftAmt
);
182 case Instruction::AShr
:
184 if (auto *ShiftAmtC
= dyn_cast
<ConstantInt
>(UserI
->getOperand(1))) {
185 uint64_t ShiftAmt
= ShiftAmtC
->getLimitedValue(BitWidth
- 1);
186 AB
= AOut
.shl(ShiftAmt
);
187 // Because the high input bit is replicated into the
188 // high-order bits of the result, if we need any of those
189 // bits, then we must keep the highest input bit.
190 if ((AOut
& APInt::getHighBitsSet(BitWidth
, ShiftAmt
))
194 // If the shift is exact, then the low bits are not dead
195 // (they must be zero).
196 if (cast
<AShrOperator
>(UserI
)->isExact())
197 AB
|= APInt::getLowBitsSet(BitWidth
, ShiftAmt
);
200 case Instruction::And
:
203 // For bits that are known zero, the corresponding bits in the
204 // other operand are dead (unless they're both zero, in which
205 // case they can't both be dead, so just mark the LHS bits as
207 if (OperandNo
== 0) {
208 ComputeKnownBits(BitWidth
, I
, UserI
->getOperand(1));
211 if (!isa
<Instruction
>(UserI
->getOperand(0)))
212 ComputeKnownBits(BitWidth
, UserI
->getOperand(0), I
);
213 AB
&= ~(Known
.Zero
& ~Known2
.Zero
);
216 case Instruction::Or
:
219 // For bits that are known one, the corresponding bits in the
220 // other operand are dead (unless they're both one, in which
221 // case they can't both be dead, so just mark the LHS bits as
223 if (OperandNo
== 0) {
224 ComputeKnownBits(BitWidth
, I
, UserI
->getOperand(1));
227 if (!isa
<Instruction
>(UserI
->getOperand(0)))
228 ComputeKnownBits(BitWidth
, UserI
->getOperand(0), I
);
229 AB
&= ~(Known
.One
& ~Known2
.One
);
232 case Instruction::Xor
:
233 case Instruction::PHI
:
236 case Instruction::Trunc
:
237 AB
= AOut
.zext(BitWidth
);
239 case Instruction::ZExt
:
240 AB
= AOut
.trunc(BitWidth
);
242 case Instruction::SExt
:
243 AB
= AOut
.trunc(BitWidth
);
244 // Because the high input bit is replicated into the
245 // high-order bits of the result, if we need any of those
246 // bits, then we must keep the highest input bit.
247 if ((AOut
& APInt::getHighBitsSet(AOut
.getBitWidth(),
248 AOut
.getBitWidth() - BitWidth
))
252 case Instruction::Select
:
259 bool DemandedBitsWrapperPass::runOnFunction(Function
&F
) {
260 auto &AC
= getAnalysis
<AssumptionCacheTracker
>().getAssumptionCache(F
);
261 auto &DT
= getAnalysis
<DominatorTreeWrapperPass
>().getDomTree();
262 DB
.emplace(F
, AC
, DT
);
266 void DemandedBitsWrapperPass::releaseMemory() {
270 void DemandedBits::performAnalysis() {
272 // Analysis already completed for this function.
279 SmallVector
<Instruction
*, 128> Worklist
;
281 // Collect the set of "root" instructions that are known live.
282 for (Instruction
&I
: instructions(F
)) {
283 if (!isAlwaysLive(&I
))
286 LLVM_DEBUG(dbgs() << "DemandedBits: Root: " << I
<< "\n");
287 // For integer-valued instructions, set up an initial empty set of alive
288 // bits and add the instruction to the work list. For other instructions
289 // add their operands to the work list (for integer values operands, mark
290 // all bits as live).
291 if (IntegerType
*IT
= dyn_cast
<IntegerType
>(I
.getType())) {
292 if (AliveBits
.try_emplace(&I
, IT
->getBitWidth(), 0).second
)
293 Worklist
.push_back(&I
);
298 // Non-integer-typed instructions...
299 for (Use
&OI
: I
.operands()) {
300 if (Instruction
*J
= dyn_cast
<Instruction
>(OI
)) {
301 if (IntegerType
*IT
= dyn_cast
<IntegerType
>(J
->getType()))
302 AliveBits
[J
] = APInt::getAllOnesValue(IT
->getBitWidth());
303 Worklist
.push_back(J
);
306 // To save memory, we don't add I to the Visited set here. Instead, we
307 // check isAlwaysLive on every instruction when searching for dead
308 // instructions later (we need to check isAlwaysLive for the
309 // integer-typed instructions anyway).
312 // Propagate liveness backwards to operands.
313 while (!Worklist
.empty()) {
314 Instruction
*UserI
= Worklist
.pop_back_val();
316 LLVM_DEBUG(dbgs() << "DemandedBits: Visiting: " << *UserI
);
318 if (UserI
->getType()->isIntegerTy()) {
319 AOut
= AliveBits
[UserI
];
320 LLVM_DEBUG(dbgs() << " Alive Out: " << AOut
);
322 LLVM_DEBUG(dbgs() << "\n");
324 if (!UserI
->getType()->isIntegerTy())
325 Visited
.insert(UserI
);
327 KnownBits Known
, Known2
;
328 // Compute the set of alive bits for each operand. These are anded into the
329 // existing set, if any, and if that changes the set of alive bits, the
330 // operand is added to the work-list.
331 for (Use
&OI
: UserI
->operands()) {
332 if (Instruction
*I
= dyn_cast
<Instruction
>(OI
)) {
333 if (IntegerType
*IT
= dyn_cast
<IntegerType
>(I
->getType())) {
334 unsigned BitWidth
= IT
->getBitWidth();
335 APInt AB
= APInt::getAllOnesValue(BitWidth
);
336 if (UserI
->getType()->isIntegerTy() && !AOut
&&
337 !isAlwaysLive(UserI
)) {
338 AB
= APInt(BitWidth
, 0);
340 // If all bits of the output are dead, then all bits of the input
341 // Bits of each operand that are used to compute alive bits of the
342 // output are alive, all others are dead.
343 determineLiveOperandBits(UserI
, I
, OI
.getOperandNo(), AOut
, AB
,
347 // If we've added to the set of alive bits (or the operand has not
348 // been previously visited), then re-queue the operand to be visited
350 APInt
ABPrev(BitWidth
, 0);
351 auto ABI
= AliveBits
.find(I
);
352 if (ABI
!= AliveBits
.end())
353 ABPrev
= ABI
->second
;
355 APInt ABNew
= AB
| ABPrev
;
356 if (ABNew
!= ABPrev
|| ABI
== AliveBits
.end()) {
357 AliveBits
[I
] = std::move(ABNew
);
358 Worklist
.push_back(I
);
360 } else if (!Visited
.count(I
)) {
361 Worklist
.push_back(I
);
368 APInt
DemandedBits::getDemandedBits(Instruction
*I
) {
371 const DataLayout
&DL
= I
->getModule()->getDataLayout();
372 auto Found
= AliveBits
.find(I
);
373 if (Found
!= AliveBits
.end())
374 return Found
->second
;
375 return APInt::getAllOnesValue(DL
.getTypeSizeInBits(I
->getType()));
378 bool DemandedBits::isInstructionDead(Instruction
*I
) {
381 return !Visited
.count(I
) && AliveBits
.find(I
) == AliveBits
.end() &&
385 void DemandedBits::print(raw_ostream
&OS
) {
387 for (auto &KV
: AliveBits
) {
388 OS
<< "DemandedBits: 0x" << Twine::utohexstr(KV
.second
.getLimitedValue())
389 << " for " << *KV
.first
<< '\n';
393 FunctionPass
*llvm::createDemandedBitsWrapperPass() {
394 return new DemandedBitsWrapperPass();
397 AnalysisKey
DemandedBitsAnalysis::Key
;
399 DemandedBits
DemandedBitsAnalysis::run(Function
&F
,
400 FunctionAnalysisManager
&AM
) {
401 auto &AC
= AM
.getResult
<AssumptionAnalysis
>(F
);
402 auto &DT
= AM
.getResult
<DominatorTreeAnalysis
>(F
);
403 return DemandedBits(F
, AC
, DT
);
406 PreservedAnalyses
DemandedBitsPrinterPass::run(Function
&F
,
407 FunctionAnalysisManager
&AM
) {
408 AM
.getResult
<DemandedBitsAnalysis
>(F
).print(OS
);
409 return PreservedAnalyses::all();