1 //===-- llvm/CodeGen/AllocationOrder.h - Allocation Order -*- C++ -*-------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements an allocation order for virtual registers.
12 // The preferred allocation order for a virtual register depends on allocation
13 // hints and target hooks. The AllocationOrder class encapsulates all of that.
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_LIB_CODEGEN_ALLOCATIONORDER_H
18 #define LLVM_LIB_CODEGEN_ALLOCATIONORDER_H
20 #include "llvm/ADT/ArrayRef.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/MC/MCRegisterInfo.h"
26 class RegisterClassInfo
;
30 class LLVM_LIBRARY_VISIBILITY AllocationOrder
{
31 SmallVector
<MCPhysReg
, 16> Hints
;
32 ArrayRef
<MCPhysReg
> Order
;
35 // If HardHints is true, *only* Hints will be returned.
40 /// Create a new AllocationOrder for VirtReg.
41 /// @param VirtReg Virtual register to allocate for.
42 /// @param VRM Virtual register map for function.
43 /// @param RegClassInfo Information about reserved and allocatable registers.
44 AllocationOrder(unsigned VirtReg
,
45 const VirtRegMap
&VRM
,
46 const RegisterClassInfo
&RegClassInfo
,
47 const LiveRegMatrix
*Matrix
);
49 /// Get the allocation order without reordered hints.
50 ArrayRef
<MCPhysReg
> getOrder() const { return Order
; }
52 /// Return the next physical register in the allocation order, or 0.
53 /// It is safe to call next() again after it returned 0, it will keep
54 /// returning 0 until rewind() is called.
55 unsigned next(unsigned Limit
= 0) {
57 return Hints
.end()[Pos
++];
62 while (Pos
< int(Limit
)) {
63 unsigned Reg
= Order
[Pos
++];
70 /// As next(), but allow duplicates to be returned, and stop before the
71 /// Limit'th register in the RegisterClassInfo allocation order.
73 /// This can produce more than Limit registers if there are hints.
74 unsigned nextWithDups(unsigned Limit
) {
76 return Hints
.end()[Pos
++];
84 /// Start over from the beginning.
85 void rewind() { Pos
= -int(Hints
.size()); }
87 /// Return true if the last register returned from next() was a preferred register.
88 bool isHint() const { return Pos
<= 0; }
90 /// Return true if PhysReg is a preferred register.
91 bool isHint(unsigned PhysReg
) const { return is_contained(Hints
, PhysReg
); }
94 } // end namespace llvm