lib/Target/NVPTX/NVPTXFrameLowering.cpp

   1 //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the NVPTX implementation of TargetFrameLowering class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "NVPTXFrameLowering.h"
  15 #include "NVPTX.h"
  16 #include "NVPTXRegisterInfo.h"
  17 #include "NVPTXSubtarget.h"
  18 #include "NVPTXTargetMachine.h"
  19 #include "llvm/CodeGen/MachineFrameInfo.h"
  20 #include "llvm/CodeGen/MachineFunction.h"
  21 #include "llvm/CodeGen/MachineInstrBuilder.h"
  22 #include "llvm/CodeGen/MachineRegisterInfo.h"
  23 #include "llvm/CodeGen/TargetInstrInfo.h"
  24 #include "llvm/MC/MachineLocation.h"
  25
  26 using namespace llvm;
  27
  28 NVPTXFrameLowering::NVPTXFrameLowering()
  29     : TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0) {}
  30
  31 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
  32
  33 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF,
  34                                       MachineBasicBlock &MBB) const {
  35   if (MF.getFrameInfo().hasStackObjects()) {
  36     assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
  37     MachineInstr *MI = &MBB.front();
  38     MachineRegisterInfo &MR = MF.getRegInfo();
  39
  40     // This instruction really occurs before first instruction
  41     // in the BB, so giving it no debug location.
  42     DebugLoc dl = DebugLoc();
  43
  44     // Emits
  45     //   mov %SPL, %depot;
  46     //   cvta.local %SP, %SPL;
  47     // for local address accesses in MF.
  48     bool Is64Bit =
  49         static_cast<const NVPTXTargetMachine &>(MF.getTarget()).is64Bit();
  50     unsigned CvtaLocalOpcode =
  51         (Is64Bit ? NVPTX::cvta_local_yes_64 : NVPTX::cvta_local_yes);
  52     unsigned MovDepotOpcode =
  53         (Is64Bit ? NVPTX::MOV_DEPOT_ADDR_64 : NVPTX::MOV_DEPOT_ADDR);
  54     if (!MR.use_empty(NVPTX::VRFrame)) {
  55       // If %SP is not used, do not bother emitting "cvta.local %SP, %SPL".
  56       MI = BuildMI(MBB, MI, dl,
  57                    MF.getSubtarget().getInstrInfo()->get(CvtaLocalOpcode),
  58                    NVPTX::VRFrame)
  59                .addReg(NVPTX::VRFrameLocal);
  60     }
  61     BuildMI(MBB, MI, dl, MF.getSubtarget().getInstrInfo()->get(MovDepotOpcode),
  62             NVPTX::VRFrameLocal)
  63         .addImm(MF.getFunctionNumber());
  64   }
  65 }
  66
  67 int NVPTXFrameLowering::getFrameIndexReference(const MachineFunction &MF,
  68                                                int FI,
  69                                                unsigned &FrameReg) const {
  70   const MachineFrameInfo &MFI = MF.getFrameInfo();
  71   FrameReg = NVPTX::VRDepot;
  72   return MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
  73 }
  74
  75 void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF,
  76                                       MachineBasicBlock &MBB) const {}
  77
  78 // This function eliminates ADJCALLSTACKDOWN,
  79 // ADJCALLSTACKUP pseudo instructions
  80 MachineBasicBlock::iterator NVPTXFrameLowering::eliminateCallFramePseudoInstr(
  81     MachineFunction &MF, MachineBasicBlock &MBB,
  82     MachineBasicBlock::iterator I) const {
  83   // Simply discard ADJCALLSTACKDOWN,
  84   // ADJCALLSTACKUP instructions.
  85   return MBB.erase(I);
  86 }