[llvm-readobj] - Simplify stack-sizes.test test case.
[llvm-complete.git] / test / MC / AArch64 / SVE / fabd-diagnostics.s
blob3493205ae55b7f7773b1807a67b339dce44dfae2
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
4 // ------------------------------------------------------------------------- //
5 // Tied operands must match
7 fabd z0.h, p7/m, z1.h, z31.h
8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
9 // CHECK-NEXT: fabd z0.h, p7/m, z1.h, z31.h
10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
13 // ------------------------------------------------------------------------- //
14 // Invalid element widths.
16 fabd z0.b, p7/m, z0.b, z31.b
17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
18 // CHECK-NEXT: fabd z0.b, p7/m, z0.b, z31.b
19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
21 fabd z0.h, p7/m, z0.h, z31.s
22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
23 // CHECK-NEXT: fabd z0.h, p7/m, z0.h, z31.s
24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
27 // ------------------------------------------------------------------------- //
28 // Invalid predicate
30 fabd z0.h, p8/m, z0.h, z31.h
31 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
32 // CHECK-NEXT: fabd z0.h, p8/m, z0.h, z31.h
33 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: