test/MC/AArch64/SVE/fmsb-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3
   4 // ------------------------------------------------------------------------- //
   5 // Invalid predicate
   6
   7 fmsb z0.h, p8/m, z1.h, z2.h
   8 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
   9 // CHECK-NEXT: fmsb z0.h, p8/m, z1.h, z2.h
  10 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  11
  12
  13 // ------------------------------------------------------------------------- //
  14 // Invalid element width
  15
  16 fmsb z0.s, p7/m, z1.h, z2.h
  17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  18 // CHECK-NEXT: fmsb z0.s, p7/m, z1.h, z2.h
  19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  20
  21 fmsb z0.b, p7/m, z1.b, z2.b
  22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  23 // CHECK-NEXT: fmsb z0.b, p7/m, z1.b, z2.b
  24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  25
  26
  27 // ------------------------------------------------------------------------- //
  28 // Element index is not allowed
  29
  30 fmsb z0.h, p7/m, z1.h, z2.h[0]
  31 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
  32 // CHECK-NEXT: fmsb z0.h, p7/m, z1.h, z2.h[0]
  33 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: