test/MC/AArch64/SVE/fsubr-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
   2
   3 // ------------------------------------------------------------------------- //
   4 // Invalid immediates (must be 0.5 or 1.0)
   5
   6 fsubr z0.h, p0/m, z0.h, #0.0
   7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
   8 // CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #0.0
   9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  10
  11 fsubr z0.h, p0/m, z0.h, #0.4999999999999999999999999
  12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
  13 // CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #0.4999999999999999999999999
  14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  15
  16 fsubr z0.h, p0/m, z0.h, #0.5000000000000000000000001
  17 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
  18 // CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #0.5000000000000000000000001
  19 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  20
  21 fsubr z0.h, p0/m, z0.h, #1.0000000000000000000000001
  22 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
  23 // CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #1.0000000000000000000000001
  24 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  25
  26 fsubr z0.h, p0/m, z0.h, #0.9999999999999999999999999
  27 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid floating point constant, expected 0.5 or 1.0.
  28 // CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #0.9999999999999999999999999
  29 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  30
  31
  32 // ------------------------------------------------------------------------- //
  33 // Tied operands must match
  34
  35 fsubr    z0.h, p7/m, z1.h, z31.h
  36 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
  37 // CHECK-NEXT: fsubr    z0.h, p7/m, z1.h, z31.h
  38 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  39
  40
  41 // ------------------------------------------------------------------------- //
  42 // Invalid element widths.
  43
  44 fsubr    z0.b, p7/m, z0.b, z31.b
  45 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  46 // CHECK-NEXT: fsubr    z0.b, p7/m, z0.b, z31.b
  47 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  48
  49 fsubr    z0.h, p7/m, z0.h, z31.s
  50 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  51 // CHECK-NEXT: fsubr    z0.h, p7/m, z0.h, z31.s
  52 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
  53
  54
  55 // ------------------------------------------------------------------------- //
  56 // Invalid predicate
  57
  58 fsubr    z0.h, p8/m, z0.h, z31.h
  59 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  60 // CHECK-NEXT: fsubr    z0.h, p8/m, z0.h, z31.h
  61 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: